MSP430F2101IPW - Texas Instruments

Application Report

SLAA421–October 2009

Migrating From MSP430F12x(2) to MSP430F21x2

Andreas Dannenberg............................................................................................................. MSP430

ABSTRACT

The purpose of this application report is to facilitate the migration of designs based on

MSP430F122/F123/F1222/F1232 devices to the MSP430F21x2 device family. In the course of this

application report, the main differences between the two device families are highlighted, and migration

solutions covering both software and hardware aspects are provided.

Contents

1 MSP430x1xx Versus MSP430x2xx Family Comparison Overview ................................................... 2

2 MSP430F12x(2) to MSP430F21x2 Migration – Hardware Considerations .......................................... 2

2.1 Device Package and Pinout ...................................................................................... 2

2.2 Current Consumption .............................................................................................. 3

2.3 Operating Frequency Versus Supply Voltage .................................................................. 3

2.4 Device Errata ....................................................................................................... 3

3 MSP430F12x(2) to MSP430F21x2 Migration – Firmware Considerations .......................................... 4

3.1 Memory Considerations ........................................................................................... 4

3.2 Serial Communication – USART Versus USCI ................................................................ 5

3.3 Clock System ....................................................................................................... 6

3.4 Bootstrap Loader (BSL) ........................................................................................... 7

3.5 Interrupt Vectors ................................................................................................... 7

3.6 Beware of Reserved Bits! ......................................................................................... 7

3.7 Timer ................................................................................................................. 7

3.8 Analog Comparator ................................................................................................ 8

4 References ................................................................................................................... 8

List of Figures

1 CACTL2 Bit Description, 1xx Devices.................................................................................... 7

2 CACTL2 Bit Description, 2xx Devices.................................................................................... 7

List of Tables

1 1xx Versus 2xx High-Level Comparison................................................................................. 2

SLAA421–October 2009 Migrating From MSP430F12x(2) to MSP430F21x2

MSP430x1xx Versus MSP430x2xx Family Comparison Overview

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1 MSP430x1xx Versus MSP430x2xx Family Comparison Overview

The MSP430x2xx family of microcontrollers provides an upgrade path for the MSP430x1xx family, offering

more performance, lower power, and more built-in features. This enables an improved and more

cost-optimized system design. Table 1 contains a general high-level comparison of the two device

families, providing an overview of reasons why one should consider migrating.

Table 1. 1xx Versus 2xx High-Level Comparison

MSP430x1xx MSP430x2xx

Maximum CPU clock speed 8 MHz 16 MHz

Wake up from LPM3/LPM4 <6 μs <1 μs

Standby current consumption <2 μA <1 μA

(LPM3)

Brown-out reset Selected devices only All devices

Minimum voltage for flash ISP 2.7 V 2.2 V

Integrated port pullup/pulldown – On all ports

resistors Very small voltage and temperature drift (±2%)

Internal oscillator (DCO) Large voltage and temperature drift (±20%) Factory calibrated

Oscillator fault detection High-frequency crystal High-frequency and low-frequency crystal

Additional built-in low-power – 12-kHz VLO

low-frequency oscillator Minimum pulse clock filter for increased system

Additional oscillator features – robustness

Configurable built-in crystal load capacitors

Additional watchdog timer Invalid address detection

–

features Fail-safe clock source

Bootstrap loader (BSL) Protected through 256-bit password Hack proof

Flash memory configurations Up to 60 KB Up to 120 KB (as of 4Q09)

RAM Up to 10 KB Up to 8 KB (as of 4Q09)

–40°C to 85°C (up to 105°C / 125°C on selected

Operating temperature (TA) –40°C to 85°C devices)

While the MSP430F21x2 can be considered as a direct pin-to-pin compatible drop-in to existing

MSP430F12x(2) designs, there are some important details that require attention. This application report

helps identify potential issues. After migration, the application benefits from all the MSP430F2xx family

enhancements as indicated in Table 1. This could enable further cost savings or other system-level

optimizations. This document focuses on transitioning existing designs and leaves it to the engineer to

make use of additional MSP430F2xx features during migration as applicable for a given system (for

example, the use of internal pullup/pulldown resistors, using peripheral modules not available on the

original device, etc.).

2 MSP430F12x(2) to MSP430F21x2 Migration – Hardware Considerations

This section provides information on differences between the MSP430F12x(2) and MSP430F21x2 families

of devices that should be considered during migration. Fortunately, the hardware migration process is

straightforward with only a few items to watch out for.

2.1 Device Package and Pinout

The good news is that a 28-pin TSSOP and the 32-pin QFN MSP430F21x2 devices directly drop into

existing MSP430F12x(2)-based footprints. Both TSSOP and QFN package variants and PCB footprints

are identical. However there is no 28-pin DW package equivalent for the MSP430F12x(2) devices in the

MSP430F21x2 device family. If the original design uses the 28-pin DW package, the PCB would need to

be migrated to use either the 28-pin TSSOP or the 32-pin QFN package variant of the MSP430F21x2.

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MSP430F12x(2) to MSP430F21x2 Migration – Hardware Considerations

All MSP430F21x2 pins can be used for the same purpose as the pins on their MSP430F12x(2)

counterparts (which includes all analog and digital modules, as well as power supply pins), enabling a

transition to MSP430F21x2 devices without changes to the application PCB. Details regarding packaging

and pinouts can be found in the device-specific data sheets. [3][4][5]

There is one important difference regarding the JTAG pins. The MSP430F21x2 devices have a 2-wire

JTAG communication mode-capable interface (also referred to as "Spy-Bi-Wire") in contrast to the

MSP430F12x(2) devices, which have a 4-wire JTAG communication mode-only interface. While the

MSP430F21x2 family also supports 4-wire JTAG communication, the connection of the RST pin is no

longer optional in this case. If a custom board relies on the JTAG interface for in-system programming

purposes, this connection would need to be added to the circuit. More information regarding the necessary

connections can be found in the MSP430 Hardware Tools User's Guide (SLAU278). [8]

2.2 Current Consumption

When migrating to an MSP430F21x2, the difference in current consumption of the devices should be

considered. For example, in LFXT1 standby mode (LPM3 using a 32-kHz watch crystal), the standby

current consumption of an MSP430F21x2 is in the 1-μA range (typical data sheet value at 3 V, 25°C),

which is much lower than the current consumption of an MSP430F12x(2) device, which is in the 1.6-μA

range when performing the same function. This is a great benefit for applications that operate in standby

mode most of the time. The MSP430F21x2 family's active current consumption is about 15% higher

(typical) than on MSP430F12x(2) devices when operating at the same frequency, temperature, and

voltage conditions due to architectural differences. See the device-specific data sheets for the exact

specifications. Note also that when using LFXT1 in high-frequency mode, the current consumption

component caused by the oscillator of an MSP430F21x2 device is slightly higher as compared to an

MSP430F12x(2) device due to differences in the oscillator design to support higher frequencies.

One additional point the designer should be aware of is that, when taking advantage of the increased

maximum operating frequency the MSP430F21x2 offers, additional current must be supplied by the

system’s power supply, because active-mode current consumption scales linearly with operating

frequency.

2.3 Operating Frequency Versus Supply Voltage

For the MSP430, the maximum frequency at which the CPU can operate depends on the supply voltage.

This specification can be found in the recommended operating conditions of each MSP430 data sheet. In

general, it can be said that this specification differs for the MSP430F12x(2) and MSP430F21x2 families of

microcontrollers. However, an MSP430F21x2 device can always operate under the same operating

conditions in terms of supply voltage and CPU clock frequency (MCLK) as an MSP430F12x(2) device. If a

designer who migrates an existing design to an MSP430F21x2 device wants to take advantage of the

increased maximum clock frequency, it is important to closely review the recommended operating

conditions in the MSP430F21x2 device data sheet. [5]

It is of extreme importance that this relationship is also observed during power-ramp scenarios. Violating

this maximum frequency versus voltage dependency can result in unpredictable code execution. Possible

solutions include the addition of system-specific delays during device startup and measuring the supply

voltage using the built-in ADC10 module before increasing the system frequency. In certain cases the use

of an external SVS should be considered for best-possible robustness.

2.4 Device Errata

In the course of migrating an existing application to the MSP430F21x2, it is recommended to review and

carefully consider the latest device errata sheets to ensure the application is not affected by a known

device issue. Furthermore, the errata sheets typically outline workarounds along with the bug descriptions.

For all MSP430 products, the device errata sheets can be found in the product folders of each product on

the MSP430 web page (www.msp430.com).

SLAA421–October 2009 Migrating From MSP430F12x(2) to MSP430F21x2

MSP430F12x(2) to MSP430F21x2 Migration – Firmware Considerations

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3 MSP430F12x(2) to MSP430F21x2 Migration – Firmware Considerations

This section outlines important steps to consider when transitioning existing software routines or an entire

application to an MSP430F21x2 device. Even though the MSP430F12x(2) and the MSP430F21x2 are

code compatible and share many of the same peripherals, in many cases, migration is not as simple as

programming the MSP430F12x(2) binary image into an MSP430F21x2 device. In general, an application

should be rebuilt at a source-code level (including all referenced code libraries, etc.), using the appropriate

MSP430F21x2 device support files, such as the header file (msp430x21x2.h) and the respective linker

command file (e.g., lnk_msp430f2132.cmd for TI Code Composer Studio IDE or lnk430F2132.xcl for IAR

Embedded Workbench). Doing this is the first step toward a successful migration to an MSP430F21x2.

The following sections provide more details regarding certain key aspects that should be considered.

3.1 Memory Considerations

3.1.1 Device Memory Map

The memory maps of the MSP430F12x(2) and MSP430F21x2 are almost identical. This applies to the

location and size of RAM as well as flash memory, allowing an application to keep the same linker

command file during migration, in most cases. However, there are two exceptions that apply and,

therefore, it is strongly recommended to rebuild the application to accommodate for the difference in the

memory map. The build process makes use of the memory map information stored in the IDE linker

command file and automatically accommodates these changes. The linker command files are found within

the folder where the IDE was installed and have the file name extension CMD (for TI Code Composer

Studio) and XCL (for IAR Embedded Workbench).

The interrupt vector table of MSP430F21x2 devices spans 32 memory word locations, whereas the table

in MSP430F12x(2) devices spans 16 memory word locations. Furthermore, the word memory location

0xFFDE on MSP430F21x2 devices is reserved for special bootstrap loader purposes (BSLSKEY). See

Section 3.5 for more details regarding the interrupt vector table.

Both MSP430F2122 and MSP430F2132 devices have an increased RAM size of 512 bytes compared to

their MSP430F12x(2) family counterparts. The application should be rebuilt to take advantage of this

increased memory size. In addition, the MSP430F21x2 device family has a device with a memory

configuration previously unavailable. The MSP430F2112 has 256 bytes of RAM and 2 KB of flash

memory. This device can be considered as an alternative migration option for applications that don't use

the entire flash memory of the original device.

Further details regarding the device memory maps can be found in the device-specific data sheets.

[3][4][5]

3.1.2 Information Flash Memory

Both MSP430F12x(2) and MSP430F21x2 have 256 bytes of information flash memory located in the

memory range of 0x1000 to 0x10FF. While the total memory size is the same, the memory is organized

differently. The MSP430F12x(2) device information memory consists of two flash segments (INFOA and

INFOB) that are 128 bytes each, whereas the MSP430F21x2 has four segments (INFOA, INFOB, INFOC,

and INFOD) that are 64 bytes each.

Applications storing data in the information memory need to consider the different segment sizes. Each

information flash memory segment must be erased individually, resulting in four write accesses on an

MSP430F21x2 instead of two on the MSP430F12x(2). Also, note that the MSP430F21x2 INFOA segment

is protected by a lock feature and requires special treatment to be erased or written to. However, in

general, it is not recommended to erase INFOA or store any user data in it. INFOA comes with

factory-provided device-specific calibration data organized in a tag-length-value (TLV) structure, such as to

generate specific frequencies using the DCO or to calibrate the ADC10. Chances are that an application

can benefit from those constants.

See the MSP430x2xx Family User’s Guide [2] for more details on the organization of the 2xx information

flash memory, the TLV structure, and the INFOA lock feature.

4Migrating From MSP430F12x(2) to MSP430F21x2 SLAA421–October 2009

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MSP430F12x(2) to MSP430F21x2 Migration – Firmware Considerations

3.2 Serial Communication – USART Versus USCI

One of the major differences between MSP430F12x(2) and MSP430F21x2 devices is the serial

communication module. On the MSP430F21x2, the USCI module is implemented. It is the next-generation

MSP430 communication module, offering more features and functionality to the user. USART and USCI

modules are not software compatible and, therefore, MSP430F12x(2) software using the USART module

needs to be adapted to make use of the USCI module.

The MSP430F21x2 features one USCI module, which provides two communication channels that operate

simultaneously. With the MSP430F21x2, for example, it is possible to service two SPI communication

channels or one I2C plus one UART channel, simultaneously. Note that I2C operation is a mode that was

not available on MSP430F12x(2) devices.

It is not in the scope of this application report to discuss all possible aspects regarding migrating

application code to use the USCI interface; however, a few items are outlined to highlight major

differences between the devices (and the modules). In general, it is strongly recommended to carefully

review both module descriptions in the appropriate device family user’s guide [1][2], as well as to use the

USCI code examples provided in the product folders on the MSP430 web page (www.msp430.com) as a

starting point for any code that is newly created.

3.2.1 UART Mode

The operation of the MSP430F21x2 USCI in UART mode and that of the MSP430F12x(2) USART are

almost identical. The major differences are:

• The MSP430F21x2 USCI uses a different baud rate generator. It utilizes a new modulation scheme,

provides a two-stage modulator, and can be used to implement an oversampling baud rate generation

scheme. During application migration, the baud rate register settings need to be recalculated.

However, it is safe to say that the USCI module can be used to generate the same target baud rate

using the same clock source that the MSP430F12x(2) USART would be able to provide.

• The start edge detection and clock activation schemes are different on the two devices. The

MSP430F21x(2) features a simplified scheme whereby the USCI module automatically activates the

USCI module clock source upon start edge detection and then provides an interrupt to wake up the

CPU after the entire character has been received. On the MSP430F12x(2) UART, an interrupt is

generated directly upon start edge detection, the application needs to handle the clock source

activation itself, and then, as a second step, the character reception.

• On the MSP430F21x2 USCI, interrupt flags are no longer cleared automatically upon entering the

interrupt service routine.

3.2.2 SPI Mode

The operation of the MSP430F21x2 USCI in SPI mode and the MSP430F12x(2) USART is almost

identical. The major differences are:

• The MSP430F12x(2) USART supports one channel of SPI communication (USART0), whereas the

MSP430F21x2 USCI supports two channels (USCI_A0 and USCI_B0).

• On the MSP430F21x2 USCI, interrupt flags are no longer cleared automatically upon entering the

interrupt service routine.

• The MSP430F21x2 USCI defaults to an LSB-first SPI bit order. The bit order can be configured with

the UCMSB bit in the UCA0CTL0/UCB0CTL0 control registers. This is different from the UART

module, where the bit order is MSB first and cannot be configured.

• The maximum MSP430F21x2 USCI bit clock frequency in SPI master mode is BRCLK, whereas on the

MSP430F12x(2) USART module it is BRCLK/2.

SLAA421–October 2009 Migrating From MSP430F12x(2) to MSP430F21x2

MSP430F12x(2) to MSP430F21x2 Migration – Firmware Considerations

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3.3 Clock System

3.3.1 LFXT1 Oscillator

The MSP430F21x2 oscillator block supersedes the ones found on MSP430F12x(2) devices. The

MSP430F21x2 oscillator can operate with the same low- and high-frequency oscillators and clock sources,

but consumes less power in low-frequency (LF) mode while providing increased robustness through a

higher oscillation allowance. In addition, built-in software-configurable crystal load capacitors are provided

in LF mode. The power-on default for the effective load capacitance in LF mode is 6 pF, which is in line

with the MSP430F12x(2) LF oscillator.

When migrating designs that use external crystals or clock sources, items to keep in mind are:

• The capability of MSP430F21x2 devices to detect low-frequency oscillator failures and indicate them

by setting the LFXT1OF flag results in another path for the global oscillator fault flag (OFIFG) to

become set. This may prevent the CPU from being clocked by a crystal or an external clock source in

certain scenarios.

• If the existing MSP430F12x(2) design uses an external 32-kHz crystal for low-power mode operation

and periodic wakeup (LPM3), and crystal-accurate precision is not required, the MSP430F21x2 built-in

VLO oscillator can be used instead, resulting in the elimination of the external crystal and a reduced

LPM3 power consumption. The VLO frequency is approximately 12 kHz (data sheet typical value) but

can be measured and calibrated. For more details, see reference [7].

• If an external digital clock source is used, the MSP430F21x2 newly available direct digital clock input

mode should be used (by setting the LFXT1S1 and LFXT1S0 control bits).

• If the existing MSP430F12x(2) design uses a high-frequency crystal or resonator on LFXT1, the

appropriate frequency range must be configured in the MSP430F21x2 clock system control register

BCSCTL3. The default range setting is for use with 0.4-MHz to 1-MHz crystals or resonators. See the

Basic Clock Module+ user's guide chapter for further details. [2]

• This is a good opportunity to double-check that the hardware design recommendations given in the

MSP430 32-kHz Crystal Oscillators application report are closely followed and changes are made if

necessary to ensure best-possible application performance. [6]

3.3.2 Digitally Controlled Oscillator (DCO)

The MSP430F12x(2) and MSP430F21x2 have different DCO modules. The MSP430F21x2 DCO offers

higher accuracy, an extended frequency range allowing operation of the device up to the maximum

operating frequency, and factory-provided calibration constants to facilitate the design of systems that

operate without external clock sources.

The key points that should be considered during migration are:

• The default DCO frequency of an MSP430F12x(2) device is in the 800-kHz range, but it is in the

1.2-MHz range for an MSP430F21x2 device. This needs to be considered for applications that run the

device using the default DCO settings.

• On an MSP430F21x2, consider loading the factory-provided DCO calibration constants into the DCO

control registers to achieve a deterministic and stable output frequency. The use of DCO calibration

constants eliminates the need for software-FLL algorithms that are used in combination with an

external clock source on MSP430F12x(2) devices.

• The MSP430F12x(2) has three bits to control the fundamental frequency range (RSELx in the

BCSCTL1 register), whereas the MSP430F21x2 has four control bits. Care must be taken when

porting algorithms such as a software FLL that modify these bits.

• If an MSP430F12x(2) application applies hard-coded DCOx, MODx, and RSELx values to the DCO

control registers, this results in a different frequency range on an MSP430F21x2.

• When enabling the external resistor DCO bias feature (by setting DCOR in the BCSCTL2 register), the

MSP430F21x2 DCO starts behaving like an MSP430F12x(2) DCO. In this mode, the same bit settings

and external bias resistors result in the same frequency being generated. See the device-specific data

sheets for further details. [3][4][5]

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MSP430F12x(2) to MSP430F21x2 Migration – Firmware Considerations

3.4 Bootstrap Loader (BSL)

MSP430F21x2 devices have a new BSL firmware with enhanced security features. Both MSP430F12x(2)

and MSP430F21x2 device memory access is protected by a 256-bit password. However, only

MSP430F21x2 devices erase the entire device flash memory contents (including the factory-provided

calibration constants stored in the INFOA flash segment) on the first attempt to access the device with an

incorrect password. This behavior is configurable and needs to be considered for applications that use the

BSL interface to provide in-field software upgrade capability.

3.5 Interrupt Vectors

The interrupt vector arrangement of MSP430F12x(2) and MSP430F21x2 devices is identical for a given

peripheral module and does not require special attention from a low-level perspective. In general,

recompiling the MSP430F12x(2) application code using MSP430F21x2 device support files automatically

takes care of populating the interrupt vector table according to the device-specific requirements. However

depending on how the interrupt vectors are assigned, it may become necessary to migrate the symbolic

names used to allocate the timer interrupts (see Section 3.7 for more information).

Also, the memory range that is reserved for interrupt vectors (interrupt vector table) differs between

MSP430F12x(2) and MSP430F21x2 devices. For MSP430F12x(2) devices, this memory ranges from

address 0xFFE0 to 0xFFFF (16 words), whereas for MSP430F21x2 devices, it ranges from 0xFFC0 to

0xFFFF (32 words). In addition to this, the word memory location 0xFFDE is reserved on MSP430F21x2

devices and used as the BSL security key (BSLSKEY, also see Section 3.4).

3.6 Beware of Reserved Bits!

The MSP430F21x2 features a range of upgraded peripherals as compared to the MSP430F12x(2), such

as the BCS+ and the Comparator_A+. This added functionality is partially achieved through the use of bits

which were previously marked "reserved" on the corresponding MSP430F1xx peripheral. Newer

generation MSP430s such as the MSP430F21x2 make use of these bits to implement additional

functionality. If left in the default state, the peripheral usually behaves the same as its MSP430F1xx

counterpart. However care must be taken to not unintentionally switch some of these bits, which can be

caused by migrated MSP430F12x(2) firmware. For example, consider the following comparison of

CACTL2 control register of Comparator_A and Comparator_A+:

76543210

Unused P2CA1 P2CA0 CAF CAOUT

rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) r-(0)

Figure 1. CACTL2 Bit Description, 1xx Devices

76543210

CASHORT P2CA4 P2CA3 P2CA2 P2CA1 P2CA0 CAF CAOUT

rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) r-(0)

Figure 2. CACTL2 Bit Description, 2xx Devices

When firmware that uses the comparator module sets bit 7 and runs fine on an MSP430F12x is executed

on an MSP430F21x2 device, it results in the comparator inputs being shorted together internally.

3.7 Timer

MSP430F12x(2) devices have one 16-bit timer module with three capture/compare blocks (Timer_A3).

However MSP430F21x2 devices have two independent Timer_A modules, one 16-bit timer module with

three capture compare blocks (Timer0_A3), and one 16-bit timer module with two capture/compare blocks

(Timer1_A2). During migration, the Timer_A3 module of the MSP430F12x(2) can be substituted

seamlessly by the Timer0_A3 module of the MSP430F21x2. Since re-building of the application software

using the updated MS430F21x2-specific device support files is strongly recommended, it is necessary to

migrate the definitions used to assign the interrupt vectors in C using the "#pragma vector =" compiler

SLAA421–October 2009 Migrating From MSP430F12x(2) to MSP430F21x2

References

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directive to the new names. The definitions TIMERA0_VECTOR and TIMERA1_VECTOR used on the

MSP430F12x(2) need to be changed to TIMER0_A0_VECTOR and TIMER0_A1_VECTOR on the

MSP430F21x2. Although the timer register names have changed as well (e.g., TACTL now is TA0CTL), it

is not required to change them in the source code since the msp430x21x2.h device header file contains

macros that map the MSP430F12x(2) specific register names to the MSP430F21x2.

An undocumented feature on the MSP430F12x(2) allows the Timer_A module to be used in capture mode

to generate interrupts on input signal transitions with the timer in stop mode (MCx in TACTL is set to 00h).

This feature is no longer available on MSP430F21x2 devices. To generate capture interrupts, the

respective MSP430F21x2 timer must be running. In this specific use case, consider clocking the timer

using a low frequency (e.g., ACLK) to minimize power consumption.

3.8 Analog Comparator

On the Comparator of MSP430F12x devices, disabling the digital port functionality for an I/O pin by setting

the associated bit in the Port Disable Register CAPD to prevent parasitic cross currents during analog

measurements disables the digital CMOS input buffer. However, on MSP430F21x2 devices with

Comparator_A+, setting a CAPDx bit disables both input and output buffer for that pin.

4 References

1. MSP430x1xx Family User’s Guide (SLAU049)

2. MSP430x2xx Family User’s Guide (SLAU144)

3. MSP430x12x Data Sheet (SLAS312)

4. MSP430x11x2, MSP430x12x2 Data Sheet (SLAS361)

5. MSP430x21x2 Data Sheet (SLAS578)

6. MSP430 32-kHz Crystal Oscillators (SLAA322)

7. Using the VLO Library (SLAA340)

8. MSP430 Hardware Tools User's Guide (SLAU278)

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ResaleofTIproductsorserviceswithstatementsdifferentfromorbeyondtheparametersstatedbyTIforthatproductorservicevoidsall

expressandanyimpliedwarrantiesfortheassociatedTIproductorserviceandisanunfairanddeceptivebusinesspractice.TIisnot

responsibleorliableforanysuchstatements.

TIproductsarenotauthorizedforuseinsafety-criticalapplications(suchaslifesupport)whereafailureoftheTIproductwouldreasonably

beexpectedtocauseseverepersonalinjuryordeath,unlessofficersofthepartieshaveexecutedanagreementspecificallygoverning

suchuse.Buyersrepresentthattheyhaveallnecessaryexpertiseinthesafetyandregulatoryramificationsoftheirapplications,and

acknowledgeandagreethattheyaresolelyresponsibleforalllegal,regulatoryandsafety-relatedrequirementsconcerningtheirproducts

andanyuseofTIproductsinsuchsafety-criticalapplications,notwithstandinganyapplications-relatedinformationorsupportthatmaybe

providedbyTI.Further,BuyersmustfullyindemnifyTIanditsrepresentativesagainstanydamagesarisingoutoftheuseofTIproductsin

suchsafety-criticalapplications.

TIproductsareneitherdesignednorintendedforuseinmilitary/aerospaceapplicationsorenvironmentsunlesstheTIproductsare

specificallydesignatedbyTIasmilitary-gradeor"enhancedplastic."OnlyproductsdesignatedbyTIasmilitary-grademeetmilitary

specifications.BuyersacknowledgeandagreethatanysuchuseofTIproductswhichTIhasnotdesignatedasmilitary-gradeissolelyat

theBuyer'srisk,andthattheyaresolelyresponsibleforcompliancewithalllegalandregulatoryrequirementsinconnectionwithsuchuse.

TIproductsareneitherdesignednorintendedforuseinautomotiveapplicationsorenvironmentsunlessthespecificTIproductsare

designatedbyTIascompliantwithISO/TS16949requirements.Buyersacknowledgeandagreethat,iftheyuseanynon-designated

productsinautomotiveapplications,TIwillnotberesponsibleforanyfailuretomeetsuchrequirements.

FollowingareURLswhereyoucanobtaininformationonotherTexasInstrumentsproductsandapplicationsolutions:

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