TL/F/9925
54AC/74AC138 #54ACT/74ACT138 1-of-8 Decoder/Demultiplexer
March 1993
54AC/74AC138 #54ACT/74ACT138
1-of-8 Decoder/Demultiplexer
General Description
The ’AC/’ACT138 is a high-speed 1-of-8 decoder/demulti-
plexer. This device is ideally suited for high-speed bipolar
memory chip select address decoding. The multiple input
enables allow parallel expansion to a 1-of-24 decoder using
just three ’AC/’ACT138 devices or a 1-of-32 decoder using
four ’AC/’ACT138 devices and one inverter.
Features
YICC reduced by 50%
YDemultiplexing capability
YMultiple input enable for easy expansion
YActive LOW mutually exclusive outputs
YOutputs source/sink 24 mA
Y’ACT138 has TTL-compatible inputs
YStandard Military Drawing (SMD)
Ð ’AC138: 5962-87622
Ð ’ACT138: 5962-87554
Logic Symbols
TL/F/99251
IEEE/IEC
TL/F/99257
Connection Diagrams
Pin Assignment
for DIP, Flatpak and SOIC
TL/F/99252
Pin Assignment
for LCC
TL/F/99253
Pin Names Description
A0–A2Address Inputs
E1–E2Enable Inputs
E3Enable Input
O0–O7Outputs
FACTTM is a trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Functional Description
The ’AC/’ACT138 high-speed 1-of-8 decoder/demultiplexer
accepts three binary weighted inputs (A0,A
1
,A
2
) and, when
enabled, provides eight mutually exclusive active-LOW out-
puts (O0–O7). The ’AC/’ACT138 features three Enable in-
puts, two active-LOW (E1,E
2
) and one active-HIGH (E3). All
outputs will be HIGH unless E1and E2are LOW and E3is
HIGH. This multiple enable function allows easy parallel ex-
pansion of the device to a 1-of-32 (5 lines to 32 lines)
decoder with just four ’AC/’ACT138 devices and one invert-
er (see
Figure 1
). The ’AC/’ACT138 can be used as an 8-
output demultiplexer by using one of the active LOW Enable
inputs as the data input and the other Enable inputs as
strobes. The Enable inputs which are not used must be per-
manently tied to their appropriate active-HIGH or active-
LOW state.
Truth Table
Inputs Outputs
E1E2E3A0A1A2O0O1O2O3O4O5O6O7
HXXXXXHHHHHHHH
XHXXXXHHHHHHHH
XXLXXXHHHHHHHH
LLHL L L LHHHHHHH
LLHHL LHLHHHHHH
LLHLHLHHLHHHHH
LLHHHLHHHLHHHH
LLHL LHHHHHLHHH
LLHHLHHHHHHLHH
LLHLHHHHHHHHLH
LLHHHHHHHHHHHL
H
e
HIGH Voltage Level
LeLOW Voltage Level
XeImmaterial
Logic Diagram
TL/F/99254
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
TL/F/99255
FIGURE 1. Expansion to 1-of-32 Decoding
3
Absolute Maximum Rating (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)b0.5V to a7.0V
DC Input Diode Current (IIK)
VIeb
0.5V b20 mA
VIeVCC a0.5V a20 mA
DC Input Voltage (VI)b0.5V to VCC a0.5V
DC Output Diode Current (IOK)
VOeb
0.5V b20 mA
VOeVCC a0.5V a20 mA
DC Output Voltage (VO)b0.5V to VCC a0.5V
DC Output Source
or Sink Current (IO)g50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND)g50 mA
Storage Temperature (TSTG)b65§Ctoa
150§C
Junction Temperature (TJ)
CDIP 175§C
PDIP 140§C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACTTM circuits outside databook specifications.
Recommended Operating
Conditions
Supply Voltage (VCC)
’AC 2.0V to 6.0V
’ACT 4.5V to 5.5V
Input Voltage (VI) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
74AC/ACT b40§Ctoa
85§C
54AC/ACT b55§Ctoa
125§C
Minimum Input Edge Rate (DV/Dt)
’AC Devices
VIN from 30% to 70% of VCC
VCC @3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate (DV/Dt)
’ACT Devices
VIN from 0.8V to 2.0V
VCC @4.5V, 5.5V 125 mV/ns
DC Characteristics for ’AC Family Devices
74AC 54AC 74AC
Symbol Parameter VCC TAea
25§CTAeTAeUnits Conditions
(V) b55§Ctoa
125§Cb40§Ctoa
85§C
Typ Guaranteed Limits
VIH Minimum High Level 3.0 1.5 2.1 2.1 2.1 VOUT e0.1V
Input Voltage 4.5 2.25 3.15 3.15 3.15 V or VCC b0.1V
5.5 2.75 3.85 3.85 3.85
VIL Maximum Low Level 3.0 1.5 0.9 0.9 0.9 VOUT e0.1V
Input Voltage 4.5 2.25 1.35 1.35 1.35 V or VCC b0.1V
5.5 2.75 1.65 1.65 1.65
VOH Minimum High Level 3.0 2.99 2.9 2.9 2.9 IOUT eb
50 mA
Output Voltage 4.5 4.49 4.4 4.4 4.4 V
5.5 5.49 5.4 5.4 5.4
*VIN eVIL or VIH
3.0 2.56 2.4 2.46 b12 mA
4.5 3.86 3.7 3.76 V IOH b24 mA
5.5 4.86 4.7 4.76 b24 mA
VOL Maximum Low Level 3.0 0.002 0.1 0.1 0.1 IOUT e50 mA
Output Voltage 4.5 0.001 0.1 0.1 0.1 V
5.5 0.001 0.1 0.1 0.1
*VIN eVIL or VIH
3.0 0.36 0.50 0.44 12 mA
4.5 0.36 0.50 0.44 V IOL 24 mA
5.5 0.36 0.50 0.44 24 mA
IIN Maximum Input 5.5 g0.1 g1.0 g1.0 mAVIeVCC, GND
Leakage Current
*All outputs loaded; thresholds on input associated with output under test.
4
DC Characteristics for ’AC Family Devices (Continued)
74AC 54AC 74AC
Symbol Parameter VCC TAea
25§CTAeTAeUnits Conditions
(V) b55§Ctoa
125§Cb40§Ctoa
85§C
Typ Guaranteed Limits
IOLD ²Minimum Dynamic 5.5 50 75 mA VOLD e1.65V Max
IOHD Output Current 5.5 b50 b75 mA VOHD e3.85V Min
ICC Maximum Quiescent 5.5 4.0 80.0 40.0 mAVIN eVCC
Supply Current or GND
²Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @3.0V are guaranteed to be less than or equal to the respective limit @5.5V VCC.
ICC for 54AC @25§C is identical to 74AC @25§C.
DC Characteristics for ’ACT Family Devices
74ACT 54ACT 74ACT
Symbol Parameter VCC TAea
25§CTAeTAeUnits Conditions
(V) b55§Ctoa
125§Cb40§Ctoa
85§C
Typ Guaranteed Limits
VIH Minimum High Level 4.5 1.5 2.0 2.0 2.0 VVOUT e0.1V
Input Voltage 5.5 1.5 2.0 2.0 2.0 or VCC b0.1V
VIL Maximum Low Level 4.5 1.5 0.8 0.8 0.8 VVOUT e0.1V
Input Voltage 5.5 1.5 0.8 0.8 0.8 or VCC b0.1V
VOH Minimum High Level 4.5 4.49 4.4 4.4 4.4 VIOUT eb
50 mA
Output Voltage 5.5 5.49 5.4 5.4 5.4
*VIN eVIL or VIH
4.5 3.86 3.70 3.76 VI
OH
b24 mA
5.5 4.86 4.70 4.76 b24 mA
VOL Maximum Low Level 4.5 0.001 0.1 0.1 0.1 VIOUT e50 mA
Output Voltage 5.5 0.001 0.1 0.1 0.1
*VIN eVIL or VIH
4.5 0.36 0.50 0.44 VI
OL
24 mA
5.5 0.36 0.50 0.44 24 mA
IIN Maximum Input 5.5 g0.1 g1.0 g1.0 mAV
I
e
V
CC, GND
Leakage Current
ICCT Maximum 5.5 0.6 1.6 1.5 mA VIeVCC b2.1V
ICC/Input
IOLD ²Minimum Dynamic 5.5 50 75 mA VOLD e1.65V Max
IOHD Output Current 5.5 b50 b75 mA VOHD e3.85V Min
ICC Maximum Quiescent 5.5 4.0 80.0 40.0 mAVIN eVCC
Supply Current or GND
*All outputs loaded; thresholds on input associated with output under test.
²Maximum test duration 2.0 ms, one output loaded at a time.
Note: ICC for 54ACT @25§C is identical to 74ACT @25§C.
5
AC Electrical Characteristics
74AC 54AC 74AC
VCC*TAea
25§CTAeb
55§CT
A
eb
40§C
Symbol Parameter (V) CLe50 pF to a125§Cto
a
85§C Units
CLe50 pF CLe50 pF
Min Typ Max Min Max Min Max
tPLH Propagation Delay 3.3 1.5 8.5 13.0 1.0 16.0 1.5 15.0 ns
Anto On5.0 1.5 6.5 9.5 1.5 12.0 1.5 10.5
tPHL Propagation Delay 3.3 1.5 8.0 12.5 1.0 15.0 1.5 14.0 ns
Anto On5.0 1.5 6.0 9.0 1.5 11.5 1.5 10.5
tPLH Propagation Delay 3.3 1.5 11.0 15.0 1.0 16.5 1.5 16.0 ns
E1or E2to On5.0 1.5 8.0 11.0 1.5 13.0 1.5 12.0
tPHL Propagation Delay 3.3 1.5 9.5 13.5 1.0 15.5 1.5 15.0 ns
E1or E2to On5.0 1.5 7.0 9.5 1.5 12.0 1.5 10.5
tPLH Propagation Delay 3.3 1.5 11.0 15.5 1.0 17.0 1.5 16.5 ns
E3to On5.0 1.5 8.0 11.0 1.5 13.5 1.5 12.5
tPHL Propagation Delay 3.3 1.5 8.5 13.0 1.0 15.0 1.5 14.0 ns
E3to On5.0 1.5 6.0 8.0 1.5 11.0 1.0 9.5
*Voltage Range 3.3 is 3.3V g0.3V
Voltage Range 5.0 is 5.0V g0.5V
AC Electrical Characteristics
74ACT 54ACT 74ACT
VCC*TAea
25§CTAeb
55§CT
A
eb
40§C
Symbol Parameter (V) CLe50 pF to a125§Cto
a
85§C Units
CLe50 pF CLe50 pF
Min Typ Max Min Max Min Max
tPLH Propagation Delay 5.0 1.5 7.0 10.5 1.5 12.5 1.5 11.5 ns
Anto On
tPHL Propagation Delay 5.0 1.5 6.5 10.5 1.5 12.5 1.5 11.5 ns
Anto On
tPLH Propagation Delay 5.0 2.5 8.0 11.5 1.5 13.5 2.0 12.5 ns
E1or E2to On
tPHL Propagation Delay 5.0 2.0 7.5 11.5 1.5 12.5 2.0 12.5 ns
E1or E2to On
tPLH Propagation Delay 5.0 2.5 8.0 12.0 1.5 14.0 2.0 13.0 ns
E3to On
tPHL Propagation Delay 5.0 2.0 6.5 10.5 1.5 12.0 1.5 11.5 ns
E3to On
*Voltage Range 5.0 is 5.0V g0.5V
Capacitance
Symbol Parameter Typ Units Conditions
CIN Input Capacitance 4.5 pF VCC eOPEN
CPD Power Dissipation 60.0 pF VCC e5.0V
Capacitance
6
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74ACT 138 P C QR
Temperature Range Family Special Variations
74AC eCommercial X eDevices shipped in 13×reels
54AC eMilitary QR eCommercial grade device
74ACT eCommercial TTL-Compatible with burn-in
54ACT eMilitary TTL-Compatible QB eMilitary grade device with
environmental and burn-in
Device Type processing shipped in tubes
Package Code Temperature Range
PePlastic DIP CeCommercial (b40§Ctoa
85§C)
DeCeramic DIP MeMilitary (b55§Ctoa
125§C)
FeFlatpak
LeLeadless Ceramic Chip Carrier (LCC)
SeSmall Outline (SOIC)
7
Physical Dimensions inches (millimeters)
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
8
Physical Dimensions inches (millimeters) (Continued)
16 Lead Small Outline Integrated Circuit (S)
NS Package Number M16A
16 Lead Plastic Dual-In-Line Package (P)
NS Package Number N16E
9
54AC/74AC138 #54ACT/74ACT138 1-of-8 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) (Continued)
16 Lead Ceramic Flatpak (F)
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
National Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor
Corporation GmbH Japan Ltd. Hong Kong Ltd. Do Brazil Ltda. (Australia) Pty, Ltd.
2900 Semiconductor Drive Livry-Gargan-Str. 10 Sumitomo Chemical 13th Floor, Straight Block, Rue Deputado Lacorda Franco Building 16
P.O. Box 58090 D-82256 F4urstenfeldbruck Engineering Center Ocean Centre, 5 Canton Rd. 120-3A Business Park Drive
Santa Clara, CA 95052-8090 Germany Bldg. 7F Tsimshatsui, Kowloon Sao Paulo-SP Monash Business Park
Tel: 1(800) 272-9959 Tel: (81-41) 35-0 1-7-1, Nakase, Mihama-Ku Hong Kong Brazil 05418-000 Nottinghill, Melbourne
TWX: (910) 339-9240 Telex: 527649 Chiba-City, Tel: (852) 2737-1600 Tel: (55-11) 212-5066 Victoria 3168 Australia
Fax: (81-41) 35-1 Ciba Prefecture 261 Fax: (852) 2736-9960 Telex: 391-1131931 NSBR BR Tel: (3) 558-9999
Tel: (043) 299-2300 Fax: (55-11) 212-1181 Fax: (3) 558-9998
Fax: (043) 299-2500
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.