The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D500-mA-Rated Collector Current
(Single Output)
DHigh-Voltage Outputs ...50 V
DOutput Clamp Diodes
DInputs Compatible With Various Types of
Logic
DRelay-Driver Applications
description/ordering information
The ULN2001A, ULN2002A, ULN2003A,
ULN2004A, ULQ2003A, and ULQ2004A are
high-voltage, high-current Darlington transistor
arrays. Each consists of seven npn Darlington
pairs that feature high-voltage outputs
with common-cathode clamp diodes for switching inductive loads. The collector-current rating of a single
Darlington pair is 500 mA. The Darlington pairs can be paralleled for higher current capability. Applications
include relay drivers, hammer drivers, lamp drivers, display drivers (LED and gas discharge), line drivers, and
logic buffers. For 100-V (otherwise interchangeable) versions of the ULN2003A and ULN2004A, see the
SN75468 and SN75469, respectively.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
ULN2002AN ULN2002AN
PDIP (N) Tube of 25 ULN2003AN ULN2003AN
PDIP (N)
Tube of 25
ULN2004AN ULN2004AN
Tube of 40 ULN2003AD
ULN2003A
SOIC (D)
Reel of 2500 ULN2003ADR ULN2003A
−20°C to 70°CSOIC (D) Tube of 40 ULN2004AD
ULN2004A
−20 C to 70 C
Reel of 2500 ULN2004ADR ULN2004A
SOP (NS)
Reel of 2000
ULN2003ANSR ULN2003A
SOP (NS) Reel of 2000 ULN2004ANSR ULN2004A
TSSOP (PW)
Tube of 90 ULN2003APW
UN2003A
TSSOP (PW) Reel of 2000 ULN2003APWR UN2003A
PDIP (N)
Tube of 25
ULQ2003AN ULQ2003A
PDIP (N) Tube of 25 ULQ2004AN ULQ2004AN
−40°C to 85°C
Tube of 40 ULQ2003AD ULQ2003A
−40°C to 85°C
SOIC (D)
Reel of 2500 ULQ2003ADR ULQ2003A
SOIC (D) Tube of 40 ULQ2004AD ULQ2004A
Reel of 2500 ULQ2004ADR ULQ2004A
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
!" # $%&" !# '%()$!" *!"&+
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"&#"0 !)) '!!&"&#+
ULN2001A ...D OR N PACKAGE
ULN2002A ...N PACKAGE
ULN2003A . . . D, N, NS, OR PW PACKAGE
ULN2004A . . . D, N, OR NS PACKAGE
ULQ2003A, ULQ2004A ...D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
2B
3B
4B
5B
6B
7B
E
1C
2C
3C
4C
5C
6C
7C
COM
'*%$"# $')!" " 12344 !)) '!!&"&# !& "&#"&*
%)&## ",&.#& "&*+ !)) ",& '*%$"# '*%$"
'$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
The ULN2001A is a general-purpose array and can be used with TTL and CMOS technologies. The ULN2002A
is designed specifically for use with 14-V to 25-V PMOS devices. Each input of this device has a Zener diode
and resistor in series to control the input current to a safe limit. The ULN2003A and ULQ2003A have a 2.7-kΩ
series base resistor for each Darlington pair for operation directly with TTL or 5-V CMOS devices. The
ULN2004A and ULQ2004A have a 10.5-kΩ series base resistor to allow operation directly from CMOS devices
that use supply voltages of 6 V to 15 V. The required input current of the ULN/ULQ2004A is below that of the
ULN/ULQ2003A, and the required voltage is less than that required by the ULN2002A.
logic diagram
7C
6C
5C
4C
3C
2C
1C
COM
7
6
5
4
3
2
1
7B
6B
5B
4B
3B
2B
1B
10
11
12
13
14
15
16
9
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics (each Darlington pair)
Input
B
Output
C
COM
E
ULN2001A
7.2 kΩ3 kΩ
Outpu
t
C
COM
E
ULN2002A
7.2 kΩ
3 kΩ
10.5 kΩ
7 V
Input
B
Output
C
COM
E
ULN2003A, ULN2004A, ULQ2003A, ULQ2004A
7.2 kΩ3 kΩ
RB
Input
B
ULN/ULQ2003A: RB = 2.7 kΩ
ULN/ULQ2004A: RB = 10.5 kΩ
All resistor values shown are nominal.
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings at 25°C free-air temperature (unless otherwise noted)†
Collector-emitter voltage 50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clamp diode reverse voltage (see Note 1) 50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI (see Note 1) 30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak collector current (see Figures 14 and 15) 500 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK 500 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total emitter-terminal current −2.5 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA, ULN200xA −20°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ULQ200xA −40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ULQ200xAT −40°C to 105°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJC (see Notes 4 and 5): D package 36°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 54°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) − TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
5. The package thermal impedance is calculated in accordance with MIL-STD-883.
electrical characteristics, TA = 25°C (unless otherwise noted)
PARAMETER
TEST
TEST CONDITIONS
ULN2001A ULN2002A
UNIT
PARAMETER
TEST
FIGURE
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
VI(on) On-state input voltage 6 VCE = 2 V, IC = 300 mA 13 V
Collector-emitter
II = 250 µA, IC = 100 mA 0.9 1.1 0.9 1.1
V
CE(sat)
Collector-emitter
saturation voltage
5II = 350 µA, IC = 200 mA 1 1.3 1 1.3 V
VCE(sat)
saturation voltage
5
II = 500 µA, IC = 350 mA 1.2 1.6 1.2 1.6
V
VFClamp forward voltage 8 IF = 350 mA 1.7 2 1.7 2 V
1 VCE = 50 V, II = 0 50 50
I
CEX
Collector cutoff current
2
VCE = 50 V,
II = 0 100 100 µA
ICEX
Collector cutoff current
2
VCE = 50 V,
TA = 70°CVI = 6 V 500
µA
II(off)
Off-state input current
3
VCE = 50 V,
I
C
= 500 µA
,
50
65
50
65
A
II(off) Off-state input current 3
VCE = 50 V,
TA = 70°C
IC = 500 µA,
50 65 50 65 µA
IIInput current 4 VI = 17 V 0.82 1.25 mA
IR
Clamp reverse current
7
VR = 50 V, TA = 70°C 100 100
A
IRClamp reverse current 7 VR = 50 V 50 50 µA
hFE Static forward-current
transfer ratio 5 VCE = 2 V, IC = 350 mA 1000
CiInput capacitance VI = 0, f = 1 MHz 15 25 15 25 pF
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, TA = 25°C (unless otherwise noted) (continued)
PARAMETER
TEST
TEST CONDITIONS
ULN2003A ULN2004A
UNIT
PARAMETER
TEST
FIGURE
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
IC = 125 mA 5
IC = 200 mA 2.4 6
VI(on)
On-state input voltage
6
VCE = 2 V
IC = 250 mA 2.7
V
VI(on) On-state input voltage 6 VCE = 2 V IC = 275 mA 7V
IC = 300 mA 3
IC = 350 mA 8
Collector-emitter
II = 250 µA, IC = 100 mA 0.9 1.1 0.9 1.1
V
CE(sat)
Collector-emitter
saturation voltage
5II = 350 µA, IC = 200 mA 1 1.3 1 1.3 V
VCE(sat)
saturation voltage
5
II = 500 µA, IC = 350 mA 1.2 1.6 1.2 1.6
V
1 VCE = 50 V, II = 0 50 50
I
CEX
Collector cutoff current
2
VCE = 50 V,
II = 0 100 100 µA
ICEX
Collector cutoff current
2
VCE = 50 V,
TA = 70°CVI = 1 V 500
µA
VFClamp forward voltage 8 IF = 350 mA 1.7 2 1.7 2 V
II(off)
Off-state input current
3
VCE = 50 V,
IC = 500 µA,
50
65
50
65
A
II(off) Off-state input current 3
VCE = 50 V,
TA = 70°C
IC = 500 µA,
50 65 50 65 µA
VI = 3.85 V 0.93 1.35
I
I
Input current 4 VI = 5 V 0.35 0.5 mA
II
Input current
4
VI = 12 V 1 1.45
mA
IR
Clamp reverse current
7
VR = 50 V 50 50
A
IRClamp reverse current 7 VR = 50 V, TA = 70°C 100 100 µA
CiInput capacitance VI = 0, f = 1 MHz 15 25 15 25 pF
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST
TEST CONDITIONS
ULQ2003A ULQ2004A
UNIT
PARAMETER
TEST
FIGURE
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
IC = 125 mA 5
IC = 200 mA 2.7 6
VI(on)
On-state input voltage
6
VCE = 2 V
IC = 250 mA 2.9
V
VI(on) On-state input voltage 6 VCE = 2 V IC = 275 mA 7V
IC = 300 mA 3
IC = 350 mA 8
Collector-emitter
II = 250 µA, IC = 100 mA 0.9 1.2 0.9 1.1
V
CE(sat)
Collector-emitter
saturation voltage
5II = 350 µA, IC = 200 mA 1 1.4 1 1.3 V
VCE(sat)
saturation voltage
5
II = 500 µA, IC = 350 mA 1.2 1.7 1.2 1.6
V
1 VCE = 50 V, II = 0 100 50
I
CEX
Collector cutoff current
2
VCE = 50 V
II = 0 100 µA
ICEX
Collector cutoff current
2 VCE = 50 V VI = 1 V 500
µA
VFClamp forward voltage 8 IF = 350 mA 1.7 2.3 1.7 2 V
II(off)
Off-state input current
3
VCE = 50 V,
IC = 500 A
65
50
65
A
I
I(off)
Off-state input current 3 V
CE
= 50 V, I
C
= 500 µA 65 50 65 µA
VI = 3.85 V 0.93 1.35
I
I
Input current 4 VI = 5 V 0.35 0.5 mA
II
Input current
4
VI = 12 V 1 1.45
mA
IR
Clamp reverse current
7
VR = 50 V, TA = 25°C 100 50
A
IRClamp reverse current 7 VR = 50 V 100 100 µA
CiInput capacitance VI = 0, f = 1 MHz 15 25 15 25 pF
switching characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
ULN2001A, ULN2002A,
ULN2003A, ULN2004A
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
tPLH Propagation delay time, low- to high-level output See Figure 9 0.25 1 µs
tPHL Propagation delay time, high- to low-level output See Figure 9 0.25 1 µs
VOH High-level output voltage after switching VS = 50 V,
See Figure 10 IO ≈ 300 mA, VS−20 mV
switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
ULQ2003A, ULQ2004A
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
tPLH Propagation delay time, low- to high-level output See Figure 9 1 10 µs
tPHL Propagation delay time, high- to low-level output See Figure 9 1 10 µs
VOH High-level output voltage after switching VS = 50 V,
See Figure 10 IO ≈ 300 mA, VS−500 mV
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Open VCE
Open
ICEX
Figure 1. ICEX Test Circuit
Open VCE
VI
ICEX
Figure 2. ICEX Test Circuit
Open VCE
IC
II(off)
Figure 3. II(off) Test Circuit
Open
Open
II(on)
VI
Figure 4. II Test Circuit
Open
VCE IC
II
hFE = IC
II
NOTE: II is fixed for measuring VCE(sat), variable for
measuring hFE.
Figure 5. h
FE
, V
CE(sat)
Test Circuit
Open
VCE IC
VI(on)
Figure 6. VI(on) Test Circuit
VR
Open
IR
Figure 7. IR Test Circuit
IF
VF
Open
Figure 8. VF Test Circuit
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% 50%
50% 50%
tPHL
VOLTAGE WAVEFORMS
Input
Output
tPLH
Figure 9. Propagation Delay-Time Waveforms
Input Open
VS
200 Ω
Output
CL = 15 pF
(see Note B)
ULN2001A Only
2.7 kΩ
90% 90%
1.5 V 1.5 V
10% 10%
40 µs
≤10 ns≤5 ns VIH
(see Note C)
0 V
VOH
VOL
Input
Output
TEST CIRCUIT
VOLTAGE WAVEFORMS
1N3064 2 mH
Pulse
Generator
(see Note A) ULN2002A
ULN/ULQ2003A
ULN/ULQ2004A
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. For testing the ULN2001A, the ULN2003A, and the ULQ2003A, VIH = 3 V; for the ULN2002A, VIH = 13 V;
for the ULN2004A and the ULQ2004A, VIH = 8 V.
Figure 10. Latch-Up Test Circuit and Voltage Waveforms
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 11
COLLECTOR-EMITTER
SATURATION VOLTAGE
vs
COLLECTOR CURRENT
(ONE DARLINGTON)
0
IC − Collector Current − mA
2.5
800
0100 200 300 400 500 600 700
0.5
1
1.5
2
II = 350 µA
II = 500 µA
VCE(sat) − Collector-Emitter Saturation Voltage − V
VCE(sat)
TA = 25°C
II = 250 µA2
1.5
1
0.5
700600500400300200100
0800
2.5
IC(tot) − Total Collector Current − mA
0
COLLECTOR-EMITTER
SATURATION VOLTAGE
vs
TOTAL COLLECTOR CURRENT
(TWO DARLINGTONS IN PARALLEL)
VCE(sat) − Collector-Emitter Saturation Voltage − VVCE(sat)
II = 250 µA
II = 350 µA
II = 500 µA
TA = 25°C
Figure 12
COLLECTOR CURRENT
vs
INPUT CURRENT
0
II − Input Current − µA
500
200
025 50 75 100 125 150 175
50
100
150
200
250
300
350
400
450
VS = 10 V
VS = 8 V
IC − Collector Current − mA
C
I
RL = 10 Ω
TA = 25°C
Figure 13
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THERMAL INFORMATION
Figure 14
0
Duty Cycle − %
600
100
010 20 30 40 50 60 70 80 90
100
200
300
400
500
TA = 70°C
N = Number of Outputs
Conducting Simultaneously
N = 6
N = 7
D PACKAGE
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE
N = 5
N = 3
N = 2
N = 1
IC − Maximum Collector Current − mA
C
I
N = 4
Figure 15
Conducting Simultaneously
N = Number of Outputs
500
400
300
200
100
908070605040302010
0100
600
Duty Cycle − %
0
N = 7
TA = 85°C
N PACKAGE
MAXIMUM COLLECTOR CURRENT
vs
DUTY CYCLE
N = 5
N = 3
N = 2
N = 6
N = 1
IC − Maximum Collector Current − mA
C
I
N = 4
The ULN2001A is obsolete
a
nd is no longer supplied.
SLRS027G − DECEMBER 1976 − REVISED JUNE 2004
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
8
ULN2002A
P-MOS
Output
VSS V
Figure 16. P-MOS to Load
ULN2003A
ULQ2003A
Lam
p
Test
TTL
Output
VCC V
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
7
Figure 17. TTL to Load
VDD V
ULN2004A
ULQ2004A
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
CMOS
Output
7
Figure 18. Buffer for Higher Current Loads
VCC V
RP
ULN2003A
ULQ2003A
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
TTL
Output
7
Figure 19. Use of Pullup Resistors
to Increase Drive Current
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Telephony www.ti.com/telephony
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
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