VND810SPTR-E - STMicroelectronics

October 2010 Doc ID 10880 Rev 3 1/28

VND810SP-E

Double channel high-side driver

Features

■ECOPACK®: lead free and RoHS compliant

■Automotive Grade: compliance with AEC

guidelines

■Very low standby current

■CMOS compatible input

■On-state open-load detection

■Off-state open-load detection

■Thermal shutdown protection and diagnosis

■Undervoltage shutdown

■Overvoltage clamp

■Output stuck to VCC detection

■Load current limitation

■Reverse battery protection

■Electrostatic discharge protection

Description

The VND810SP-E is a monolithic device made by

using STMicroelectronics™ VIPower™ M0-3

technology, intended for driving any kind of load

with one side connected to ground.

Active VCC pin voltage clamp protects the device

against low energy spikes (see ISO7637 transient

compatibility table).

Active current limitation combined with thermal

shutdown and automatic restart protects the

device against overload. The device detects

open-load condition both in on-state and

off-state. Output shorted to VCC is detected in the

off-state. Device automatically turns-off in case of

ground pin disconnection.

Type RDS(on) Iout VCC

VND810SP-E 160 mΩ (1)

1. Per each channel.

3.5 A(1) 36 V

PowerSO-10™

Table 1. Order codes

Package

Order code

Tube Tape and reel

PowerSO-10™ VND810SP-E VND810SPTR-E

www.st.com

Contents VND810SP-E
2/28 Doc ID 10880 Rev 3
Contents
Block diagram and pin description  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1 Absolute maximum ratings  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  6
2 Thermal data   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
4 Electrical characteristics curves  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  14
Application information   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1 GND protection network against reverse battery  . . . . . . . . . . . . . . . . . . .  17
1.1 Solution 1: a resistor in the ground line (RGND only)  . . . . . . . . . . . . . . 17
1.2 Solution 2: a diode (DGND) in the ground line   . . . . . . . . . . . . . . . . . . . . 18
1.3 Load dump protection   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  18
2.1 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Maximum demagnetization energy   . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  20
Package and PCB thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1 PowerSO-10 thermal data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  21
Package and packing information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1 ECOPACK® packages  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  24
2 PowerSO-10 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  24
3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  26
Revision history   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

VND810SP-E List of tables
Doc ID 10880 Rev 3 3/28
List of tables
Table 1. Order codes  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins  . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 7. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Status pin  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Logic input  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 14. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 15. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. PowerSO-10 mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Document revision history  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

List of figures VND810SP-E
4/28 Doc ID 10880 Rev 3
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timing   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Status leakage current  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Status clamp voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Input hysteresis voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Overvoltage shutdown  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. ILIM vs Tcase  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. PowerSO-10 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . 21
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10  . . . . . . . . . . . . . . . . . . . . 22
Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 26
Figure 33. Tape and reel shipment (suffix “TR”)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

VND810SP-E Block diagram and pin description

Doc ID 10880 Rev 3 5/28

1 Block diagram and pin description

Figure 1. Block diagram

Figure 2. Configuration diagram (top view)

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input

Floating X X X X

To ground X Through 10 KΩ resistor

OVERTEMP. 1

Vcc

GND

INPUT1 OUTPUT1

OVERVOLTAGE

LOGIC

DRIVER 1

STATUS1

Vcc

CLAMP

UNDERVOLTAGE

CLAMP 1

OPEN-LOAD ON 1

CURRENT LIMITER 1

OPEN-LOAD OFF 1

OUTPUT2

DRIVER 2

CLAMP 2

OPEN-LOAD ON 2

OPEN-LOAD OFF 2

OVERTEMP. 2

INPUT2

STATUS2

CURRENT LIMITER 2

OUTPUT 1

N.C.

OUTPUT 2

GROUND

INPUT 1

STATUS 1

STATUS 2

INPUT 2

PowerSO-10

Electrical specifications VND810SP-E

6/28 Doc ID 10880 Rev 3

2 Electrical specifications

Figure 3. Current and voltage conventions

1) VFn = VCCn - VOUTn during reverse battery condition.

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Ta bl e 3 may cause permanent damage to the

device. These are stress ratings only and operation of the device at these or any other

conditions above those indicated in the operating sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended periods may affect device

reliability. Refer also to the STMicroelectronics sure program and other relevant quality

document.

GND

OUTPUT 2

GND

STATUS 2

INPUT 2 I

OUT2

IN2

STAT2

IN2

OUT2

OUTPUT 1

OUT1

INPUT 1

IN1

STATUS 1

STAT1

IN1

STAT1

F1 (1)

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

VCC DC supply voltage 41 V

- VCC Reverse DC supply voltage -0.3 V

- IGND DC reverse ground pin current -200 mA

IOUT DC output current Internally Limited A

- IOUT Reverse DC output current -6 A

IIN DC input current +/- 10 mA

Istat DC status current +/- 10 mA

VESD

Electrostatic discharge (Human Body Model:

R=1.5KΩ; C=100pF)

– INPUT

–STATUS

–OUTPUT

–V

4000

5000

VND810SP-E Electrical specifications

Doc ID 10880 Rev 3 7/28

2.2 Thermal data

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless

otherwise stated.

(Per each channel)

)

EMAX

Maximum switching energy

(L = 1.4 mH; RL=0Ω; Vbat =13.5V;

Tjstart = 150 °C; IL=5A)

24 mJ

Ptot Power dissipation TC=25°C 52 W

TjJunction operating temperature Internally Limited °C

TcCase operating temperature -40 to 150 °C

Tstg Storage temperature -55 to 150 °C

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Table 4. Thermal data

Symbol Parameter Value Unit

Rthj-case Thermal resistance junction-case 2.4 °C/W

Rthj-amb Thermal resistance junction-ambient 52.4 (1)

1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 μm thick). Horizontal

mounting and no artificial air flow.

37 (2)

2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 μm thick). Horizontal

mounting and no artificial air flow

°C/W

Table 5. Power output

Symbol Parameter Test conditions Min. Typ. Max. Unit

VCC(1) Operating supply

voltage 5.5 13 36 V

VUSD(1) Undervoltage shutdown 3 4 5.5 V

VOV(1) Overvoltage shutdown 36 V

RON On-state resistance IOUT =1A; T

j=25°C

IOUT =1A; V

CC >8V

160

320

mΩ

IS(1) Supply current

Off-state; VCC =13V;

VIN =V

OUT =0V

Off-state; VCC =13V;

VIN =V

OUT =0V; Tj=25°C

On-state; VCC =13V; V

IN =5V;

IOUT =0A

μA

IL(off1) Off-state output current VIN =V

OUT =0V 0 50 μA

Electrical specifications VND810SP-E

8/28 Doc ID 10880 Rev 3

IL(off2) Off-state output current VIN =0V; V

OUT =3.5V -75 0 μA

IL(off3) Off-state output current VIN =V

OUT =0V; V

CC =13V;

Tj =125 °C 5μA

IL(off4) Off-state output current VIN =V

OUT =0V; V

CC =13V;

Tj =25°C 3μA

1. Per device.

Table 6. Protection(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

TTSD Shutdown temperature 150 175 200 °C

TRReset temperature 135 °C

Thyst Thermal hysteresis 7 15 °C

tsdl

Status delay in

overload conditions Tj>TTSD 20 μs

Ilim Current limitation VCC =13V

5.5 V < VCC <36V

3.5 5 7.5

7.5

Vdemag

Turn-off output clamp

voltage IOUT =1A; L=6mH V

CC-41 VCC-48 VCC-55 V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

diagnostic signals must be used together with a proper software strategy. If the device is subjected to

abnormal conditions, this software must limit the duration and number of activation cycles

Table 7. VCC output diode

Symbol Parameter Test conditions Min Typ Max Unit

VFForward on voltage -IOUT = 0.5 A; Tj= 150 °C - - 0.6 V

Table 8. Status pin

Symbol Parameter Test conditions Min Typ Max Unit

VSTAT

Status low output

voltage ISTAT = 1.6 mA 0.5 V

ILSTAT

Status leakage

current Normal operation; VSTAT = 5 V 10 μA

CSTAT

Status pin input

capacitance Normal operation; VSTAT = 5 V 100 pF

VSCL Status clamp voltage ISTAT = 1 mA

ISTAT = -1 mA

66.8

-0.7

Table 5. Power output (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

VND810SP-E Electrical specifications

Doc ID 10880 Rev 3 9/28

Table 9. Switching (VCC =13V)

Symbol Parameter Test conditions Min Typ Max Unit

td(on) Turn-on delay time RL=13Ω from VIN rising edge

to VOUT =1.3V -30-μs

td(off) Turn-off delay time RL=13Ω from VIN falling edge

to VOUT =11.7V -30-μs

dVOUT/dt(on)

Turn-on voltage

slope

RL=13Ω from VOUT = 1.3 V to

VOUT = 10.4 V -See

Ta bl e 2 1 -V/μs

dVOUT/dt(off)

Turn-off voltage

slope

RL=13Ω from VOUT =11.7V

to VOUT =1.3V -See

Ta bl e 2 2 -V/μs

Table 10. Open-load detection

Symbol Parameter Test conditions Min Typ Max Unit

IOL

Open-load on-state

detection threshold VIN = 5V 20 40 80 mA

tDOL(on)

Open-load on-state

detection delay IOUT = 0 A 200 μs

VOL

Open-load off-state

voltage detection

threshold

VIN = 0 V 1.5 2.5 3.5 V

tDOL(off) Open-load detection

delay at turn-off 1000 μs

Table 11. Logic input

Symbol Parameter Test conditions Min Typ Max Unit

VIL Input low level 1.25 V

IIL Low level input current VIN = 1.25 V 1 μA

VIH Input high level 3.25 V

IIH

High level input

current VIN = 3.25 V 10 μA

Vhyst

Input hysteresis

voltage 0.5 V

VICL Input clamp voltage IIN = 1 mA

IIN = -1 mA

66.8

-0.7

Electrical specifications VND810SP-E

10/28 Doc ID 10880 Rev 3

Figure 4. Status timing

Figure 5. Switching time waveforms

INn

STAT n

DOL(off)

OPEN-LOAD STATUS TIMING (with external pull-up)

INn

STAT n

OVERTEMPERATURE STATUS TIMING

SDL

OUT

< I

OUT

> V

DOL(on)

> T

TSD

OUTn

INn

80%

10%

OUT

/dt

(on)

d(off)

90%

OUT

/dt

(off)

d(on)

VND810SP-E Electrical specifications

Doc ID 10880 Rev 3 11/28

Table 12. Truth table

Conditions Input Output Status

Normal operation L

Current limitation

(Tj < TTSD) H

(Tj > TTSD) L

Overtemperature L

Undervoltage L

Overvoltage L

Output voltage > VOL

Output current < IOL

Electrical specifications VND810SP-E

12/28 Doc ID 10880 Rev 3

Table 13. Electrical transient requirements on VCC pin (part 1)

ISO T/R 7637/1

Test pulse

Test levels

I II III IV Delays and

impedance

1 -25 V -50 V -75 V -100 V 2 ms, 10 Ω

2 +25 V +50 V +75 V +100 V 0.2 ms, 10 Ω

3a -25 V -50 V -100 V -150 V 0.1 μs, 50 Ω

3b +25 V +50 V +75 V +100 V 0.1 μs, 50 Ω

4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω

5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Ω

Table 14. Electrical transient requirements on VCC pin (part 2)

ISO T/R 7637/1

Test pulse

Test levels

I II III IV

1CCCC

2CCCC

3aCCCC

3bCCCC

4CCCC

5C E E E

Table 15. Electrical transient requirements on VCC pin (part 3)

Class Contents

CAll functions of the device are performed as designed after exposure to

disturbance.

EOne or more functions of the device is not performed as designed after exposure

and cannot be returned to proper operation without replacing the device.

VND810SP-E Electrical specifications

Doc ID 10880 Rev 3 13/28

Figure 6. Waveforms

OPEN-LOAD without external pull-up

STATUSn

INPUTn

NORMAL OPERATION

UNDERVOLTAGE

VCC

VUSD

VUSDhyst

INPUTn

OVERVOLTAGE

VCC

STATUSn

INPUTn

STATUSn

INPUTn

STATUSn

INPUTn

OPEN-LOAD with external pull-up

undefined

OVERTEMPERATURE

INPUTn

STATUSn

TTSD

OUTPUT VOLTAGEn

VCC<VOV

OUTPUT VOLTAGEn

OUTPUT CURRENTn

VOUT>VOL

VOL

VCC>VOV

Electrical specifications VND810SP-E

14/28 Doc ID 10880 Rev 3

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current

Figure 9. Input clamp voltage Figure 10. Status leakage current

Figure 11. Status low output voltage Figure 12. Status clamp voltage

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0.16

0.32

0.48

0.64

0.8

0.96

1.12

1.28

1.44

1.6

IL(off1) (uA)

Off state

Vcc=36V

Vin=Vout=0V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.5

1.5

2.5

3.5

4.5

Iih (uA)

Vin=3.25V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

6.2

6.4

6.6

6.8

7.2

7.4

7.6

7.8

Vicl (V)

Iin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.01

0.02

0.03

0.04

0.05

Ilstat (uA)

Vstat=5V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Vstat (V)

Istat=1.6mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

6.2

6.4

6.6

6.8

7.2

7.4

7.6

7.8

Vscl (V)

Istat=1mA

VND810SP-E Electrical specifications

Doc ID 10880 Rev 3 15/28

Figure 13. On-state resistance vs Tcase Figure 14. On-state resistance vs VCC

Figure 15. Open-load on-state detection

threshold

Figure 16. Open-load off-state detection

threshold

Figure 17. Input high level Figure 18. Input low level

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

100

150

200

250

300

350

400

Ron (mOhm)

Iout=1A

Vcc=8V; 13V & 36V

5 10152025303540

Vcc (V)

100

150

200

250

300

350

400

Ron (mOhm)

Iout=1A

Tc= - 40ºC

Tc= 25ºC

Tc= 125ºC

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Iol (mA)

Vcc=13V

Vin=5V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.5

1.5

2.5

3.5

4.5

Vol (V)

Vin=0V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

2.2

2.4

2.6

2.8

3.2

3.4

3.6

Vih (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

1.2

1.4

1.6

1.8

2.2

2.4

2.6

Vil (V)

Electrical specifications VND810SP-E

16/28 Doc ID 10880 Rev 3

Figure 19. Input hysteresis voltage Figure 20. Overvoltage shutdown

Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope

Figure 23. ILIM vs Tcase

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0.5

0.6

0.7

0.8

0.9

1.1

1.2

1.3

1.4

1.5

Vhyst (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vov (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

100

200

300

400

500

600

700

800

900

1000

dVout/dt(on) (V/ms)

Vcc=13V

Rl=13Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

100

150

200

250

300

350

400

450

500

dVout/dt(off) (V/ms)

Vcc=13V

Rl=13Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Ilim (A)

Vcc=13V

VND810SP-E Application information

Doc ID 10880 Rev 3 17/28

3 Application information

Figure 24. Application schematic

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against

reverse battery.

3.1.1 Solution 1: a resistor in the ground line (RGND only)

This can be used with any type of load.

The following shows how to dimension the RGND resistor:

1. RGND ≤600 mV / IS(on)max.

2. RGND ≥(-VCC) / (-IGND)

where - IGND is the DC reverse ground pin current and can be found in the absolute

maximum rating section of the device’s datasheet.

Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:

PD = (-VCC)2/ RGND

This resistor can be shared amongst several different HSD. Please note that the value of this

resistor should be calculated with formula (1) where IS(on)max becomes the sum of the

maximum on-state currents of the different devices.

Please note that, if the microprocessor ground is not common with the device ground, then

the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output

values. This shift varies depending on how many devices are ON in the case of several high

side drivers sharing the same RGND.

OUTPUT2

+5V

prot

OUTPUT1

STATUS1

INPUT1

+5V

STATUS2

INPUT2

GND

+5V

prot

GND

Application information VND810SP-E

18/28 Doc ID 10880 Rev 3

If the calculated power dissipation requires the use of a large resistor, or several devices

have to share the same resistor, then ST suggests using Section 3.1.2 described below.

3.1.2 Solution 2: a diode (DGND) in the ground line

A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device is driving an

inductive load. This small signal diode can be safely shared amongst several different HSD.

Also in this case, the presence of the ground network produce a shift (~600 mV) in the input

threshold and the status output values if the microprocessor ground is not common with the

device ground. This shift does not vary if more than one HSD shares the same

diode/resistor network. Series resistor in INPUT and STATUS lines are also required to

prevent that, during battery voltage transient, the current exceeds the absolute maximum

rating. Safest configuration for unused INPUT and STATUS pin is to leave them

unconnected.

3.1.3 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC

max DC rating. The same applies if the device is subjected to transients on the VCC line that

are greater than the ones shown in Ta b l e 1 3 .

3.2 MCU I/O protection

If a ground protection network is used and negative transients are present on the VCC line,

the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent

the microcontroller I/O pins from latching up.

The value of these resistors is a compromise between the leakage current of microcontroller

and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of

microcontroller I/Os:

-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax

Example

For the following conditions:

VCCpeak = -100 V

Ilatchup ≥ 20 mA

VOHμC ≥ 4.5 V

5kΩ ≤ Rprot ≤ 65 kΩ.

The recommended values are:

Rprot = 10 kΩ

3.2.1 Open-load detection in off-state

Off-state open-load detection requires an external pull-up resistor (RPU) connected between

OUTPUT pin and a positive supply voltage (VPU) like the +5 V line used to supply the

microprocessor.

The external resistor has to be selected according to the following requirements:

VND810SP-E Application information

Doc ID 10880 Rev 3 19/28

1. No false open-load indication when load is connected: in this case it needs to avoid

VOUT to be higher than VOlmin; this results in the following condition:

VOUT =(V

PU/(R

L+R

PU))RL<V

Olmin.

2. No misdetection when load is disconnected: in this case the VOUT has to be higher than

VOLmax; this results in the following condition RPU <(V

PU –V

OLmax)/ IL(off2).

Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the

pull-up resistor RPU should be connected to a supply that is switched OFF when the module

is in standby.

The values of VOLmin, VOLmax and IL(off2) are available in Section 2.3.

Figure 25. Open-load detection in off-state

VOL

V batt. VPU

RPU

DRIVER

LOGIC

INPUT

STATUS

VCC

OUT

GROUND

IL(off2)

Application information VND810SP-E

20/28 Doc ID 10880 Rev 3

3.3 Maximum demagnetization energy

Figure 26. Maximum turn-off current versus load inductance

1. Values are generated with RL=0

In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed

the temperature specified above for curves B and C.

A = Single pulse at TJstart =150°C

B = Repetitive pulse at TJstart =100°C

C = Repetitive pulse at TJstart =125°C

Conditions:

VCC = 13.5 V

VIN, IL

Demagnetization Demagnetization Demagnetization

0,01 0,1 1 10 100

L( mH )

ILM AX (A)

VND810SP-E Package and PCB thermal data

Doc ID 10880 Rev 3 21/28

4 Package and PCB thermal data

4.1 PowerSO-10 thermal data

Figure 27. PowerSO-10 PC board

1. Layout condition of Rth and Zth measurements (PCB FR4 area= 58 mm x 58 mm, PCB

thickness = 2 mm, Cu thickness = 35

m, Copper areas: from minimum pad lay-out to 8 cm2).

Figure 28. PowerSO-10 Rthj-amb vs PCB copper area in open box free air condition

0246810

PCB Cu heatsink area (cm^2)

RTHj_amb (°C/W)

Tj-Tamb=50°C

Package and PCB thermal data VND810SP-E

22/28 Doc ID 10880 Rev 3

Figure 29. PowerSO-10 thermal impedance junction ambient single pulse

Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10

Equation 1: pulse calculation formula

T_amb

Pd1

C3 C4

R3R1 R6R5R2

C5 C6C2

Pd2

C1 C2

Tj_1

Tj_2

ZTHδRTH δZTHtp 1δ–()+⋅=

where δtpT⁄=

VND810SP-E Package and PCB thermal data

Doc ID 10880 Rev 3 23/28

Table 16. Thermal parameter

Area/island (cm2) Footprint 6

R1 (°C/W) 0.35

R2 (°C/W) 1.8

R3(°C/W) 1.1

R4 (°C/W) 0.8

R5 (°C/W) 12

R6 (°C/W) 37 22

C1 (W.s/°C) 0.0001

C2 (W.s/°C) 7E-04

C3 (W.s/°C) 0.008

C4 (W.s/°C) 0.3

C5 (W.s/°C) 0.75

C6 (W.s/°C) 3 5

Package and packing information VND810SP-E

24/28 Doc ID 10880 Rev 3

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

5.2 PowerSO-10 mechanical data

Figure 31. PowerSO-10 package dimensions

DETAIL "A"

PLANE

SEATING

= =

0.10 A

DETAIL "A"

SEATING

PLANE

0.25

VND810SP-E Package and packing information

Doc ID 10880 Rev 3 25/28

Table 17. PowerSO-10 mechanical data

Symbol

Millimeters

Min Typ Max

A 3.35 3.65

A(1)

1. Muar only POA P013P

3.4 3.6

A1 0.00 0.10

B 0.40 0.60

B(1) 0.37 0.53

C 0.35 0.55

C(1) 0.23 0.32

D 9.40 9.60

D1 7.40 7.60

E 9.30 9.50

E2 7.20 7.60

E2(1) 7.30 7.50

E4 5.90 6.10

E4(1) 5.90 6.30

e1.27

F 1.25 1.35

F(1) 1.20 1.40

H 13.80 14.40

H(1) 13.85 14.35

h0.50

L 1.20 1.80

L(1) 0.80 1.10

a0° 8°

α(1) 2° 8°

Package and packing information VND810SP-E

26/28 Doc ID 10880 Rev 3

5.3 PowerSO-10 packing information

Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix)

Figure 33. Tape and reel shipment (suffix “TR”)

6.30

10.8 - 11

14.6 - 14.9

9.5

1.27

0.67 - 0.73

0.54 - 0.6

All dimensions are in mm.

Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)

Casablanca 50 1000 532 10.4 16.4 0.8

Muar 50 1000 532 4.9 17.2 0.8

REEL DIMENSIONS

All dimensions are in mm.

Base Q.ty 600

Bulk Q.ty 600

A (max) 330

B (min) 1.5

C (± 0.2) 13

F20.2

G (+ 2 / -0) 24.4

N (min) 60

T (max) 30.4

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

All dimensions are in mm.

Tape width W 24

Tape Hole Spacing P0 (± 0.1) 4

Component Spacing P 24

Hole Diameter D (± 0.1/-0) 1.5

Hole Diameter D1 (min) 1.5

Hole Position F (± 0.05) 11.5

Compartment Depth K (max) 6.5

Hole Spacing P1 (± 0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min

Empty components pockets

saled with cover tape.

User direction of feed

VND810SP-E Revision history

Doc ID 10880 Rev 3 27/28

6 Revision history

Table 18. Document revision history

Date Revision Changes

01-Oct-2004 1 Initial release.

25-May-2010 2 Changed document template. Reformatted entire document.

Changed Features list.

08-Oct-2010 3

Updated following tables:

–Table 6: Protection

–Table 12: Truth table

–Table 17: PowerSO-10 mechanical data

Updated Figure 26: Maximum turn-off current versus load inductance

VND810SP-E

28/28 Doc ID 10880 Rev 3

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