LM139-N, LM239-N, LM2901-N, LM3302-N, LM339-N
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
LM139/LM239/LM339/LM2901/LM3302 Low Power Low Offset Voltage Quad Comparators
Check for Samples: LM139-N,LM239-N,LM2901-N,LM3302-N,LM339-N
1FEATURES APPLICATIONS
2• Wide Supply Voltage Range • Limit Comparators
• LM139/139A Series 2 to 36 VDCor ±1 to ±18 VDC • Simple Analog-to-Digital Converters
• LM2901: 2 to 36 VDCor ±1 to ±18 VDC • Pulse, Squarewave and Time Delay Generators
• LM3302: 2 to 28 VDCor ±1 to ±14 VDC • Wide Range VCO; MOS Clock Timers
• Very Low Supply Current Drain (0.8 mA) — • Multivibrators and High Voltage Digital Logic
Independent of Supply Voltage Gates
• Low Input Biasing Current: 25 nA DESCRIPTION
• Low Input Offset Current: ±5 nA The LM139 series consists of four independent
• Offset Voltage: ±3 mV precision voltage comparators with an offset voltage
• Input Common-Mode Voltage Range Includes specification as low as 2 mV max for all four
GND comparators. These were designed specifically to
operate from a single power supply over a wide range
• Differential Input Voltage Range Equal to the of voltages. Operation from split power supplies is
Power Supply Voltage also possible and the low power supply current drain
• Low Output Saturation Voltage: 250 mV at 4 is independent of the magnitude of the power supply
mA voltage. These comparators also have a unique
characteristic in that the input common-mode voltage
• Output Voltage Compatible with TTL, DTL, range includes ground, even though operated from a
ECL, MOS and CMOS Logic Systems single power supply voltage.
ADVANTAGES The LM139 series was designed to directly interface
with TTL and CMOS. When operated from both plus
• High Precision Comparators and minus power supplies, they will directly interface
• Reduced VOS Drift Over Temperature with MOS logic— where the low power drain of the
• Eliminates Need for Dual Supplies LM339 is a distinct advantage over standard
comparators.
• Allows Sensing Near GND
• Compatible with all Forms of Logic
• Power Drain Suitable for Battery Operation
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM139-N, LM239-N, LM2901-N, LM3302-N, LM339-N
SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
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One-Shot Multivibrator with Input Lock Out
Connection Diagrams
Figure 1. CDIP, SOIC, PDIP Packages – Top View
See Package Numbers J0014A, D0014A, NFF0014A
Figure 2. CLGA Package
See Package Numbers NAD0014B, NAC0014A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
Absolute Maximum Ratings(1)
LM139/LM239/LM339
LM139A/LM239A/LM339A LM3302
LM2901
Supply Voltage, V+36 VDC or ±18 VDC 28 VDC or ±14 VDC
Differential Input Voltage(2) 36 VDC 28 VDC
Input Voltage −0.3 VDC to +36 VDC −0.3 VDC to +28 VDC
Input Current (VIN<−0.3 VDC)(3) 50 mA 50 mA
Power Dissipation(4)
PDIP 1050 mW 1050 mW
Cavity DIP 1190 mW
SOIC Package 760 mW
Output Short-Circuit to GND(5) Continuous Continuous
Storage Temperature Range −65°C to +150°C −65°C to +150°C
Lead Temperature (Soldering, 10 seconds) 260°C 260°C
Operating Temperature Range −40°C to +85°C
LM339/LM339A 0°C to +70°C
LM239/LM239A −25°C to +85°C
LM2901 −40°C to +85°C
LM139/LM139A −55°C to +125°C
Soldering Information
PDIP Package Soldering (10 seconds) 260°C 260°C
SOIC Package
Vapor Phase (60 seconds) 215°C 215°C
Infrared (15 seconds) 220°C 220°C
ESD rating (1.5 kΩin series with 100 pF) 600V 600V
(1) Refer to RETS139AX for LM139A military specifications and to RETS139X for LM139 military specifications.
(2) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow
the magnitude of the negative power supply, if used) (at 25°C).
(3) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go
to the V+voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive
and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC (at
25°C).
(4) For operating at high temperatures, the LM339/LM339A, LM2901, LM3302 must be derated based on a 125°C maximum junction
temperature and a thermal resistance of 95°C/W which applies for the device soldered in a printed circuit board, operating in a still air
ambient. The LM239 and LM139 must be derated based on a 150°C maximum junction temperature. The low bias dissipation and the
“ON-OFF” characteristic of the outputs keeps the chip dissipation very small (PD≤100 mW), provided the output transistors are allowed
to saturate.
(5) Short circuits from the output to V+can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 20 mA independent of the magnitude of V+.
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Electrical Characteristics
(V+=5 VDC, TA= 25°C, unless otherwise stated) LM139A LM239A, LM339A LM139
Parameter Test Conditions Units
Min Typ Max Min Typ Max Min Typ Max
Input Offset Voltage See(1) 1.0 2.0 1.0 2.0 2.0 5.0 mVDC
Input Bias Current IIN(+) or IIN(−)with Output in 25 100 25 250 25 100 nADC
Linear Range(2), VCM=0V
Input Offset Current IIN(+)−IIN(−), VCM=0V 3.0 25 5.0 50 3.0 25 nADC
Input Common-Mode V+=30 VDC (LM3302, 0 V+−1.5 0 V+−1.5 0 V+−1.5 VDC
Voltage Range V+= 28 VDC)(3)
Supply Current RL=∞on all Comparators, 0.8 2.0 0.8 2.0 0.8 2.0 mADC
RL=∞, V+= 36V, 1.0 2.5 1.0 2.5 mADC
(LM3302, V+= 28 VDC)
Voltage Gain RL≥15 kΩ, V+= 15 VDC 50 200 50 200 50 200 V/mV
VO= 1 VDC to 11 VDC
Large Signal VIN = TTL Logic Swing, VREF = 300 300 300 ns
Response Time 1.4 VDC, VRL = 5 VDC,
RL= 5.1 kΩ
Response Time VRL = 5 VDC, RL= 5.1 kΩ(4) 1.3 1.3 1.3 μs
Output Sink Current VIN(−)= 1 VDC, VIN(+) = 0, 6.0 16 6.0 16 6.0 16 mADC
VO≤1.5 VDC
Saturation Voltage VIN(−)= 1 VDC, VIN(+) = 0, 250 400 250 400 250 400 mVDC
ISINK ≤4 mA
Output Leakage VIN(+) = 1 VDC,VIN(−)= 0, 0.1 0.1 0.1 nADC
Current VO= 5 VDC
(1) At output switch point, VO≃1.4 VDC, RS= 0Ωwith V+from 5 VDC to 30 VDC; and over the full input common-mode range (0 VDC to V+
−1.5 VDC), at 25°C. For LM3302, V+from 5 VDC to 28 VDC.
(2) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(3) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5V at 25°C, but either or both inputs can go to +30 VDC without damage (25V for LM3302),
independent of the magnitude of V+.
(4) The response time specified is a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see
typical performance characteristics section.
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
Electrical Characteristics
(V+= 5 VDC, TA= 25°C, unless otherwise stated) LM239, LM339 LM2901 LM3302
Parameter Test Conditions Units
Min Typ Max Min Typ Max Min Typ Max
Input Offset Voltage See(1) 2.0 5.0 2.0 7.0 3 20 mVDC
Input Bias Current IIN(+) or IIN(−)with Output in Linear 25 250 25 250 25 500 nADC
Range(2), VCM=0V
Input Offset Current IIN(+)−IIN(−), VCM = 0V 5.0 50 5 50 3 100 nADC
Input Common-Mode V+= 30 VDC (LM3302, 0 V+−1.5 0 V+−1.5 0 V+−1.5 VDC
Voltage Range V+= 28 VDC)(3)
Supply Current RL=∞on all Comparators, 0.8 2.0 0.8 2.0 0.8 2.0 mADC
RL=∞, V+= 36V, 1.0 2.5 1.0 2.5 1.0 2.5 mADC
(LM3302, V+= 28 VDC)
Voltage Gain RL≥15 kΩ, V+= 15 VDC 50 200 25 100 2 30 V/mV
VO= 1 VDC to 11 VDC
Large Signal VIN = TTL Logic Swing, VREF = 300 300 300 ns
Response Time 1.4 VDC, VRL = 5 VDC,
RL= 5.1 kΩ,
Response Time VRL = 5 VDC, RL= 5.1 kΩ(4) 1.3 1.3 1.3 μs
Output Sink Current VIN(−)= 1 VDC, VIN(+) = 0, 6.0 16 6.0 16 6.0 16 mADC
VO≤1.5 VDC
Saturation Voltage VIN(−)= 1 VDC, VIN(+) = 0, 250 400 250 400 250 500 mVDC
ISINK ≤4 mA
Output Leakage VIN(+) = 1 VDC,VIN(−)= 0, 0.1 0.1 0.1 nADC
Current VO= 5 VDC
(1) At output switch point, VO≃1.4 VDC, RS= 0Ωwith V+from 5 VDC to 30 VDC; and over the full input common-mode range (0 VDC to V+
−1.5 VDC), at 25°C. For LM3302, V+from 5 VDC to 28 VDC.
(2) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(3) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5V at 25°C, but either or both inputs can go to +30 VDC without damage (25V for LM3302),
independent of the magnitude of V+.
(4) The response time specified is a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see
typical performance characteristics section.
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
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Electrical Characteristics
(V+= 5.0 VDC(1))LM139A LM239A, LM339A LM139
Parameter Test Conditions Units
Min Typ Max Min Typ Max Min Typ Max
Input Offset Voltage See(2) 4.0 4.0 9.0 mVDC
Input Offset Current IIN(+)−IIN(−), VCM = 0V 100 150 100 nADC
Input Bias Current IIN(+) or IIN(−)with Output in 300 400 300 nADC
Linear Range, VCM = 0V(3)
Input Common-Mode V+=30 VDC (LM3302, 0 V+−2.0 0 V+−2.0 0 V+−2.0 VDC
Voltage Range V+= 28 VDC)(4)
Saturation Voltage VIN(−)=1 VDC, VIN(+) = 0, 700 700 700 mVDC
ISINK ≤4 mA
Output Leakage Current VIN(+) = 1 VDC, VIN(−)= 0, 1.0 1.0 1.0 μADC
VO= 30 VDC, (LM3302,
VO= 28 VDC)
Differential Input Voltage Keep all VIN's ≥0 VDC (or V−, if 36 36 36 VDC
used)(5)
(1) These specifications are limited to −55°C ≤TA≤+125°C, for the LM139/LM139A. With the LM239/LM239A, all temperature
specifications are limited to −25°C ≤TA≤+85°C, the LM339/LM339A temperature specifications are limited to 0°C ≤TA≤+70°C, and
the LM2901, LM3302 temperature range is −40°C ≤TA≤+85°C.
(2) At output switch point, VO≃1.4 VDC, RS= 0Ωwith V+from 5 VDC to 30 VDC; and over the full input common-mode range (0 VDC to V+
−1.5 VDC), at 25°C. For LM3302, V+from 5 VDC to 28 VDC.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5V at 25°C, but either or both inputs can go to +30 VDC without damage (25V for LM3302),
independent of the magnitude of V+.
(5) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow
the magnitude of the negative power supply, if used) (at 25°C).
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
Electrical Characteristics
(V+= 5.0 VDC(1))LM239, LM339 LM2901 LM3302
Parameter Test Conditions Units
Min Typ Max Min Typ Max Min Typ Max
Input Offset Voltage See(2) 9.0 9 15 40 mVDC
Input Offset Current IIN(+)−IIN(−), VCM = 0V 150 50 200 300 nADC
Input Bias Current IIN(+) or IIN(−)with Output in 400 200 500 1000 nADC
Linear Range, VCM = 0V(3)
Input Common-Mode V+= 30 VDC (LM3302, V+−2.0 0 V+−2.0 0 V+−2.0 VDC
V+= 28 VDC)
Voltage Range See(4)
Saturation Voltage VIN(−)= 1 VDC, VIN(+) = 0, 700 400 700 700 mVDC
ISINK ≤4 mA
Output Leakage Current VIN(+) = 1 VDC, VIN(−)= 0, VO= 30 1.0 1.0 1.0 μADC
VDC, (LM3302, V O= 28 VDC)
Differential Input Voltage Keep all VIN's ≥0 VDC (or V−, if 36 36 28 VDC
used)(5)
(1) These specifications are limited to −55°C ≤TA≤+125°C, for the LM139/LM139A. With the LM239/LM239A, all temperature
specifications are limited to −25°C ≤TA≤+85°C, the LM339/LM339A temperature specifications are limited to 0°C ≤TA≤+70°C, and
the LM2901, LM3302 temperature range is −40°C ≤TA≤+85°C.
(2) At output switch point, VO≃1.4 VDC, RS= 0Ωwith V+from 5 VDC to 30 VDC; and over the full input common-mode range (0 VDC to V+
−1.5 VDC), at 25°C. For LM3302, V+from 5 VDC to 28 VDC.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5V at 25°C, but either or both inputs can go to +30 VDC without damage (25V for LM3302),
independent of the magnitude of V+.
(5) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow
the magnitude of the negative power supply, if used) (at 25°C).
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Typical Performance Characteristics
LM139/LM239/LM339, LM139A/LM239A/LM339A, LM3302
Supply Current Input Current
Figure 3. Figure 4.
Response Time for Various Input Overdrives –
Output Saturation Voltage Negative Transition
Figure 5. Figure 6.
Response Time for Various Input Overdrives –
Positive Transition
Figure 7.
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
Typical Performance Characteristics
LM2901
Supply Current Input Current
Figure 8. Figure 9.
Response Time for Various Input Overdrives –
Output Saturation Voltage Negative Transition
Figure 10. Figure 11.
Response Time for Various Input Overdrives –
Positive Transition
Figure 12.
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Application Hints
The LM139 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the
output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only
during the output voltage transition intervals as the comparator changes states. Power supply bypassing is not
required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling.
Reducing this input resistors to < 10 kΩreduces the feedback signal levels and finally, adding even a small
amount (1 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray
feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output
oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform,
with relatively fast rise and fall times, hysteresis is not required.
All pins of any unused comparators should be tied to the negative supply.
The bias network of the LM139 series establishes a drain current which is independent of the magnitude of the
power supply voltage over the range of from 2 VDC to 30 VDC.
It is usually unnecessary to use a bypass capacitor across the power supply line.
The differential input voltage may be larger than V+without damaging the device. Protection should be provided
to prevent the input voltages from going negative more than −0.3 VDC (at 25°C). An input clamp diode can be
used as shown in the applications section.
The output of the LM139 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many
collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected
to any available power supply voltage within the permitted supply voltage range and there is no restriction on this
voltage due to the magnitude of the voltage which is applied to the V+terminal of the LM139A package. The
output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of
current which the output device can sink is limited by the drive available (which is independent of V+) and the β
of this device. When the maximum current limit is reached (approximately 16 mA), the output transistor will come
out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the
approximately 60ΩRSAT of the output transistor. The low offset voltage of the output transistor (1 mV) allows the
output to clamp essentially to ground level for small load currents.
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
Typical Applications
(V+= 5.0 VDC)
Figure 13. Basic Comparator Figure 14. Driving CMOS Figure 15. Driving TTL
Figure 16. AND Gate Figure 17. OR Gate
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Typical Applications
(V+= 15 VDC)
Figure 18. One-Shot Multivibrator
Figure 19. Bi-Stable Multivibrator
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SNOSBJ3D –NOVEMBER 1999–REVISED MARCH 2013
Figure 20. One-Shot Multivibrator with Input Lock Out
Figure 21. Pulse Generator
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Figure 22. Large Fan-In AND Gate Figure 23. ORing the Outputs
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Figure 24. Time Delay Generator
Figure 25. Non-Inverting Comparator with Figure 26. Inverting Comparator with Hysteresis
Hysteresis
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Figure 27. Squarewave Oscillator Figure 28. Basic Comparator
Figure 29. Limit Comparator Figure 30. Comparing Input Voltages of Opposite
Polarity
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* Or open-collector logic gate without pull-up resistor
Figure 31. Output Strobing Figure 32. Crystal Controlled Oscillator
V+= +30 VDC
250 mVDC ≤VC≤+50 VDC
700 Hz ≤fO≤100 kHz Figure 33. Two-Decade High-Frequency VCO
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Figure 34. Transducer Amplifier Figure 35. Zero Crossing Detector (Single Power
Supply)
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Split-Supply Applications
(V+= +15 VDC and V−=−15 VDC)
Figure 36. MOS Clock Driver
Figure 37. Zero Crossing Detector Figure 38. Comparator With a Negative Reference
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REVISION HISTORY
Changes from Revision C (March 2013) to Revision D Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 20
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