2003 Microchip Technology Inc. DS21711C-page 1
24AA01/24LC01B
Device Selection Table
Features
• Single-supply with operation down to 1.8V
• Low-power CMOS technology
- 1 mA active current typical
-1µA standby current typical (I-temp)
• Organized as 1 block of 128 bytes (1 x 128 x 8)
• 2-wire serial interface bus, I2C™ compatible
• Schmitt Trigger inputs fo r noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (24AA01) and 400 kHz (24LC01B)
compatibility
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 8 bytes
• 2 ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP and MSOP packages
• 5-lead SOT-23 package
• Standard and Pb-free finishes
• Available for extended temperature ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Description
The Microchip Technology Inc. 24AA01/24LC01B
(24XX01* ) is a 1 Kb it El ect ric all y Era sable PROM. Th e
devi ce is orga nized as o ne block o f 128 x 8 -bit memor y
with a 2-wire serial interface. Low-voltage design
permit s operation down to 1.8V with st andby and ac tive
currents of only 1 µA and 1 mA, respectively. The
24XX01 also has a page write capability for up to 8
bytes of data. The 24XX01 is available in the standard
8-pin PDIP, surface mount SOIC, TSSOP and MSOP
packages and is also available in the 5-lead SOT-23
package.
Package Types
Block Diagram
Part
Number VCC
Range Max Clock
Frequency Temp
Ranges
24AA01 1.8-5.5 400 kHz(1) I
24LC01B 2.5-5.5 400 kHz I, E
Note 1: 100 kHz for VCC <2.5V
24XX01
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
PDIP/SOIC/TSSOP/MSOP SOT-23-5
15
4
3
24XX01
SCL
VSS
SDA
WP
VCC
2
Note: Pins A0, A1 and A2 are not us ed by the
24XX01 (no internal connections).
HV Generator
EEPROM
Array
Page Latches
YDEC
XDEC
Sense Amp.
Memory
Control
Logic
I/O
Control
Logic
I/O
WP
SDA
SCL
VCC
VSS R/W Control
1K I2C™ Serial EEPROM
24AA01/24LC01B
DS21711C-page 2 2003 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-65°C to +125°C
ESD protection on all pins......................................................................................................................................................≥ 4kV
TABLE 1-1: DC CHARACTERISTICS
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above th ose indi cated in the opera tional li stings of this sp ecificati on is no t implie d. Exposu re to maxim um rating
conditions for extended periods may affect device reliability.
DC CHARACTERISTICS VCC = +1.8V to +5.5V
Industrial (I): TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No. Sym Characteristic Min Typ Max Units Conditions
D1 VIH WP, SCL and SDA pins —————
D2 — High-level input voltage 0.7 VCC ——V—
D3 VIL Low-level input voltage — — 0.3 VCC V—
D4 VHYS Hysteresis of Schmitt
Trigger inputs 0.05 VCC ——V(Note)
D5 VOL Low-level output voltage — — 0.40 V IOL = 3.0 mA, VCC = 2.5V
D6 ILI Input leakage current ——±1µAVIN =.1V to VCC
D7 ILO Output leakage current ——±1µAVOUT =.1V to VCC
D8 CIN,
COUT Pin capacitance
(all inputs/ou tpu t s) ——10pFVCC = 5.0V (Note)
TA = 25°C, FCLK = 1 MHz
D9 ICC write Operating current —0.13mAVCC = 5.5V, SCL = 400 kHz
D10 ICC read — 0.05 1 mA —
D11 ICCS Standby current —
—0.01
—1
5µΑ
µΑ Industrial
Automotive
SDA = SCL = VCC
WP = VSS
Note: This parameter is periodically sampled and not 100% tested.
2003 Microchip Technology Inc. DS21711C-page 3
24AA01/24LC01B
TABLE 1-2: AC CHARACTERISTICS
AC CHARACTERISTICS VCC = +1.8V to +5.5V
Industrial (I): TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No. Sym Characteristic Min Typ Max Units Conditions
1FCLK Clock frequency —
——
—400
100 kHz 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
2THIGH Clock high time 600
4000 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC <2.5V (24AA01)
3T
LOW Clock low time 1300
4700 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
4TRSDA and SCL rise time
(Note 1) —
——
—300
1000 ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
5TFSDA and SCL fall time — —
—300 ns (Note 1)
6T
HD:STA Start condition hold time 600
4000 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
7TSU:STA Start condition setup
time 600
4700 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
8THD:DAT Data input hold time 0 —
——ns(Note 2)
9T
SU:DAT Data input setup time 100
250 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
10 TSU:STO Stop condition setup
time 600
4000 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
11 TAA Output valid from clock
(Note 2) —
——
—900
3500 ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
12 TBUF Bus free-time: Time the
bus mu st be free befo r e
a new transmission can
start
1300
4700 —
——
—ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
13 TOF Output fall time from VIH
minimum to VIL
maximum
20+0.1CB
——
—250
250 ns 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA01)
14 TSP Input filter spike
suppression
(SDA and SCL pi ns)
— — 50 ns (Not es 1 and 3)
15 TWC Write cycle time
(byte or page) ——5ms—
16 — Endurance 1M — — cycles 25°C, (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The co mbine d TSP and VHYS specifi ca tio ns are d ue to n ew Sc hm itt Tri gge r i np ut s w h ic h p rov id e i mp rov ed
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characteri zation. For endurance estimates in a specific
applic ation, plea se consu lt the Total Endu rance™ Mod el which ca n be obt ained fro m Microchi p’s w eb site:
www.microchip.com.
24AA01/24LC01B
DS21711C-page 4 2003 Microchip Technology Inc.
FIGURE 1-1: BUS TIMING DATA
FIGURE 1-2: BUS TIMING START/STOP
7
524
8910
12
11
14 6
SCL
SDA
IN
SDA
OUT
3
76
D4
10
Start Stop
SCL
SDA
2003 Microchip Technology Inc. DS21711C-page 5
24AA01/24LC01B
2.0 FUNCTIONAL DESCRIPTION
The 24XX01 supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, while defining a
device receiving data as a receiver. The bus has to be
controlled by a master device which generates the
serial clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX01 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
3.0 BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stab le when ever th e clock lin e is high . Change s in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 3-1).
3.1 Bus not Busy (A)
Both data and clock lines remain high.
3.2 Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
3.3 S top Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
3.4 Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each dat a transf er is initiated w ith a S tart condition an d
terminated with a Stop condition. The number of data
bytes transferred between the Start and Stop
conditions is determined by the master device and is,
theoretically, unlimited (although only the last sixteen
will be st ored when doi ng a w rit e op erat ion ). Whe n an
overwrite does occur, it will replace data in a first-in
first-out (FIFO ) fash ion.
3.5 Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The mast er device mus t ge nera te a n ext ra c lock
pulse which is associated with this Acknowledge bit.
The device that acknowledges has to pull down the
SDA line d uring th e ackn owledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to t he sla ve by no t gene rating a n Ack nowledg e bit
on the las t by te that has be en c loc ke d ou t of th e sl av e.
In this c as e, the sl ave (24 XX01) will le av e th e d at a line
high to enable the master to generate the Stop
condition.
FIGURE 3-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
Note: The 24XX01 does not generate any
Acknowledge bits if an internal
programming cycle is in progress.
SCL
SDA
(A) (B) (D) (D) (A)(C)
Start
Condition Address or
Acknowledge
Valid
Data
Allowed
to Change
Stop
Condition
24AA01/24LC01B
DS21711C-page 6 2003 Microchip Technology Inc.
3.6 Device Addressing
A control byte is the first byte received following the
S tar t condition from the mas ter device . The contro l byte
consis ts of a four -bit control c ode. For the 24XX01, thi s
is set as ‘1010’ binary for read and write operations.
The nex t three b its of the c ontrol byte a re ‘don ’t care ’s’
for the 24XX01.
The last bit of the control byte defines the operation to
be performed. When set to ‘1’, a read operation is
select ed. W hen set to ‘0’ , a write operati on is se lecte d.
Follow in g the Start condi tio n, the 24XX01 moni tors the
SDA bus checking the device type identifier being
transmitted. Upon receiving a ‘1010’ code, the slave
device output s an Acknow ledge signal on the SDA lin e.
Depen din g on th e state of the R/W bit, the 24XX01 wil l
select a read or write operation.
FIGU RE 3-2 : CONTROL BYTE
ALLOCATION
Operation Control
Code Block Select R/W
Read 1010 Block Addre ss 1
Write 1010 Block Address 0
1010XXX
R/W A
START READ/WRITE
SLAVE ADDRESS
X = ‘Don’t care’.
2003 Microchip Technology Inc. DS21711C-page 7
24AA01/24LC01B
4.0 WRITE OPERATION
4.1 Byte Write
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits, don’t
cares) and the R/W bit, which is a logic low, is placed
onto the bus by the master transmitter . This indicates to
the addressed slave receiver that a byte with a word
address will follow after it has generated an Acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word address
and will be written into the address pointer of the
24XX01. After receiving another Acknowledge signal
from the 24XX01, the master device will transmit the
data word to be written into the addressed memory
location. The 24XX01 acknowledges again and the
master generates a Stop condition. This initiates the
internal write cycle, and, during this time, the 24XX01
will not generate Acknowledge signals (Figure 4-1).
4.2 Page Write
The write control byte, wo rd address and firs t data by te
are transmitted to the 24XX01 in the same way as in a
byte write. However, instead of generating a Stop
conditi on, the master transmits u p to 8 dat a bytes to the
24XX01, which are temporarily stored in the on-chip
page buffer and will be written into the memory once
the master has transmitted a Stop condition. Upon
receipt of each word, the four lower-order address
pointer bits are internally incremented by ‘1’. The
higher-order 7 bits of the word address remain
constant. If the master should transmit more than 8
words prior to generating the Stop condition, the
address counter will roll over and the previously
receive d dat a will be overwri tten. As w ith the byte w rite
operation, once the Stop condition is received, an
internal write cycle will begin (Figure 4-2).
FIGURE 4-1: BYTE WRITE
FIGURE 4-2: PAGE WRITE
Note: Page write opera tions are l imited to wri ting
bytes within a single physical page
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples o f the page buf fer size (or
‘page siz e’ ) an d end at ad dres s es tha t a re
integer multiples of [page size - 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being w ritten to the next page, as migh t be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
S P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACT IV IT Y
S
T
A
R
T
S
T
O
P
CONTROL
BYTE WORD
ADDRESS DATA
A
C
K
A
C
K
A
C
K
S P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE WORD
ADDRESS (n) DATA (n) DATA (n + 7)
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DATA (n + 1)
24AA01/24LC01B
DS21711C-page 8 2003 Microchip Technology Inc.
5.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
comma nd has been is sued from the master , the device
initiates the internally-timed write cycle. ACK polling
can then be initiated immediately. This involves the
master sending a S tart c ondition fo llowed by t he contro l
byte for a W rite command (R/W = 0). If the device is still
busy wi th the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 5-1 for a flow diagram of
this operation.
FIGURE 5-1: ACKNOWLEDGE POLLING
FLOW
6.0 WRITE-PROTECTION
The 24XX01 can be used as a serial ROM when the
WP pin is connected to VCC. Programming will be
inhibit ed and the en tire m emory will b e write-p rotecte d.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
Next
Operation
No
Yes
2003 Microchip Technology Inc. DS21711C-page 9
24AA01/24LC01B
7.0 READ OPERATION
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operat ions: current address read , rand om rea d
and sequential read.
7.1 Current Address Read
The 24XX01 contains an address counter that
maintains the address of the last word accessed,
inter nal ly i nc rem ente d by ‘ 1’. Th eref ore, if the p reviou s
access (either a read or write operation) was to
address n, the next current address read operation
would access data f rom add ress n + 1 . Upon re ceipt of
the slave address with R/W bit set to ‘1’, the 24XX01
issues an acknowledge and transmits the 8-bit data
word. Th e master w ill n ot acknowl edge th e trans fer but
does generate a Stop condition and the 24XX01
discontinues transmission (Figure 7-1).
7.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this typ e of re ad ope ratio n, th e w ord add res s mus t firs t
be set. This is accomplished by sending the word
address to the 24XX01 as part of a write operation.
Once th e word address is s ent, the master ge nerates a
Start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal address pointer is set. The master then issues the
control byt e agai n, but wi th the R/ W bit se t to a ‘ 1’. The
24XX01 will then issue an acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the tr ansfer bu t does ge nerate a Stop con dition an d the
24XX01 discontinues transmission (Figure 7-2).
7.3 Sequentia l Read
Sequential reads are initiated in the same way as a
random read, except that once the 24XX01 transmits
the first data byte, the master issues an acknowledge
(as opposed to a S top condition in a random read). This
directs the 24XX01 to transmit the next sequentially
addressed 8-bit word (Figure 7-3).
To provide sequential reads the 24XX01 contains an
internal address poin ter which is inc remented by o ne at
the com ple tio n o f each ope rati on. Thi s a ddress pointer
allows the entire memory contents to be serially read
during one operation.
7.4 Noise Protection
The 24XX01 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5V at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
FIGURE 7-1: CURRENT ADDRESS READ
SP
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
O
P
CONTROL
BYTE DATA (n)
A
C
KN
O
A
C
K
S
T
A
R
T
24AA01/24LC01B
DS21711C-page 10 2003 Microchip Technology Inc.
FIGURE 7-2: RANDOM READ
FIGU RE 7-3 : SEQU E NTI AL REA D
S P
S
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
A
C
K
WORD
ADDRESS (n) CONTROL
BYTE
S
T
A
R
TDATA (n)
A
C
KA
C
KN
O
A
C
K
P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
O
P
CONTROL
BYTE
A
C
KN
O
A
C
K
DATA (n) DATA (n + 1) DATA (n + 2) DATA (n + X)
A
C
KA
C
KA
C
K
2003 Microchip Technology Inc. DS21711C-page 11
24AA01/24LC01B
8.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 8-1.
TABLE 8-1: PIN FUNCTION TABLE
8.1 A0, A1, A2
The A0, A1 and A2 pins are not used by the 24XX01.
They may be left floating or tied to either VSS or VCC.
8.2 Serial Address/Data Input/Output
(SDA)
The SDA input is a bidirectional pin used to transfer
addresse s and data into an d out of the device . Since
it is an open-drain terminal, the SDA bus requires a
pull-up resistor to VCC (typical 10 kΩ for 100 kHz,
2kΩ fo r 40 0 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
8.3 Serial Clock (SCL)
The SCL in put is u sed to sy nc hro niz e th e da t a tra nsfer
to and from the device.
8.4 Wr it e-Protect (WP)
This pin must be connected to either VSS or VCC.
If tied to VSS normal memory operation is enabled
(read/wri te the ent ire mem ory 00-7F).
If tied to VCC, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
This feature allows the user to use the 24XX01 as a
serial ROM when WP is enabled (tied to VCC).
Name PDIP SOIC TSSOP MSOP SOT23 Description
A0 1 1 1 1 — Not Connected
A1 2 2 2 2 — Not Connected
A2 3 3 3 3 — Not Connected
VSS 44 4 42Ground
SDA 5 5 5 5 3 Serial Address/Data I/O
SCL 6 6 6 6 1 Serial Clock
WP 7 7 7 7 5 Write-Protect Input
VCC 8 8 8 8 4 +1.8V to 5.5V Power Supply
24AA01/24LC01B
DS21711C-page 12 2003 Microchip Technology Inc.
9.0 PACKAGING INFORMATION
9.1 Package Marking Information
XXXXXXXX
T/XXXNNN
YYWW
8-Lead PDIP (300 mil) Example:
8-Lead SOIC (150 mil) Example:
XXXXXXXX
T/XXYYWW
NNN
8-Lead TSSOP Example:
24LC01B
I/P13F
0327
24LC01B
I/SN0327
13F
8-Lead MSOP Example:
XXXX
TYWW
NNN
XXXXT
YWWNNN
4L1B
IYWW
NNN
4L1BI
32713F
Legend: XX...X Customer specific information*
T Te mp erat ure grad e (I,E)
YY Year code (last 2 digits of calendar year)
Y Year code (last digit of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note: In the event th e full Mi crochi p pa rt numbe r cannot be ma rked on on e line, it will
be carried ov er to the ne xt li ne thus lim iti ng th e nu mb er of av ai lab le c hara ct ers
for customer specific information.
*Standard QTP marking consists of Microchip part number, year code, week code, and traceability code.
5-Lead SOT-23 Example:
XXNN M13F
Part
Number
TSSOP/MSOP
Mark i ng Co de
STD Pb-Free
24AA01 4A01 G4A1
24LC01B 4L01 G4L1
Part Number SOT-23
Marking Code
STD Pb-Free
24AA01 B1 B1
24LC01B-I M1 M1
24LC01B-E N1 N1
Note: Pb-free part number using
“G” suffix is marked on
carton.
2003 Microchip Technology Inc. DS21711C-page 13
24AA01/24LC01B
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
B1
B
A1
A
L
A2
p
α
E
eB
β
c
E1
n
D
1
2
Units INCHES* MILLIMETERS
Dime nsion Limits MIN NOM MAX MIN NOM MAX
Number of Pins n88
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder W idt h E .300 .313 .325 7.6 2 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top α51015 51015
Mold Draft Angle Bottom β51015 51015
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
JEDEC Equivalent: MS-001
Drawing No. C04-018
.010” (0.254mm) per side.
§ Significant Characteristic
24AA01/24LC01B
DS21711C-page 14 2003 Microchip Technology Inc.
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
Foot A ngle φ048048
1512015120
β
Mold Draft Angle Bottom 1512015120
α
Mold Draft Angle Top 0.510.420.33.020.017.013BLead Width 0.250.230.20.010.009.008
c
Lead Thickness
0.760.620.48.030.025.019LFoot Length 0.510.380.25.020.015.010hChamfer Distance 5.004.904.80.197.193.189DOverall Length 3.993.913.71.157.154.146E1Molded Pa ckag e Width 6.206.025.79.244.237.228EOverall Width 0.250.180.10.010.007.004
A1
Standoff § 1.551.421.32.061.056.052A2Molded Packag e Thickness 1.751.551.35.069.061.053AOverall Height 1.27.050
p
Pitch 88
n
Numb er of Pin s MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units
2
1
D
n
p
B
E
E1
h
L
β
c
45°
φ
A2
α
A
A1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
§ Significant Characteristic
2003 Microchip Technology Inc. DS21711C-page 15
24AA01/24LC01B
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
10501050
β
Mold Draft Angle Bottom 10501050
α
Mold Draft Angle Top 0.300.250.19.012.010.007BLead Wi dth 0.200.150.09.008.006.004
c
Lead Thickness
0.700.600.50.028.024.020LFoot Length 3.103.002.90.122.118.114DMolded Package Length 4.504.404.30.177.173.169E1Mold ed Pa ckag e Width 6.506.386.25.256.251.246EOverall Width 0.150.100.05.006.004.002
A1
Standoff § 0.950.900.85.037.035.033A2Molded Pa ckag e Thick ness 1.10.043AOverall Height 0.65.026
p
Pitch 88
n
Number of Pins MAXNOMMINMAXNOMMINDimensi on Li mits MILLIMETERS*INCHESUnits
α
A2
A
A1
L
c
β
φ
1
2D
n
p
B
E
E1
Foot A ngle φ048048
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
§ Significant Characteristic
24AA01/24LC01B
DS21711C-page 16 2003 Microchip Technology Inc.
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
D
A
A1
L
c
(F)
α
A2
E1
E
p
B
n 1
2
φ
β
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
.037 REFFFootprint (Reference)
exceed .010" (0.254mm) per side.
Notes:
Drawing No. C04-111
*Controlling Parameter
Mold Draft Angle Top
Mold Draft Angle Bottom
Foot Angle
Lead Width
Lead Thickness
β
α
c
B
φ
.003
.009
.006
.012
Dimension Limits
Overall Height
Molded Package Thickness
Molded Package Width
Overall Length
Foot Length
Standoff
Overall Width
Number of Pins
Pitch
A
L
E1
D
A1
E
A2
.016 .024
.118 BSC
.118 BSC
.000
.030
.193 TYP.
.033
MIN
p
n
Units
.026 BSC
NOM
8
INCHES
0.95 REF
-
-
.009
.016
0.08
0.22
0°
0.23
0.40
8°
MILLIMETERS*
0.65 BSC
0.85
3.00 BSC
3.00 BSC
0.60
4.90 BSC
.043
.031
.037
.006
0.40
0.00
0.75
MIN
MAX NOM
1.10
0.80
0.15
0.95
MAX
8
--
-
15°5° -
15°5° -
JEDEC Equivalent: MO-187
0° - 8°
5°
5° -
-
15°
15°
--
--
2003 Microchip Technology Inc. DS21711C-page 17
24AA01/24LC01B
5-Lead Plastic Small Outline Transistor (OT) (SOT-23)
10501050
β
Mold Draft Angle Bottom 10501050
α
Mold Draft Angle Top 0.500.430.35.020.017.014BLead W idth 0.200.150.09.008.006.004
c
Lead Thickness 10501050
φ
Foot A ngle 0.550.450.35.022.018.014LFoot Length 3.102.952.80.122.116.110DOverall Length 1.751.631.50.069.064.059E1Mold ed Packag e Width 3.002.802.60.118.110.102EOverall Width 0.150.080.00.006.003.000A1Standoff § 1.301.100.90.051.043.035A2Mold ed Packag e Thick ness 1.451.180.90.057.046.035AOverall Height 1.90.075
p1
Outside lead pitch (basic) 0.95.038
p
Pitch 55
n
Number of Pins MAXNOMMINMAXNOMMINDimensi on Li mits MILLIMETERSINCHES*Units
1
p
D
B
n
E
E1
L
c
βφ
α
A2
A
A1
p1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
§ Significa nt Charact eristic
24AA01/24LC01B
DS21711C-page 18 2003 Microchip Technology Inc.
APPENDIX A: REVISIO N HIST ORY
Revision C
Corrections to Section 1.0, Electrical Characteristics.
Section 9.1, 24LC01B standard marking code.
2003 Microchip Technology Inc. DS21711C-page 19
24AA01/24LC01B
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used b y Micr ochip as a me ans to mak e
files and information easily available to customers. To
view t he site, the user must have acce ss to the In ternet
and a web browser, such as Netscape® or Microsoft®
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet
Web S ite
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errat a
• Job Postin gs
• Microch ip Consultant Pr ogram Member Listing
• Links to other useful web sites related to
Microchip Products
• Confere nces for prod ucts, Dev elopment Systems,
technical information and more
• Listing of seminars and events
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the mo st current upgrade kits. The Hot Line
Numbe rs are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
24AA01/24LC01B
DS21711C-page 20 2003 Microchip Technology Inc.
READER RESPONSE
It is ou r intentio n to provide you with the b es t do cument a t ion po ss ib le to e ns ure suc c es sfu l u se of y ou r M icr oc hip pro d-
uct. If you wi sh to prov ide you r comment s on org anizatio n, clar ity, subj ect matte r , and ways i n which o ur docum entatio n
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To: Technical Publications Manager
RE: Reader Response Total Pages Sent ________
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Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
FAX: (______) _________ - _________
DS21711C24AA01/24LC01B
1. What are the best featu res of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
2003 Microchip Technology Inc. DS21711C-page21
24AA01/24LC01B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. F AX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Dat a Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.m icrochip.com /cn) to receive the most current information on our products.
PART NO. X/XX
PackageTemperature
Range
Device
Device: 24AA01: = 1.8V, 1 Kbit I2C™ Serial EEPROM
24AA01T: = 1.8V, 1 Kbit I2C Seri al EEPR OM
(Tape and Reel)
24LC01B: = 2.5V, 1 Kbit I2C Seria l EEPROM
24LC01BT: = 2.5V, 1 Kbit I2C Serial EE PR OM
(Tape and Reel)
Temperature
Range: I = -40°C to +85°C
E = -40°C to +125°C
Package:
Lead finish
P = Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (150 mil body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-l ead
MS = Plastic Micro Small Outline (MSOP), 8-lead
OT = SOT-23, 5-lead (Tape and Reel only)
Blank =Standard 63/37 SnPb
G =Mat te Tin (pure Sn)
Examples:
a) 24AA01-I/P: Industrial Temperature,1.8V
PDIP package
b) 24AA01-I/SN: Industrial Temperature,
1.8V, SOIC package
c) 24AA01T-I/OT: Industrial Temperature,
1.8V, SOT-23 package, tape and reel
d) 24LC01B-I/P: Industrial Temperature,
2.5V, PDIP package
e) 24LC01B-E/SN: Extended Temperature,
2.5V, SOIC package
f) 24LC01BT -I/OT: Industrial Temperature,
1.8V, SOT-23 package, tape and reel
g) 24LC01B-I/PG: Industrial Temperature,
2.5V PDIP package, Pb-free
h) 24LC01BT-I/OTG: Industrial Temperature,
2.5V, SOT-23 package, tape and reel,
Pb-free
Lead Finish
X
24AA01/24LC01B
DS21711C-page 22 2003 Microchip Technology Inc.
NOTES:
2003 Microchip Technology Inc. DS21711C-page 23
Information contained in this publication regarding device
applications and the like is intended through sug gestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microc hip Technology Incorporated with respect
to the accuracy or use of such inf orm ation, or inf ringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PI Cmicro, PIC START,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor , SmartShunt, SmartTel and Tot al Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the co de protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such ac t s
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and M ountain View, California i n March 20 02.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, micr operipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of developmen t
systems is ISO 9001 certified.
DS21711C-page 24 2003 Microchip Technology Inc.
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