(S) MOTOROLA Advance Information High Performance Current Mode Controllers The UC3844, UC3845 series are high performance fixed frequency current mode controllers. They are specifically designed for Off-Line and dc-to-de converter applications offering the designer a cost effective solution with minimal external components. These integrated circuits feature an oscillator, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totem pole output ideally suited for driving a power MOSFET. : 7 Also included are protective features consisting of input and reference undervoltage lockouts each witn hysteresis, cyclebycycle current limiting, a latch for single pulse metering, and a flip~flop which blanks the output off every other oscillator cycle, allowing output deadtimes to be programmed for 50% to 70%. These devices are available in an 8pin dual-inline plastic package as well as the 14pin plastic surface mount (SO-14). The SO-14 package has separate power and ground pins for the totem pole output stage. The UCX844 has UVLO thresholds of 16 V (on) and 10 V (off), ideally suited for off-line converters. The UCX845 is tailored for lower voltage applications having UVLO thresholds of 8.5 V (on) and 7.6 V (off). Current Mode Operation to 500 kHz Output Switching Frequency Output Deadtime Adjustable from 50% to 70% Automatic Feed Forward Compensation Latching PWM for CycleByCycle Current Limiting Internally Trimmed Reference with Undervoltage Lockout High Current Totem Pole Output Input Undervoltage Lockout with Hysteresis Low Startup and Operating Current Direct Interface with Motorola SENSEFET Products Simplified Block Diagram UC3844, 45 UC2844, 45 HIGH PERFORMANCE CURRENT MODE CONTROLLERS N SUFFIX PLASTIC PACKAGE CASE 626 D SUFFIX PLASTIC PACKAGE CASE 7514 (SO-14) PIN CONNECTIONS Compensation Voltage Feedback [2 | Current Sense | 3 | RylCy | 8 | Vet Yoo 6 | Output | | Gnd Compensation [+ | ne [2 | Voltage Feedback [3 | ne [ 4] Current Sense [5 | ne [6 | 14] Vret [#3] No 12] Vec Five [10] Output [2 Gnd po et 2 Ryley [7 | | 8 | Power Ground Veet | BV Veco | aia) O at Undervoltage (Top View} (14) Reference Lockout | -. ORDERING INFORMATION | Vref | | R Undervotage tty Operating | Lockout | | Device | Temperature Range| Package imo Flip fot 3 ain ucsed4D sO-14 . Flop - Voltage Latohing | PwRGND UC3B46D Ta = 0 to +70C so Feedback BWM TFP 50) UC3844N Plastic 2(3) a - . | Curent 1 amet k | Sone UC3845N Plastic 11) of] - i UG2844D SO-14 eT Ro ! Comp. Gnd 5(8) UC2845D Ta =25 to +85C so-"4 Pin numbers in parenthesis are for the D suffix SO-14 package, UGAB44N Plastic UC2845N Plastic MOTOROLA ANALOG IC DEVICE DATA 3-573UC3844, 45 UC2844, 45 MAXIMUM RATINGS Rating Symbol Value Unit Tota! Power Supply and Zener Currnt (Ic + !2) 30 mA Output Current, Source or Sink (Note 1} lo 1.0 A Output Energy (Capacitive Load per Cycle) Ww 5.0 pd Current Sense and Voltage Feedback Inputs Vin 0.3 to + 5.5 Vv Error Amp Output Sink Current. | lo 10 mA Power Dissipation and Thermal Characteristics D Suffix, Plastic Package, Case 751A Maximum Power Dissipation @ Ta = 25C Pb 862 mw Thermal Resistance Junction-to~Air Rega 145 C/W N Suffix, Plastic Package, Case 626 Maximum Power Dissipation @ Ta = 25C Pp 1.25 Ww Thermal Resistance Junction-teAir Rega 100 C/W Operating Junction Temperature Ty + 150 C Operating Ambient Temperature Ta C UC3844, UC3845 Oto+70 UC2844, UC2845 - 25 to + 85 Storage Temperature Range Tstg ~ 65 to + 150 ELECTRICAL CHARACTERISTICS (Vcc = 15 V, [Note 2], RT = 10k, Cr = 3.3 nF, Ta = Tiow t0 Thigh [Note 3], unless otherwise noted.) UC284xX UC384X Characteristics Symbol Min | Typ | Max Min | Typ | Max Unit REFERENCE SECTION ; _ oo. oo _ Reference Output Voltage (Iq = 1.0 mA, Ty = 25C) Vret 4.95 5.0 5.05 | 49 5.0 5.1 Vv Line Regulation (Voc = 12 V to 25 V) Regtine > 2.0 20 - 2.0 20 mv Load Regulation (ig = 1.0 mA to 20 mA) Regioad - 3.0 25 - 3.0 25 mv Temperature Stability 7 Ts - 02 - - 02 - | mvrc Total Output Variation over Line, Load, Temperature Vrat 49 ~ 5.1 4.82 _ 5.18 Vv Output Noise Voltage (f = 10 Hz to kHz, Ty = 25C) Vn _ 50 - - 50 ~ uv Long Term Stability (Ta = 125C for 1000 Hours) S$ - 5.0 - - 5.0 _ mV Output Short Circuit Current Isc -30 ~ 85 180 -30 85 180 mA OSCILLATOR SECTION Frequency fosc kHz Ty=269C 47 52 57 47 52 57 TA = Tiow '0 Thigh 46 - 60 46 -~ 60 Frequency Ghange with Voltage (Vog = 12Vto25V) | Afggg/Ay - 0.2 1.0 - 0.2 1.0 % Frequency Change with Temperature : Afoso/AT - 5.0 - - 5.0 - % TA = Tlow to Thigh : Oscillator Voltage Swing (Peakto-Peak) Vose _ 1.6 - - 1.6 - Vv Discharge Current (Vogq = 2.0 V, Ty = 25C) Idischg - | ws | - ios | - mA NOTES: 1. Maximum Package power dissipation limits must be observed. 2. Adjust Voc above the Startup threshold before setting to 15 V. - 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to amblent as possible Tiow = 0C for UC3844, icas4s 25C for UC2844, UC2845 Thigh = +70C for UC3844, UC3845 +85C for UG2844, UC2845 3-574 MOTOROLA ANALOG IC DEVICE DATAUC3844, 45 UC2844, 45 ELECTRICAL CHARACTERISTICS (Vcc = 15 V, [Note 2], RT = 10k, CT = 3.3 nF, TA = Tow 0 Thigh [Note 3], unless otherwise noted,) ~ " uc2sax | ~~ UC3B4Xx . Characteristics Symbol Min | Typ Max Min | Typ | Max | Unit ERROR AMPLIFIER SECTION - oe _ Voltage Feedback Input (Vo = 2.5 V) VEB 2.45 2.5 2.55 2.42 2.5 2.58 Vv Input Bias Current (VER = 2.7 V) lip - -0.1 -1.0 - -0.1 -2.0 Open Loop Voltage Gain (Vo = 2.0 V to 4.0 V) AVOL 65 90 - 65 90 - dB Unity Gain Bandwidth (Ty = 25C) Se BW 0.7 1.0 - 0.7 1,0 - MHz Power Supply Rejection Ratio (Voc = 12 V to 25 V) PSRR 60 70 - 60 70 - dB Quiput Current . mA Sink (Vo = 1.1 V, VeB = 2.7 V) Isink 2.0 12 - -| 20 12 - Source (Vo = 5.0 Vv, VFB = 2.3 V) . Source -0.5 -1.0 - -0.5 -1.0 - Output Voltage Swing Vv High State (Rp = 15k to ground, Veg = 2.3 V} VOH 5.0 6.2 - 5.0 6.2 - Low State (RL = 15 k to Vref, VER = 2.7 V) VOL - 0.8 14 - 0.8 11 CURRENT SENSE SECTION ; Current Sense Input Voltage Gain (Notes 4&5) ~ Ay 2.85 3.0 3.45 2.85 3.0 3.15 VV Maximum Current Sense Input Threshold (Note 4) Vth 0.9 1.0 11 0.9 1.0 Ww Vv Power Supply Rejection Ratio PSRR dB Voc = 12 V to 25 V (Note 4) - 70 - - 70 ~ Input Bias Curtent . - , lip - -2.0 | -10 - ~2.0 | -10 BA Propagation Delay (Garren Sense Input to Output) | tPLHUIN/CUT) - 150 300 - - 150 300 ns OUTPUT SECTION a : ee Output Voltage . Vv Low State (Isink = 20 mA) VoL - 0.1 0.4 - 0.1 0.4 (Isink = 200 mA) - 1.6 22 - 1.6 2.2 High State (Isink = 20 mA) VOH 12 13.5 _ 13 13.5 - (lsink = 200 mA) , 12 13.4 - 12 13.4. - Output Voltage with UVLO Activated VOL(UVLO) Vv Voc = 6.0 V, Isink = 1.0 mA a 0.1 11 - 0.4 ra} Output Voltage Rise Time (CG, = 1.0 nF, Tye 25) tr - 50 150 - 50 150 ns Output Voltage Fall Time (CL = 1.0 nF, Ty = 25C) ff - 50 150 - 50 150 ns UNDERVOLTAGE LOCKOUT SECTION ; _ _. Startup Threshold Vih Vv UCX844 15 16 17 14.5 16 17.5 UCX845 7.8 8.4 9.0 7.8 3.4 9.0 Minimum Operating Voltage After TurnOn Voc(min) Vv UCx844 . 9.0 10 YW 8.5 40 11.5 UCX845 - - 7.0 7.6 8.2 7.0 7.6 8.2 PWM SECTION . _ ae Duty Cycle - % Maximum DCmax 46 48 50 47 48 50 Minimum . DCmin - - 0 - - G TOTAL DEVICE ; Power Supply Current (Note 2) loc mA Startup: a (Vcc = 6.5 V for UCX845A, - 0.5 1.0 - 0.5 1.0 14 V for UCX844) Operating - 12 17 - 12 17 Power Supply Zener Voltage (Ico = 25 mA) _ Vz 30 36 - 30 36 - Vv NOTES: 2. Adjust Voc above the Startup threshold before setting t to 15 V. 3. Low duty cycle pulse techniques are used during test fo maintain junction temperature as close to ambient as possibte Tlow = -OC for UC3844, UC3845 Thigh = +70C for UC3844, UC3B45 25C for UC2844, UC2845 +85C for UC2844, UC2845 4, This parameter is measured at the latch trip point with Vep = 0 V. . AV Output Compensation 5. Comparator gain is defined as: Ay AV Current Sense tnput MOTOROLA ANALOG IC DEVICE DATA 3-575UC3844, 45 UC2844, 45 Figure 1. Timing Resistor versus Oscillator Frequency 400 Veco =18V 50 Tq = 25C q = cr 20 % i 10 8 50 = Ee . E 20 : at one-half the oscillator 1.0 10k 20k 50k 100k 200k 500k 10M fogc, OSCILLATOR FREQUENCY (Hz) Figure 3. Error Amp Smail Signal Transient Response 2.55 Ve 25V 2.45 V8 Figure 5. Error Amp Open Loop Gain and Phase versus Frequency 100 nes nn i 0 Vec=15V Vo =20V to 4.0 V| 80 Sain RL=100k 30 Ta = 26C 60 NN 60 = 90 oS Phase 120 \ 150 ho Qo So AVOL, OPEN LOOP VOLTAGE GAIN (dB) tf oa ESS PHASE DEGREES oO % DT, PERCENT OUTPUT DEADTIME Figure 2. Output Deadtime versus Oscillator Frequency 10k 20k BOk 100k 200k 500k = 1.0M foge: OSCILLATOR FREQUENCY (Hz) Figure 4. Error Amp Large Signa! Transient Response Vth. CURRENT SENSE INPUT THRESHOLD (V) cS sy o S bo oS an 2 o ro 1.0 psiDIV Figure 6. Current Sense Input Threshold versus Error Amp Output Voltage Ta = 125C TA= Ta =~55C Vcc=i6V -20 180 9 i0 100 1.0k 10k 1aok 610M 10M 0 2.0 4.0 6.0. 3.0 f, FREQUENCY (Hz) Vo, ERROR AMP OUTPUT VOLTAGE {Vo} 3-576 MOTOROLA ANALOG IC DEVICE DATAUC3844, 45 UC2844, 45 - Figure 7. Reference Voltage Change versus Source Current 4h ok db of a ns 92 S&F & & Ta = A Vref , REFERENCE VOLTAGE CHANGE (mv) | ho a4 20 40 60 80 100 lref, REFERENCE SOURCE CURRENT (mA) oa Figure 9. Reference Load Regulation oC A Vo, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV) 2.0 ms/DIV Figure 11. Output Saturation Voltage versus Load Current = Source __ Veo = fo 80 ys Bus ~ 120 ( _ o ib Qo Ta =-55C ee o np o = 2 Sink Saturation (Load to Voc) 400 Ig, OUTPUT LOAD CURRENT (mA) Vat. OUTPUT SATURATION VOLTAGE (V) Gnd 600 oO a 200 120 15V ed Load Rate t h (mA) Igc, REFERENCE SHORT CIRCUIT ~ Qo Figure 8. Reference Short Circuit Current versus Temperature _ = i=} o ' oOo a 2 A Vo, OUTPUT VOLTAGE CHANGE (2.0 m/DIV) Voeo=15V _| RAL <01Q ae NK Mh, MA os 55 5 0 25 50 78 100 128 Ta, AMBIENT TEMPERATURE (C) Figure 10. Reference Line Regulation a ES me VCC = 12 Vio 25 V mA = 25C 90% en or 10% Suna MOTOROLA ANALOG IC DEVICE DATA 3-577UC3844, 45 UC2844, 45 Figure 14. Supply Current versus WW Figure 13. Output Cross Conduction Supply Voltage a , 25 > , > = 2 | a = 20 5 = iL 3 18 zi 2] c 15 oO > & : Z & 10 +t Rr=10k + fF | > zB 1 | ' C7 =3.3 nF 3 q 3 4 Veg =0V > E 2 5tx Ah | Re ISense=OV 5] a 2 5} 4] 5 Ta = 25C 5 a. | a E 0 8 400 ns/DIV 0 10 _ 20 _ 30 a Voc, SUPPLY VOLTAGE (V) _ PIN FUNCTION DESCRIPTION ; . Pin 8-Pin 14-Pin Function Description _ 1 1 Compensation This pin is Error Amplifier output andis made available for loop compensation. 2 3 Voltage This is the inverting input of the Error Amplifier. It is normally connected to the switching power Feedback supply output through a resistor divider. 3 5 Current Sense A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. 4 7 Rqy/Cy The Oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT tO Vref and capacitor CT to ground. Operation to 1 0 Mrz ts possible. 5 - Gnd This pin is combined control circuitry and power ground (8-pin package only). / ; 6 10 Output This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced and sunk by this pin. The output switches at one-half the oscillator frequency. 7 12 Voc This pin is the positive supply of the control iC. ; 8 14 Vref This is the reference output. It provides charging current for capacitor Orr through resistor Rr. - 8 Power Ground This pin Is a separate power ground return (14-pin package only) that is connected back to the power source. Itis used to reduce the effects of switching transient noise on th control circuitry. - 1 Vo The Output high state (VQH) is set by the voltage applied to this pin (14-pin package only). With a separate power source connection, it can reduce the effects of switching transient nolse on the contro! circuitry. ; oo _ 9 Gnd This pin is the contro! circuitry ground return (14-pin package only) and is connected to back to the power source ground. - . 2,4,6,13 | NC No connection (14~pin package only}. These pins are not internally connected. 3-578 MOTOROLA ANALOG IC DEVICE DATAUC3844, 45 UC2844, 45 OPERATING DESCRIPTION The UC3844, UC3845 series are high performance, fixed frequency, current mode controllers. They are specifically designed for Off-Line and dcto-dce converter applications offering the designer a cost effective solution with minimal external components. A representative block diagram is shown in Figure 15. Oscillator The oscillator frequency is programmed by the values selected for the timing components Rt and Cy. Capacitor CT is charged from the 5.0 V reference through resistor RT to approximately 2.8 V and discharged to 1.2 V by an internal current sink. During the discharge of C7, the oscillator generates an internal blanking pulse that holds the center input of the NOR gate high. This causes the Output to be ina low state, thus producing a controlled amount of output deadtime. An internal flip-flop has been incorporated in the UCX844/5 which blanks the output off every other clock cycle by holding one of the inputs of the NOR gate high. This in combination with the Cr discharge period yields output deadtimes programmable from 50% to 70%. Figure 1 shows Rr versus Oscillator Frequency and figure 2, Output Deadtime versus Frequency, both for given values of Cy. Note that many values of RT and CT will give the same oscillator frequency but only one combination will yield a specific output deadtime at a given frequency. In many noise sensitive applications it may be desirable to frequencylock the converter to an external system clock. This can be accomplished by applying a clock signal to the circuit shown in Figure 17. For reliable locking, the free-running oscillator frequency should be set about 10% less than the clock frequency. A method for multi unit synchronization is shown in Figure 18. By tailoring the clock waveform, accurate Output duty cycle clamping can be achieved to realize output deadtimes of greater than 70% Error Amplifier A fully compensated Error Amplifier with access to the inverting input and output is provided. It features a typical de voltage gain of 90 dB, and a unity gain bandwidth of 1.0 MHz with 57 degrees of phase margin (Figure 5). The noninverting input is internally biased at 2.5 V and is not pinned out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum input bias current is -2.0 uA which can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. The Error Amp Output (Pin 1) is provide for external loop compensation (Figure 28). The output voltage is offset by two diode drops (= 1.4 V) and divided by three before it connects to the inverting input of the Current Sense Comparator. This guarantees that no drive pulses appear at the Output (Pin 6) when Pin 1 is at its lowest state (VoL). This occurs when the power supply is operating and the load is removed, or at the beginning of a soft-start interval (Figures 20, 21). The Error Amp minimum feedback resistance is limited by the amplifiers source current (0.5 mA) and the required output voltage (VOH) to reach the comparators 1.0 V clamp level: 8.0 (1.0 V) + 1.4 V_ Re(min) = 6.5 mA = 8800 _ Current Sense Comparator and PWM Latch The UC3844, UC3845 operate as a current mode controller, whereby output switch conduction is initiated by the oscillator and terminated when the peak inductor current = reaches the threshold level established by the Error Amplifier - Output/Compensation (Pin1). Thus the error signal controls ~~ the inductor current on a cyclebycycle basis. The current Sense Comparator PWM Latch configuration used ensures that only a single pulse appears at the Output during any given oscillator cycle. The inductor current is converted to a _ voltage by inserting the ground referenced sense resistor Rg - in series with the source of output switch Q1. This voltage is monitored by the Current Sense Input (Pin 3) and compared - a level derived from the Error Amp Output. The peak inductor . current under normal operating conditions is controlled by the voltage at pin 1 where: lok = V(Pin. 1-7 14V 3Rs Abnormal operating conditions occur when the power supply output is overloaded or if output voltage sensing is lost. Under these conditions, the Current Sense Comparator . threshold will be internally clamped to 1.0 V. Therefore the maximum peak switch current is: 1.0V Ipk(max) = 5 When designing a high power switching regulator it becomes desirable to reduce the internal clamp voliage in order to keep the power dissipation of Rg to a reasonable level. A simple method to adjust this voltage is shown in ~ Figure 19, The two external diodes are used to compensate the internal diodes yielding a constant clamp voltage over temperature. Erratic operation due to noise pickup can result if there is an excessive reduction of the Ipk(max) clamp voltage. A narrow spike on the leading edge of the current waveform can usually be observed and may cause the power supply to exhibit an instability when the output is lightly loaded. This spike is due to the power transformer interwinding capacitance and output rectifier recovery time. The addition of an RC filter on the Current Sense Input with a time constant that approximates the spike duration will usually eliminate the instability; refer to Figure 23. MOTOROLA ANALOG IC DEVICE DATA 3-579UC3844, 45 UC2844, 45 Figure 15. Representative Block Diagram Vgc Vin ane eee 1 ! . 36V Vref | Reference _ | a(t 4 t Regulator 4 i | R intemal | Bias __ | =| Are | | I - | be 1 4 K+ ory : Voltage Feedback o Input 2 Latch ! sense| Current Sense Input Output. 1.0V 8G = Compensation o Current Sense 1 316) ten = Comparator - | Fs SinkOny BC oa ~ Positive True Logic ~ Pin numbers in parenthesis are for the D sutfix SO-14 package. ~ Figure 16. Timing Diagram fm i LLL JU UU Outputf . co ee ae a Current Sense > - OL : Input - - 8 we LE Ek. Large Rq/Small Cr Small Ry/Large Cr 3-580 MOTOROLA ANALOG IC DEVICE DATAUC3844, 45 UC2844, 45 Undervoltage Lockout Two undervoltage lockout comparators have been incorporated to guartantee that the IC is fully functional before the output stage is enabled. The positive power supply terminal (Vcc and the reference output (Vref) are each monitored by separate comparators. Each has built-in hysteresis io prevent erratic output behavior as their respective thresholds are crossed. The Vcc comparator upper and lower thresholds are 16 V/10 V for the UCX844, and 8.4 V/7.6 V for the UCX845. The Vref comparator upper and lower thresholds are 3.6 V/3/4 V. The large hysteresis and low startup current of the UCX844 makes it ideally suited in off-line converter applications where efficient bootstrap startup techniques later required (Figure 29). The UCX845 is intended for lower voltage dctodc converter applications. A 36 V zener is connected as a shunt regulator irom Vcc to ground. Its purpose is to protect the IC from excessive voltage that can occur during system startup. The minimum ~ operating voltage for the UCX844 is 11 V and 8.2 V for the UCX845. Output These devices contain a single totem pole output stage that was specifically designed for direct drive of power MOSFETs. It is capable of up to + 1.0 A peak drive current and has a typical rise and fall time of 50 ns with a 1.0 nF load. Additional internal circuitry has been added to keep the Output in a sinking mode whenever and undervoltage lockout is active. This characteristic eliminates the need for an external pullciown resistor. The SO-14 surface mount package provides separate pins for Vc (output supply) and Power Ground. Proper implementation will significantly reduce the level of switching transient noise imposed on the control circuitry. This becomes particularly useful when reducing the Ink(max) clamp level. The separate Vo supply input allows the designer Figure 17. External Clock Synchronization Rr External L Syne 0.01 AST Input =o] , JUL a} The diode clamp |s required if the Sync amplitude is large enough to cause the bottom side of CT to go more than 300 mV below ground. fz _i44 (Ra + 2Rp)C added flexibility in tailoring the drive voltage independent of Voc, A zener clamp is typically connected to this input when driving power MOSFETs in systems where Vcc is greater the 20 V. Figure 22 shows proper power and control ground connections in a current sensing power MOSFET application. Reference The 5.0 V bandgap reference is trimmed to + 1.0% - tolerance at Ty = 25C on the UC284x, and + 2.0% on the UC384X. Its primary purpose is to supply charging current to the oscillator timing capacitor. The reference has short circuit protection and is capable of providing in excess of 20 mA for powering additional control system circuitry. Design Considerations Do not attempt to construct the converter on _wire-wrap or plug-in prototype boards. High frequency circuit layout techniques are imperative to preveni pulsewidth jitter. This is usually caused by excessive noise pick-up imposed on the Current Sense or Voltage Feedback inputs. Noise immunity can be improved by lowering circuit impedances at these points. The printed circuit layout should contain a ground plane with fow-current signal and high-current switch and output grounds returning on separate paths back to the input filter capacitor. Ceramic bypass capacitors (0.1 .F) connected directly to Voc, Vc. and Vref may be required depending upon circuit layout. This provides a low impedance path for filtering the high frequency noise. All high current loops should be kept as short as possible using heavy copper runs to minimize radiated EMI. The Error Amp compensation circuitry and the converter output voltage divider should be located close to the !C and as far as possible from the power switch and other noise generating componenis. Figure 18. External Duty Cycle Clamp and Multi-Unit Synchronization - To Additional Rg UeKeaxA's MOTOROLA ANALOG IC DEVICE DATA 3-581UC3844, 45 UC2844, 45 Figure 19. Adjustable Reduction of Clamp Level Figure 20. Soft~Start Circuit Veco : Vin po r = r al FR Pies i a j x | = I 1 [Heo 1 moo a al @ Volamp | aa | Y10mA ; 3 Re SE 23 EA aay EA) = 20a titi Of wie 1} s.,, 10 or Ca g Ri CNL a ta ee ee Rg a 2 5(9) + tsoft-Gtart S600C InpF 4.67 Ry Vi Volamp me +083x 103 ( Ait ; ) lok(max) ~ = (@ + Where: 0 Votamp $ 4.0V - Figure 21. Adjustable Buffered Reduction of Figure 22. Current Sensing Power MOSFET Clamp Level with Soft-Start Rg pk Ds(on} Vpin 5 = "DM(on) + Rg It SENSEFET = MTPION10M | Rg = 200 Then: Vpin 5 # 0.075 Ipk SENSEFET . Vin Power Ground e | To Input Source + (5) Ags Retum Control Circuitry 16 Ground: To Pin (9) Virtually lossiass current sensing can be achieved with the implement of a SENSEFET power switch, For proper operation during over current conditions, a reduction of the lak(max) Vetami Where: 0 Vamp $1.0 V loktmax) clamp level must be implemented, Refer to Figures 19 and 21. is : i Vg Ry Re =-In | i- c me . Te 'Sottstart [ 3Vo1amp | Fy +Ro Figure 23. Current Waveform Spike Suppression Vin | Qi c fn The addition of the AC filter will eliminate T i S _ Instabilityeaused by the leading edge spike on = = the current waveform, 3-582 MOTOROLA ANALOG IC DEVICE DATAUC3844, 45 UC2844, 45 Figure 24. MOSFET Parasitic Oscillations Figure 25. Bipolar Transistor Drive e._ Base Charge Removal a mz _ l Rs Series gate resistor Ry will damp any high frequency parasitic oscillations The totem-pole output can furnish negative base current for enhanced causadby the MOSFET input capacitance and any serles wirlnginductance "> > transistor turn-off, with the addition of capacitor Cy. fn the gate-source circuit. Figure 26. !solated MOSFET Drive Figure 27. Latched Shutdown Veoo { Vin - _ $ $ | 8 Isolation | Boundaty Vag Waveforms | ai Gs . Healer! bby of + ep 50% DC 25% DC it Vopin 1)=1 = ~ R ~ bk= ono Ge) The MCRi01 SCR must be selected for a holding of less than 0.5 mA at Tatmin), The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10k, Figure 28. Error Amplifier Compensation From Vo | | 25V . ; From Vo ag a aR reg Cj=R Rr | EA 4 | . Ras | = 1 pay T WL _. Ryp2 88k Error Amp compensation circuit for stabilizing any current-mode topology except Error Amp compensation circuit for stabilizing current-moda boost and flyback Jor boost and fiyback converters eperating with continuous inductor current. topologies operating with continuous inductor current. MOTOROLA ANALOG IC DEVICE DATA 3-5834,72 115Vac MDA 202 UC3844, 45 UC2844, 45 Figure 29. 27 Watt Off-Line Flyback Regulator ST 250 56K o+#. ang = 3300pF MBR18a5 TH MURTIO T4 Primary: 45 Tums #26 ANG Secondary + 12 V: 9 Tums # 80 AWG (2 strands} Bifillar Wound Secondary 5.0 V: 4 Turns (six strands) #26 Hexfillar Wound Secondary Feedback: 10 Tums #30 AWG (2 strands} Bifilar Wound Core: Ferroxcube EC35-3C8 Bobbin: Ferroxcube EC35PCBI Gap = 0.01 for @ primary inductance of 1.6 mH L1-15 pH at 5.0.4, Colleratt 27156, L2, 13~ 25 WA at 1.0 A, Coileraft 27157. uf _ pT -+-0 5 OVIAOA 2200 == 1000 YT, 5.0V FTN + 12V/0.34 H12V RIN -12V/0.3A, MURIIO 680pF La J 1 ang ' 1N4937 Test Conditions Results Line Regulation: 5.0V | Vin = 95 Vac to 180 Vac A= 50 mV ort 0.5% 12V A=24 mV ort01% Load Regulation: 5.0V | Vin = 115 Vac, Ioyt= 1.0 A to 4.0A A= 300 mV or+ 3.0% 12 V | Vin = 115 Vac, lout = 100 mA to 300 mA | A= 60 mV or + 0.25% Output Ripple: = 5.0V | Vin = 115 Vac 40 mpp +12V 80 mVpp Efficiency Vin = 115 Vac 70% All outputs are at nominal load currents, unless otherwise noted. 3-584 MOTOROLA ANALOG IC DEVICE DATAUC3844, 45 UC2844, 45 Figure 30. Step-Up Charge Pump Converter 0 Vin = 15V UC3845 . Output Load Regutation i a _ (open loop configuration) Ip (mA) Vo (V) a(i 4k t Reference 0 29.9 Regulator 9 28.8 1N5819 R Internal Q 28.3 : Bias 18 27.4 36 24,4 3 10k a 15 1 1NS5819 J = tr sp vom? in _ - i P| hay - T : Connect to T = Gd) Pin 2 for | R2 = | Closed loop eration. c | operation tL Error | 365) = Amplifier = { R2 1. Current Sense cont * Wo =25 (B +1} 3 Rt nn 4 | 5(9) The capacitors equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series rasistor may be required when using tantalum or other low ESR capacitors. The converter's output can provide excellent ine and load regulation by connecting the R2/R1 resistor divider as shown. Figure 31. Voltage-Inverting Charge Pump Converter Vin = 18V ucse45 7(12) : 47 _ en 34V 8(14) | . Reference o I kk ! Regulator - - | R Vag N +L | Internal UVLO x | Bias 4 ~ | 7) i5 10 : | g(10}- 1N5819 - -L VYo~~(v oe T | 1NS819 T 47 Tt 8 | 5(8) = = = a == R | PWM | = [ Latch | Output Load Regulation = Amplifier aan Ioima) | Vo) Current Sense _. 1 0 -14,4 = Comparator . - | * 2 13.2 ee 9 -12.5 18 -11.7 a: - oo ok 32 -10.6 The capacitor's equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series resistor may be required when using tantalum or other low ESR capacitors. MOTOROLA ANALOG IC DEVICE DATA 3-585