Micrel, IIIIInc. ULTRA PRECISION 8:1 MUX WITH INTERNAL TERMINATION AND 1:2 CML FANOUT BUFFER Precision Edge(R) (R) SY58037U Precision Edge SY58037U FEATURES Selects between 1 of 8 inputs, and provides two precision, low skew CML output copies Guaranteed AC performance over temperature and voltage: * DC to 5Gbps throughput * <450ps propagation delay IN-to-Q (VIN 300mV) * <70ps tr / tf time * <15ps skew (output-to-output) Unique, patent-pending, channel-to-channel isolation design provides superior crosstalk performance Ultra-low jitter design: * <1psRMS random jitter * <10psPP deterministic jitter * <10psPP total jitter (clock) * <0.7psRMS crosstalk-induced jitter Unique, patent-pending, input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS) 400mV CML output swing 50 source terminated outputs minimize round-trip reflections Power supply 2.5V 5% or 3.3V 10% -40C to +85C temperature range Available in 44-pin (7mm x 7mm) QFN package Precision Edge(R) DESCRIPTION The SY58037U is a low jitter, low skew, high-speed 8:1 multiplexer with a 1:2 differential fanout buffer optimized for precision telecom and enterprise server distribution applications. The SY58037U distributes clock frequencies from DC to 4GHz and data rates to 5Gpbs guaranteed over temperature and voltage. The SY58037U differential input includes Micrel's unique, 3-pin input termination architecture that directly interfaces to any differential signal (AC- or DC-coupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. The outputs are 50 source-terminated CML with extremely fast rise/fall time guaranteed to be less than 70ps. The SY58037U features a patent-pending isolation design that significantly improves channel-to-channel crosstalk performance. The SY58037U operates from a 2.5V 5% or 3.3V 10% supply and is guaranteed over the full industrial temperature range of -40C to +85C. The SY58037U is part of Micrel's high-speed, Precision Edge(R) product line. Datasheets and support documentation can be found on Micrel's web site at www.micrel.com. APPLICATIONS Data communication systems All SONET/SDH data/clock applications All Fibre Channel applications All Gigabit Ethernet applications United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. M9999-010708 hbwhelp@micrel.com or (408) 955-1690 Rev.: E 1 Amendment: /0 Issue Date: January 2008 Precision Edge(R) SY58037U Micrel, Inc. FUNCTIONAL BLOCK DIAGRAM IN0 50 VT0 50 /IN0 VREF-AC0 IN1 50 VT1 50 /IN1 IN2 50 8:1 MUX VT2 50 0 /IN2 VREF-AC1 IN3 1 50 50 Q0 3 /IN3 4 MUX IN4 50 5 50 6 VT4 /IN4 VREF-AC2 IN5 /Q1 S0 50 50 /IN5 IN6 50 VT6 50 /IN6 VREF-AC3 IN7 50 VT7 50 /IN7 SEL0 (CMOS/TTL) SEL1 (CMOS/TTL) SEL3 (CMOS/TTL) TRUTH TABLE SEL2 SEL1 SEL0 Q /Q L L L IN0 /IN0 L L H IN1 /IN1 L H L IN2 /IN2 L H H IN3 /IN3 H L L IN4 /IN4 H L H IN5 /IN5 H H L IN6 /IN6 H H H IN7 /IN7 2 /Q0 Q1 7 VT5 M9999-010707 hbwhelp@micrel.com or (408) 955-1690 1:2 Fanout 2 VT3 S2 S1 Precision Edge(R) SY58037U Micrel PACKAGE/ORDERING INFORMATION VT5 /IN5 IN6 VT6 /IN6 VREF-AC3 IN7 VT7 /IN7 SEL2 NV Ordering Information(1) 44 43 42 41 40 39 38 37 36 35 34 33 1 2 32 3 31 4 30 5 29 6 28 7 27 8 26 9 25 24 10 23 11 12 13 14 15 16 17 18 19 20 21 22 GND VCC /Q1 Q1 VCC GND VCC /Q0 Q0 VCC GND Package Type Operating Range Package Marking Lead Finish SY58037UMY QFN-44 Industrial SY58037U with Pb-Free bar-line indicator Pb-Free Matte-Sn SY58037UMYTR(2) QFN-44 Industrial SY58037U with Pb-Free bar-line indicator Pb-Free Matte-Sn Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. VT2 IN2 /IN1 VT1 IN1 VREF-AC0 /IN0 VT0 IN0 SEL0 SEL1 IN5 VREF-AC2 /IN4 VT4 IN4 NC /IN3 VT3 IN3 VREF-AC1 /IN2 Part Number 44-Pin QFN PIN DESCRIPTION Pin Number Pin Name Pin Function 20, 18, 16, 14, 13, 11, 9, 7, 5, 3, 1, 43, 42, 40, 38, 36 IN0, /IN0, IN1, /IN1, IN2, /IN2, IN3, /IN3, IN4, /IN4, IN5,/IN5, IN6, /IN6, IN7, /IN7 Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50. Note that these inputs will default to an indeterminate state if left open. Please refer to the "Input Interface Applications" section for more details. 19,15, 12, 8, 4, 44, 41, 37 VT0, VT1 VT2, VT3, VT4, VT5, VT6, VT7 Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT pins provide a center-tap to a termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. 17, 10, 2 39 VREF-AC0, VREF-AC1, VREF-AC2, VREF-AC3 Reference Voltage: This output biases to VCC-1.2V. It is used when AC coupling the inputs (IN, /IN). For AC-coupled applications, connect VREF_AC to the VT pin and bypass with a 0.01F low ESR capacitor to VCC. See "Input Interface Applications" section for more details. 21, 22, 35 SEL0, SEL1, SEL2 The TTL/CMOS-compatible inputs select the inputs to the multiplexer. Note that this input is internally connected to a 25k pull-up resistor and will default to a logic HIGH state if left open. 24, 27, 29, 32 VCC Positive Power Supply. Bypass with 0.1F0.01F low ESR capacitors as close to each VCC pin. 25, 26, 30, 31 Q0,/Q0, Q1,/Q1 23, 28, 33 GND, Exposed Pad Differential Outputs: These CML output pairs are the outputs of the device. Please refer to the truth table below for details. Unused output pairs may be left open. Each output is designed to drive 400mV into 100 across each output pair. Ground. GND and exposed pad must both be connected to the most negative potential of chip ground. 3 Precision Edge(R) SY58037U Micrel Absolute Maximum Ratings(1) Operating Ratings(2) Power Supply Voltage (VCC ) ...................... -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC LVPECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Termination Current(3) Source or sink current on VT pin ........................ 100mA Lead Temperature (soldering, 20 sec.) ..................... 260C Storage Temperature Range (TS ) ........... -65C to +150C Power Supply Voltage (VCC) ............... +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature Range (TA) ............. -40C to +85C Package Thermal Resistance(4) QFN (JA) Still-Air ............................................................. 24C/W QFN (JB) Junction-to-board ............................................ 12C/W DC ELECTRICAL CHARACTERISTICS(5) TA= -40C to +85C, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VCC Power Supply Voltage VCC = 2.5V. 2.375 2.5 2.625 V VCC = 3.3V. 3.0 3.3 3.6 V 145 200 mA ICC Power Supply Current No load, max. VCC. RIN Input Resistance (IN-to-VT) 40 50 60 RDIFF_IN Differential Input Resistance (IN-to-/IN) 80 100 120 VIH Input HIGH Voltage (IN-to-/IN) VCC-1.2 VCC V VIL Input LOW Voltage (IN-to-/IN) 0 VIH-0.1 V VIN Input Voltage Swing (IN-to-/IN) See Figure 1a. 0.1 1.7 V VDIFF_IN Differential Input Voltage Swing (IN-to-/IN) See Figure 1b. 0.2 VT_IN IN to VT (IN-to-/IN) VREF-AC Output Reference Voltage V 1.28 VCC-1.3 VCC-1.2 VCC-1.1 V V Notes: 1. Permanent device damage may occur if ratings in the "Absolute Maximum Ratings" section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability, use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. JB uses 4-layer JA in still-air number unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 4 Precision Edge(R) SY58037U Micrel CML OUTPUT DC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C; RL = 100 across each output pair, unless otherwise stated. Symbol Parameter Condition Min Typ VOH Output HIGH Voltage Q, /Q VOUT Output Differential Swing Q, /Q See Figure 1a. 325 400 mV VDIFF_OUT Differential Output Voltage Swing Q, /Q See Figure 1b. 650 800 mV ROUT Output Source Impedance 40 50 60 Min Typ Max Units VCC V 0.8 V 30 A VCC-0.040 VCC-0.010 Max Units VCC V LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C, unless otherwise stated. Symbol Parameter Condition VIH Input HIGH Voltage VIL Input LOW Voltage IIH Input HIGH Current -125 IIL Input LOW Current -300 2.0 Note: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 5 A Precision Edge(R) SY58037U Micrel AC ELECTRICAL CHARACTERISTICS(8) VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C, RL = 100 across each output pair or equivalent, unless otherwise stated. Symbol Parameter Condition Min fMAX Maximum Operating Frequency NRZ data Clock 5 4 tpd Differential Propagation Delay (IN-to-Q) VIN 100mV (SEL-to-Q) tpd Tempco Output-to-Output Skew Data Clock tr, tf Max Units Gbps GHz 35550 100 Differential Propagation Delay Temperature Coefficient tSKEW tJITTER 240 Typ 450 ps 550 ps 215 fs/C Note 9 15 ps Part-to-Part Skew Note 10 150 ps Random Jitter (RJ) Note 11 1 psRMS Deterministic Jitter (DJ) Note 12 10 psPP Cycle-to-Cycle Jitter Total Jitter (TJ) Note 13 Note 14 1 10 psRMS psPP Crosstalk-induced Jitter Note 15 0.7 psRMS 70 ps Output Rise/Fall Time At full output swing, 20% to 80%. 20 40 Notes: 8. High-frequency AC-parameters are guaranteed by design and characterization. 9. Output-to-output skew is measured between two different outputs under identical input transitions. 10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs 11. Random jitter is measured with a K28.7 character pattern, measured at fMAX. 12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 223-1 PRBS pattern. 13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn - Tn-1 where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 15. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other adjacent inputs. 6 Precision Edge(R) SY58037U Micrel TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated. 700 600 500 400 1000 2000 3000 4000 5000 FREQUENCY (MHz) Within Device Skew vs. Temperature 365 PROPAGATION DELAY (ps) 800 300 0 1.2 WITHIN DEVICE SKEW (ps) OUTPUT AMPLITUDE (mV) 900 Output Amplitude vs. Frequency 1.0 0.8 0.6 0.4 0.2 0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) 7 Propagation Delay vs. Temperature 360 355 350 345 340 335 330 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) Precision Edge(R) SY58037U Micrel FUNCTIONAL CHARACTERISTICS VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated. 1.25Gbps Output (Q - /Q) Output Swing (200mV/div.) Output Swing (200mV/div.) 2.5Gbps Output (Q - /Q) TIME (100ps/div.) 5Gbps Output (Q - /Q) 200MHz Output (Q - /Q) Output Swing (200mV/div.) Output Swing (200mV/div.) TIME (200ps/div.) TIME (50ps/div.) TIME (600ps/div.) Output Swing (200mV/div.) 622MHz Output (Q - /Q) TIME (100ps/div.) 8 Precision Edge(R) SY58037U Micrel SINGLE-ENDED AND DIFFERENTIAL SWINGS VDIFF_IN, VDIFF_OUT 800mV (Typ.) VIN, VOUT 400mV (Typ.) Figure 1a. Single-Ended Voltage Swing Figure 1b. Differential Voltage Swing INPUT AND OUTPUT STAGES VCC VCC VCC 50 50 50 ZO = 50 /Q 50 /Q ZO = 50 100 IN Q Q ZO = 50 50 VT 50 GND /IN Figure 2a. Simplified Differential Input Stage 100mA ZO = 50 DC bias per application 100mA GND GND Figure 2b. CML DC-Coupled (100 Termination) 9 Figure 2c. CML AC-Coupled (50 Termination) Precision Edge(R) SY58037U Micrel INPUT INTERFACE APPLICATIONS VCC VCC VCC IN IN LVPECL VCC GND NC Rpd VT VREF-AC CML /IN SY58037U 0.01F IN LVPECL /IN Rpd SY58037U Rpd VCC GND VT VREF-AC GND For VCC = 3.3V, Rpd = 50. For VCC = 2.5V, Rpd = 19. Figure 3a. LVPECL Interface (DC-Coupled) /IN 0.01F For 3.3V, Rpd = 100. For 2.5V, Rpd = 50. Figure 3b. LVPECL Interface (AC-Coupled) SY58037U GND NC VT NC VREF-AC Option: May connect VT to VCC. Figure 3c. CML Interface (DC-Coupled) VCC VCC IN CML IN /IN GND SY58037U VCC LVDS /IN SY58037U VT VREF-AC 0.01F Figure 3d. CML Interface (AC-Coupled) GND NC VT NC VREF-AC Figure 3e. LVDS Interface RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION Part Number Function Data Sheet Link SY58037U Ultra Precision 8:1 MUX with Internal Termination and 1:2 CML Fanout Buffer http://www.micrel.com/product-info/products/sy58037u.shtml SY58038U Ultra Precision 8:1 MUX with Internal Termination and 1:2 LVPECL Fanout Buffer http://www.micrel.com/product-info/products/sy58038u.shtml SY58039U Ultra Precision 8:1 MUX with Internal Termination and 1:2 400mV LVPECL Fanout Buffer http://www.micrel.com/product-info/products/sy58039u.shtml HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml 10 Precision Edge(R) SY58037U Micrel 44-PIN QFN (QFN-44) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation Heavy Copper Plane Heavy Copper Plane VEE VEE PCB Thermal Consideration for 44-Pin QFN Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. TEL 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. 11