LM3691 LM3691 High Accuracy, Miniature 1A, Step-Down DC-DC Converter for Portable Applications Literature Number: SNVS506H LM3691 High Accuracy, Miniature 1A, Step-Down DC-DC Converter for Portable Applications General Description Features The LM3691 step-down DC-DC converter is optimized for powering ultra-low voltage circuits from a single Li-Ion cell or 3 cell NiMH/NiCd batteries. It provides up to 1A load current, over an input voltage range from 2.3V to 5.5V. There are several different fixed voltage output options available. LM3691 has a mode-control pin that allows the user to select Forced PWM mode or ECO mode that changes modes between gated PWM mode and PWM automatically depending on the load. In ECO, LM3691 offers superior efficiency and very low Iq under light load conditions. ECO mode extends the battery life through reduction of the quiescent current during light load conditions and system standby. The LM3691 is available in a 6-bump micro SMD package. Only three external surface-mount components, a 1 H inductor, a 4.7 F input capacitor and a 4.7 F output capacitor, are required. VOUT = 0.75V to 3.3V 1% DC output voltage precision 2.3V VIN 5.5V 4 MHz switching frequency 64 A (typ.) quiescent current in ECO mode 1A maximum load capability Automatic ECO/PWM mode switching Mode Pin to select ECO/Forced PWM mode 1 H inductor, 4.7 F input capacitor (0603(1608) case size) and 4.7 F output capacitor (0603(1608) case size) Current overload and thermal shutdown protections Only three tiny surface-mount external components required (solution size less than 15 mm2) Applications Mobile Phones Hand-Held Radios MP3 players Portable Hard Disk Drives Efficiency vs. Output Current (VOUT = 1.8V, ECO Mode) Typical Application Circuit 30013430 FIGURE 1. Typical Application Circuit 30013466 (c) 2011 National Semiconductor Corporation 300134 www.national.com LM3691 High Accuracy, Miniature 1A, Step-Down DC-DC Converter for Portable Applications September 27, 2011 LM3691 Connection Diagram and Package Mark Information 30013406 FIGURE 2. 6-Bump Thin Micro SMD Package, Large Bump NS Package Number TLA06LCA Note: The actual physical placement of the package marking will vary from part to part. The package marking "X" designates the date code; "V" is an NSC internal code for die traceability. Both will vary in production. Pin Descriptions Pin Micro SMD Name A1 EN B1 MODE Description Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.2V. Do not leave this pin floating. Mode Pin: Mode = 1, Forced PWM Mode = 0, ECO Do not leave this pin floating. C1 FB Feedback analog input. Connect directly to the output filter capacitor. (Figure 1) A2 VIN Power supply input. Connect to the input filter capacitor. (Figure 1) B2 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. C2 GND www.national.com Ground pin. 2 LM3691 Ordering Information Voltage Option V 0.75 0.85* 0.9* 1.0 1.1* 1.2 1.3* 1.375* 1.5 1.6* 1.8 2.5 3.3 Order Number 6-bump Micro SMD Package Marking Supplied As LM3691TL-0.75 V 250 units, Tape-and-Reel LM3691TLX-0.75 V 3000 units, Tape-and-Reel LM3691TL-0.85 TBD 250 units, Tape-and-Reel LM3691TLX-0.85 TBD 3000 units, Tape-and-Reel LM3691TL-0.9 TBD 250 units, Tape-and-Reel LM3691TLX-0.9 TBD 3000 units, Tape-and-Reel LM3691TL-1.0 F 250 units, Tape-and-Reel LM3691TLX-1.0 F 3000 units, Tape-and-Reel LM3691TL-1.1 TBD 250 units, Tape-and-Reel LM3691TLX-1.1 TBD 3000 units, Tape-and-Reel LM3691TL-1.2 X 250 units, Tape-and-Reel LM3691TLX-1.2 X 3000 units, Tape-and-Reel LM3691TL-1.3 TBD 250 units, Tape-and-Reel LM3691TLX-1.3 TBD 3000 units, Tape-and-Reel LM3691TL-1.375 U 250 units, Tape-and-Reel LM3691TLX-1.375 U 3000 units, Tape-and-Reel LM3691TL-1.5 Y 250 units, Tape-and-Reel LM3691TLX-1.5 Y 3000 units, Tape-and-Reel LM3691TL-1.6 TBD 250 units, Tape-and-Reel LM3691TLX-1.6 TBD 3000 units, Tape-and-Reel LM3691TL-1.8 Z 250 units, Tape-and-Reel LM3691TLX-1.8 Z 3000 units, Tape-and-Reel LM3691TL-2.5 8 250 units, Tape-and-Reel LM3691TLX-2.5 8 3000 units, Tape-and-Reel LM3691TL-3.3 T 250 units, Tape-and-Reel LM3691TLX-3.3 T 3000 units, Tape-and-Reel * If any of the voltage options other than the released voltages are required, please contact the National Semiconductor Sales Office/Distributors for availability. 3 www.national.com LM3691 ESD Rating (Note 4) Human Body Model Machine Model Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operating Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. VIN Pin to GND EN, MODE, FB, SW pins Junction Temperature (TJ-MAX) Storage Temperature Range Continuous Power Dissipation (Note 3) Maximum Lead Temperature (Soldering, 10 sec.) 2 kV 200V (Note 1, Note 2) Input Voltage Range 2.3V to 5.5V Recommended Load Current 0 mA to 1000 mA Junction Temperature (TJ) Range -30C to +125C Ambient Temperature (TA) Range (Note -30C to +85C 5) -0.2V to 6.0V (GND-0.2V) to VIN + 0.2V +150C -65C to +150C Internally Limited Thermal Properties Junction-to-Ambient Thermal Resistance (JA) (Note 6) (micro SMD) 260C 85C/W Electrical Characteristics (Note 2, Note 7, Note 8) Limits in standard typeface are for TA = 25C. Limits in boldface type apply over the operating ambient temperature range (-30C TA= TJ +85C). Unless otherwise noted, specifications apply to the LM3691 open loop Typical Application Circuit with VIN = EN = 3.6V. Symbol Parameter Condition Min PWM Mode. No load VOUT = 1.1V to 3.3V -1 PWM Mode. No load VOUT = 0.75V to 1.0V -10 VFB Feedback Voltage ISHDN Shutdown Supply Current EN = 0V IQ_ECO ECO Mode Iq ECO Mode IQ_PWM PWM Mode Iq PWM Mode RDSON (P) Pin-Pin Resistance for PFET VIN = VGS = 3.6V, IO = 200 mA RDSON (N) Pin-Pin Resistance for NFET VIN = VGS = 3.6V, IO = -200 mA ILIM Switch Peak Current Limit Open loop VIH Logic High Input VIL Logic Low Input IEN,MODE Input Current FSW Switching Frequency PWM Mode VON UVLO threshold (Note 10) VIN rising TSTARTUP Start Time (Note 9) Typ Max Units +1 % +10 mV 1 A 64 80 A 490 600 A 160 250 m 115 180 m 1500 1700 mA 0.03 1250 V 1.2 0.4 V 1 A 4 4.4 MHz 2.2 2.29 V 300 s 0.01 3.6 VIN falling 2.1 70 145 V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150C (typ.) and disengages at TJ = 130C (typ.). Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. MIL-STD-883 3015.7 Note 5: In applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), the maximum power dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (JA) in the application, as given by the following equation: TA-MAX = TJ-MAX - (JAx PD-MAX). Due to the pulsed nature of testing the part, the temp in the Electrical Characteristic table is specified as TA = TJ. Note 6: Junction-to-ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation exists, special care must be given to thermal dissipation issues in board design. Note 7: Min and Max limits are guaranteed by design, test or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: The parameters in the electrical characteristic table are tested under open loop conditions at VIN = 3.6V unless otherwise specified. For performance over the input voltage range and closed loop condition, refer to the datasheet curves. Note 9: Not tested in production, guaranteed by design. Note 10: The UVLO rising threshold minus the falling threshold is always positive. www.national.com 4 LM3691 Block Diagram 30013431 FIGURE 3. Simplified Functional Diagram 5 www.national.com LM3691 Typical Performance Characteristics LM3691TL Typical Application Circuit (page 1), VIN = 3.6V, VOUT = 1.8V, TA = 25, L = 1.0 H, 2520, (LQM2HP1R0), CIN = COUT = 4.7 F, 0603(1608), 6.3V, (C1608X5R0J475K) unless otherwise noted. Quiescent Supply current vs. Supply Voltage No Switching (ECO Mode) Quiescent Supply current vs. Supply Voltage No Switching (PWM Mode) 30013455 30013456 Shutdown Current vs. Temp (VOUT = 1.8V) Switching Frequency vs. Temp (VOUT = 1.8V, PWM Mode) 30013457 www.national.com 30013458 6 LM3691 Output Voltage vs. Supply Voltage (VOUT = 0.75V) Output Voltage vs. Supply Voltage (VOUT = 1.8V) 30013459 30013460 Output Voltage vs. Output Current (VOUT = 0.75V) Output Voltage vs. Output Current (VOUT = 1.8V) 30013461 30013462 Input Current vs. Output Current (VOUT = 0.75V) Input Current vs. Output Current (VOUT = 1.8V) 30013463 30013464 7 www.national.com LM3691 Efficiency vs. Output Current (VOUT = 0.75V, ECO Mode) Efficiency vs. Output Current (VOUT = 1.8V, ECO Mode) 30013465 30013466 Efficiency vs. Output Current (VOUT = 2.5V, ECO Mode) Efficiency vs. Output Current (VOUT = 0.75V, FPWM Mode) 30013443 30013467 Efficiency vs. Output Current (VOUT = 1.8V, FPWM Mode) Efficiency vs. Output Current (VOUT = 2.5V, FPWM Mode) 300134a0 30013468 www.national.com 8 Load Current Threshold vs. Supply Voltage (VOUT = 1.8V, ECO Mode to PWM Mode) 30013469 30013470 Output Voltage Ripple vs. Supply Voltage (VOUT = 0.75V) 30013471 Output Voltage Ripple vs. Supply Voltage (VOUT = 1.8V) Closed Loop Current Limit vs. Temperature (VOUT = 0.75V) 30013472 30013473 9 www.national.com LM3691 Load Current Threshold vs. Supply Voltage (VOUT = 0.75V, ECO Mode to PWM Mode) LM3691 Closed Loop Current Limit vs. Temperature (VOUT = 1.8V) Line Transient Reponse (VOUT = 0.75V, PWM Mode) 30013475 30013474 Line Transient Reponse (VOUT = 1.8V, PWM Mode) Load Transient Reponse (VOUT = 0.75V, ECO Mode 1mA to 25 mA) 30013478 30013479 Load Transient Reponse (VOUT = 0.75V, ECO Mode 25 mA to 1mA) Load Transient Reponse (VOUT = 1.8V, ECO Mode 1mA to 25 mA) 30013480 www.national.com 30013481 10 LM3691 Load Transient Reponse (VOUT = 1.8V, ECO Mode 25 mA to 1mA) Load Transient Reponse (VOUT = 0.75V, ECO Mode to PWM Mode) 30013482 30013483 Load Transient Reponse (VOUT = 0.75V, PWM Mode to ECO Mode) Load Transient Reponse (VOUT = 1.8V, ECO Mode to PWM Mode) 30013484 30013485 Load Transient Reponse (VOUT = 2.5V, ECO Mode to PWM Mode) Load Transient Reponse (VOUT = 2.5V, ECO Mode to PWM Mode) 30013452 30013453 11 www.national.com LM3691 Load Transient Reponse (VOUT = 1.8V, FPWM Mode) Load Transient Reponse (VOUT = 0.75V, PWM Mode) 30013490 30013491 Load Transient Reponse (VOUT = 1.8V, PWM Mode) Load Transient Reponse (VOUT = 2.5V, PWM Mode) 30013492 30013446 Start Up into ECO Mode (VOUT = 0.75V, ROUT = 750) Start Up into PWM Mode (VOUT = 0.75V, ROUT = 2.5) 30013495 www.national.com 30013496 12 LM3691 Start Up into ECO Mode (VOUT = 1.8V, ROUT = 1.8 k) Start Up into PWM Mode (VOUT = 1.8V, ROUT = 6) 30013494 30013493 13 www.national.com LM3691 Operation Description DEVICE INFORMATION The LM3691, a high-efficiency, step-down DC-DC switching buck converter, delivers a constant voltage from either a single Li-Ion or three cell NiMH/NiCd battery to portable devices such as cell phones and PDAs. Using a voltage mode architecture with synchronous rectification, the LM3691 has the ability to deliver up to 1000 mA depending on the input voltage and output voltage, ambient temperature, and the inductor chosen. There are three modes of operation depending on the current required - PWM (Pulse Width Modulation), ECO, and shutdown. The device operates in PWM mode at load currents of approximately 50 mA (typ.) or higher. Lighter output current loads cause the device to automatically switch into ECO mode for reduced current consumption and a longer battery life. Shutdown mode turns off the device, offering the lowest current consumption (ISHUTDOWN = 0.03 A typ.). Additional features include soft-start, under voltage protection, current overload protection, and thermal shutdown protection. As shown in Figure 1, only three external power components are required for implementation. 30013497 FIGURE 4. Typical PWM Operation Internal Synchronous Rectification While in PWM mode, the LM3691 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. CIRCUIT OPERATION The LM3691 operates as follows. During the first portion of each switching cycle, the control block in the LM3691 turns on the internal PFET switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of (VIN-VOUT)/L, by storing energy in a magnetic field. During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of -VOUT/L. The output filter stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. Current Limiting A current limit feature allows the LM3691 to protect itself and external components during overload conditions. PWM mode implements current limit using an internal comparator that trips at 1500 mA (typ). If the output is shorted to ground and output voltage becomes lower than 0.3V (typ.), the device enters a timed current limit mode where the switching frequency will be one fourth, and NFET synchronous rectifier is disabled, thereby preventing excess current and thermal runaway. ECO OPERATION Setting mode pin low places the LM3691 in Auto mode. By doing so the part switches from ECO (ECOnomy) state to FPWM (Forced Pulse Width Modulation) state based on output load current. At light loads (less than 50 mA), the converter enters ECO mode. In this mode the part operates with low Iq. During ECO operation, the converter positions the output voltage slightly higher (+30 mV typ.) than the nominal output voltage in FPWM operation. Because the reference is set higher, the output voltage increases to reach the target voltage when the part goes from sleep state to switching state. Once this voltage is reached the converter enters sleep mode, thereby reducing switching losses and improving light load efficiency. The output voltage ripple is slightly higher in ECO mode (30 mV peak-peak ripple typ.). PWM OPERATION During PWM operation, the converter operates as a voltagemode controller with input voltage feed forward. This allows the converter to achieve excellent load and line regulation. The DC gain of the power stage is proportional to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is introduced. While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned on and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator can also turn off the switch in case the current limit of the PFET is exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock turning off the NFET and turning on the PFET. www.national.com 14 SOFT-START The LM3691 has a soft-start circuit that limits in-rush current during startup. Output voltage increase rate is 30 mV/sec (at VOUT = 1.8V typ.) during soft-start. THERMAL SHUTDOWN PROTECTION The LM3691 has a thermal overload protection function that operates to protect itself from short-term misuse and overload conditions. When the junction temperature exceeds around 150C, the device inhibits operation. Both the PFET and the NFET are turned off. When the temperature drops below 130 C, normal operation resumes. Prolonged operation in thermal overload conditions may damage the device and is considered bad practice. 30013498 FIGURE 5. Typical ECO Operation FORCED PWM MODE Setting Mode pin high (>1.2V) places the LM3691 in Forced PWM. The part is in forced PWM regardless of the load. OVER-TEMPERATURE MAXIMUM LOAD RECOMMENDATIONS SHUTDOWN MODE Setting the EN input pin low (<0.4V) places the LM3691 in shutdown mode. During shutdown the PFET switch, NFET switch, reference, control and bias circuitry of the LM3691 are turned off. Setting EN high (>1.2V) enables normal operation. 15 VIN Maximum Load 2.5V to 5.5V 1000 mA 2.3V to 2.5V 650 mA www.national.com LM3691 When turning on the device with EN soft-start is activated. EN pin should be set low to turn off the LM3691 during system power up and under-voltage conditions when the supply is less than 2.3V. Do not leave the EN pin floating. LM3691 OUTPUT CAPACITOR SELECTION Use a 4.7F, 6.3V ceramic capacitor, X7R, X5R or B types; do not use Y5V or F. DC bias voltage characteristics of ceramic capacitors must be considered. DC bias characteristics vary from manufacturer to manufacturer, and DC bias curves should be requested from them as part of the capacitor selection process. The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. Minimum output capacitance to guarantee good performance is 2.2 F at the output voltage DC bias including tolerances and over ambient temp range. The output voltage ripple is caused by the charging and discharging of the output capacitor and also due to its RESR and can be calculated as: Voltage peak-to-peak ripple due to capacitance = Application Information INDUCTOR SELECTION DC bias current characteristics of inductors must be considered. Different manufacturers follow different saturation current rating specifications, so attention must be given to details. DC bias curves should be requested from them as part of the inductor selection process. Minimum value of inductance to guarantee good performance is 0.5 H at 1.5A (ILIM typ.) bias current over the ambient temp range. The inductor's DC resistance should be less than 0.1 for good efficiency at high current condition. The inductor AC loss (resistance) also affects conversion efficiency. Higher Q factor at switching frequency usually gives better efficiency at light load to middle load. Table 1 lists suggested inductors and suppliers INPUT CAPACITOR SELECTION A ceramic input capacitor of 4.7 F, 6.3V/10V is sufficient for most applications. Place the input capacitor as close as possible to the VIN pin and GND pin of the device. A larger value or higher voltage rating may be used to improve input voltage filtering. Use X7R, X5R or B types; do not use Y5V or F. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0402. Minimum input capacitance to guarantee good performance is 2.2 F at maximum input voltage DC bias including tolerances and over ambient temp range. The input filter capacitor supplies current to the PFET (highside) switch in the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic capacitor's low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select an input filter capacitor with sufficient ripple current rating. The input current ripple can be calculated as: Voltage peak-to-peak ripple due to ESR = VPP-ESR = (2 * IRIPPLE) * RESR Because these two components are out of phase the rms value can be used to get an approximate value of peak-to-peak ripple. Voltage peak-to-peak ripple, root mean squared = Note that the output voltage ripple is dependent on the current ripple and the equivalent series resistance of the output capacitor (RESR). The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations is at the switching frequency of the part. Table 2 lists suggested capacitors and suppliers. TABLE 1. Suggested Inductors and Their Suppliers Model Vendor Dimensions LxWxH (mm) D.C.R (m) LQM2HPN1R0MG0 Murata 2.5 x 2.0 x 1.0 55 MLP2520S1R0L TDK 2.5 x 2.0 x 1.0 60 KSLI252010BG1R0 HItachi Metals 2.5 x 2.0 x 1.0 80 MIPSZ2012D1R0 FDK 2.0 x 1.25 x 1.0 90 TABLE 2. Suggested Capacitors and Their Suppliers Type Vendor Voltage Rating (V) Case Size Inch (mm) C1608X5R0J475K Ceramic TDK 6.3 0603 (1608) C1608X5R1A475K Ceramic TDK 10.0 0603 (1608) Model 4.7 F for CIN and COUT www.national.com 16 Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power components. The voltage feedback trace must remain close to the buck circuit and should be routed directly from FB to VOUT at the output capacitor and should be routed opposite to noise components. This reduces EMI radiated onto the DC-DC converter's own voltage feedback trace. MICRO SMD PACKAGE ASSEMBLY AND USE Use of the micro SMD package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in National Semiconductor Application Note 1112. Refer to the section Surface Mount Technology (SMD) Assembly Considerations. For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with micro SMD package must be the NSMD (Non-Solder Mask Defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the soldermask and pad overlap, from holding the device off the surface of the board and interfering with mounting. See Application Note 1112 for specific instructions how to do this. The 6-bump package used for LM3691 has 300-micron solder balls and requires 10.82 mils pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90 entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 7 mil wide, for a section approximately 7 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criteria is symmetry. This ensures the solder bumps on the LM3691 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps A2 and C2, because GND and VIN are typically connected to large copper planes. The micro SMD package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the micro SMD package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, micro SMD devices are sensitive to light, in the red and infrared range, shining on the package's exposed die edges. 17 www.national.com LM3691 6. PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DCDC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or instability. In particular parasitic inductance from extra-long PCB trace lengths can cause additional noise voltages through L*di/dt that adversely affect the DC-DC converter IC circuitry. Good layout for the LM3691 can be implemented by following a few simple design rules. 1. Place the inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. 2. Place the capacitors and inductor close to the LM3691. Place the CIN capacitor as close as possible to the VIN and GND pads. Place the COUT capacitor as close as possible to the VOUT and GND connections. 3. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the buck and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground, through the buck by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 4. Connect the ground pins of the buck and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Connect this to the ground-plane (if one is used) with several vias. This reduces groundplane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the buck by giving it a low-impedance ground connection. 5. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors by resistive losses across the traces. Even 1mm of fine trace creates parasitic inductance that can undesirably affect performance from increased L*di/dt noise voltages. LM3691 Physical Dimensions inches (millimeters) unless otherwise noted 6-bump Thin Micro SMD, Large Bump NS Package Number TLA06LCA X1 = 1.260 mm 0.030 mm X2 = 1.565 mm 0.030 mm X3 = 0.600 mm 0.075 mm www.national.com 18 LM3691 19 www.national.com LM3691 High Accuracy, Miniature 1A, Step-Down DC-DC Converter for Portable Applications Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH(R) Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise(R) Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagicTM www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise(R) Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. 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