TL/F/9595
54F/74F821 10-Bit D-Type Flip-Flop
December 1994
54F/74F821
10-Bit D-Type Flip-Flop
General Description
The ’F821 is a 10-bit D-type flip-flop with TRI-STATEÉtrue
outputs arranged in a broadside pinout. The ’F821 is func-
tionally and pin compatible with the AMD’s Am29821.
Features
YTRI-STATE Outputs
YDirect replacement for AMD’s Am29821
Commercial Military Package Package Description
Number
74F821SPC N24C 24-Lead (0.300×Wide) Molded Dual-In-Line
54F821SDM (Note 2) J24F 24-Lead (0.300×Wide) Ceramic Dual-In-Line
74F821SC (Note 1) M24B 24-Lead (0.300×Wide) Molded Small Outline, JEDEC
54F821FM (Note 2) W24C 24-Lead Cerpack
54F821LM (Note 2) E28A 24-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13×reel. Use suffix eSCX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix eSDMQB, FMQB and LMQB.
Logic Symbols Connection Diagrams
TL/F/9595–1
IEEE/IEC
TL/F/9595–5
Pin Assignment
for DIP, SOIC and Flatpak
TL/F/9595–2
Pin Assignment
for LCC
TL/F/9595–3
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Unit Loading/Fan Out
54F/74F
Pin Names Description U.L. Input IIH/IIL
HIGH/LOW Output IOH/IOL
D0–D9Data Inputs 1.0/1.0 20 mA/b0.6 mA
OE Output Enable 1.0/1.0 20 mA/b0.6 mA
TRI-STATE Input
CP Clock Input 1.0/1.0 20 mA/b0.6 mA
O0–O9TRI-STATE Outputs 150/40 (33.3) b3.0 mA/24 mA (20 mA)
Functional Description
The ’F821 consists of ten D-type edge-triggered flip-flops.
This device has TRI-STATE true outputs for bus systems
organized in a broadside pinning. The buffered Clock (CP)
and buffered Output Enable (OE) are common to all flip-
flops. The flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on
the LOW-to-HIGH CP transition. With the OE LOW the con-
tent of the flip-flops are available at the outputs. When the
OE is HIGH, the outputs go to the high impedance state.
Operation of the OE input does not affect the state of the
flip-flops.
Function Table
Inputs Internal Output Function
OE CP D Q O
H H X NC Z Hold
H L X NC Z Hold
HLL H Z Load
HLH L Z Load
LLL H L Data Available
LLH L H Data Available
L H X NC NC No Change in Data
L L X NC NC No Change in Data
LeLOW Voltage Level
HeHIGH Voltage Level
XeImmaterial
ZeHigh Impedance
LeLOW-to-HIGH Transition
NC eNo Change
Logic Diagram
TL/F/9595–4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature b65§Ctoa
150§C
Ambient Temperature under Bias b55§Ctoa
125§C
Junction Temperature under Bias b55§Ctoa
175§C
Plastic b55§Ctoa
150§C
VCC Pin Potential to
Ground Pin b0.5V to a7.0V
Input Voltage (Note 2) b0.5V to a7.0V
Input Current (Note 2) b30 mA to a5.0 mA
Voltage Applied to Output
in HIGH State (with VCC e0V)
Standard Output b0.5V to VCC
TRI-STATE Output b0.5V to a5.5V
Current Applied to Output
in LOW State (Max) twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating
Conditions
Free Air Ambient Temperature
Military b55§Ctoa
125§C
Commercial 0§Ctoa
70§C
Supply Voltage
Military a4.5V to a5.5V
Commercial a4.5V to a5.5V
DC Electrical Characteristics
Symbol Parameter 54F/74F Units VCC Conditions
Min Typ Max
VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal
VCD Input Clamp Diode Voltage b1.2 V Min IIN eb
18 mA
VOH Output HIGH 54F 10% VCC 2.5 IOH eb
1mA
Voltage 54F 10% VCC 2.4 IOH eb
3mA
74F 10% VCC 2.5 V Min IOH eb
1mA
74F 10% VCC 2.4 IOH eb
3mA
74F 5% VCC 2.7 IOH eb
1mA
74F 5% VCC 2.7 IOH eb
3mA
V
OL Output LOW 54F 10% VCC 0.5 V Min IOL e20 mA
Voltage 74F 10% VCC 0.5 IOL e24 mA
IIH Input HIGH Current 54F 20.0
mA Max VIN e2.7V
74F 5.0
IBVI Input HIGH Current 54F 100
mA Max VIN e7.0V
Breakdown Test 74F 7.0
ICEX Output HIGH 54F 250
mA Max VOUT eVCC
Leakage Current 74F 50
VID Input Leakage Test 74F 4.75 V 0.0 IID e1.9 mA,
All Other Pins Grounded
IOD Output Leakage 74F 3.75 mA 0.0 VIOD e150 mV
Circuit Current All Other Pins Grounded
IIL Input LOW Current b0.6 mA Max VIN e0.5V
IOZH Output Leakage Current 50 mA Max VOUT e2.7V
IOZL Output Leakage Current b50 mA Max VOUT e0.5V
IOS Output Short-Circuit Current b60 b150 mA Max VOUT e0V
ICCZ Power Supply Current 78 100 mA Max VOeHIGH Z
3
AC Electrical Characteristics
74F 54F 74F
TAea
25§CTA,V
CC eMil TA,V
CC eCom
Symbol Parameter VCC ea
5.0V CLe50 pF CLe50 pF Units
CLe50 pF
Min Typ Max Min Max Min Max
fmax Maximum Clock Frequency 100 150 60 70 MHz
tPLH Propagation Delay 2.0 6.4 9.5 2.0 10.5 2.0 10.5 ns
tPHL CP to On2.0 6.2 9.5 2.0 10.5 2.0 10.5
tPZH Output Enable Time 2.0 5.8 10.5 2.0 13.0 2.0 11.5
tPZL OE to On2.0 6.3 10.5 2.0 13.0 2.0 11.5 ns
tPHZ Output Disable Time 1.5 3.4 7.0 1.0 7.5 1.5 7.5
tPLZ OE to On1.5 3.5 7.0 1.0 7.5 1.5 7.5
AC Operating Requirements
74F 54F 74F
Symbol Parameter TAea
25§CTA,V
CC eMil TA,V
CC eCom Units
VCC ea
5.0V
Min Max Min Max Min Max
ts(H) Setup Time, HIGH or LOW 2.5 4.0 3.0
ts(L) Dnto CP 2.5 4.0 3.0 ns
th(H) Hold Time, HIGH or LOW 2.5 2.5 2.5
th(L) Dnto CP 2.5 2.5 2.5
tw(H) CP Pulse Width 5.0 6.0 6.0 ns
tw(L) HIGH or LOW 5.0 6.0 6.0
4
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F 821 S C X
Temperature Range Family Special Variations
74FeCommercial FAST QB eMilitary grade device with
54FeMilitary FAST environmental and burn-in
processing
Device Type XeDevices ship in 13×reel
Package Code Temperature Range
SP eSlim Plastic DIP CeCommercial (0§Ctoa
70§C)
SD eSlim Ceramic DIP MeMilitary (b55§Ctoa
125§C)
FeFlatpak
LeLeadless Chip Carrier (LCC)
SeSmall Outline (SOIC)
5
Physical Dimensions inches (millimeters)
28-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E28A
24-Lead (0.300×Wide) Ceramic Dual-In-Line Package (SD)
NS Package Number J24F
6
Physical Dimensions inches (millimeters) (Continued)
24-Lead (0.300×Wide) Molded Small Outline Package, JEDEC (S)
NS Package Number M24B
24-Lead (0.300×Wide) Molded Dual-In-Line Package (SP)
NS Package Number N24C
7
54F/74F821 10-Bit D-Type Flip-Flop
Physical Dimensions inches (millimeters) (Continued)
24-Lead Ceramic Flatpak (F)
NS Package Number W24C
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