Important notice
Dear Customer,
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tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
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- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
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- © Nexperia B.V. (year). All rights reserved.
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1. Product profile
1.1 General description
Ultra low capacitance bidirectional double ElectroStatic Discharge (ESD) protection diode
in a SOT23 (TO-236AB) small Surface-Mounted Device (SMD) plastic package designed
to protect two data lines from the damage caused by ESD.
1.2 Features
1.3 Applications
1.4 Quick reference data
PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection
diode
Rev. 01 — 27 March 2007 Product data sheet
nBidirectional ESD protection of two lines nUltra low leakage current: IRM =5nA
nUltra low diode capacitance: Cd= 2.9 pF nESD protection of up to 10 kV
nIEC 61000-4-2; level 4 (ESD)
nComputers and peripherals nCommunication systems
nAudio and video equipment nPortable electronics
nCellular handsets and accessories nSubscriber Identity Module (SIM) card
protection
n10/100/1000 Ethernet nFireWire
nLocal Area Network (LAN) equipment nHigh-speed data lines
Table 1. Quick reference data
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage - - 5 V
Cddiode capacitance f = 1 MHz; VR= 0 V - 2.9 3.5 pF
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 2 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
2. Pinning information
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Table 2. Pinning
Pin Description Simplified outline Symbol
1 cathode 1
2 cathode 2
3 common cathode
12
3
2
1
006aaa155
3
Table 3. Ordering information
Type number Package
Name Description Version
PESD5V0U2BT - plastic surface-mounted package; 3 leads SOT23
Table 4. Marking codes
Type number Marking code[1]
PESD5V0U2BT 1U*
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 3 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
5. Limiting values
[1] Device stressed with ten non-repetitive ESD pulses.
[2] Measured from pin 1 to pin 2.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per device
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
Table 6. ESD maximum ratings
Symbol Parameter Conditions Min Max Unit
Per diode
VESD electrostatic discharge
voltage IEC 61000-4-2
(contact discharge) [1][2] -10kV
MIL-STD-883 (human
body model) -8kV
Table 7. ESD standards compliance
Standard Conditions
Per diode
IEC 61000-4-2; level 4 (ESD) > 15 kV (air); > 8 kV (contact)
MIL-STD-883; class 3 (human body model) > 4 kV
Fig 1. ESD pulse waveform according to IEC 61000-4-2
001aaa631
IPP
100 %
90 %
t
30 ns 60 ns
10 %
tr = 0.7 ns to 1 ns
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 4 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
6. Characteristics
Table 8. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage - - 5 V
IRM reverse leakage current VRWM = 5 V - 5 100 nA
VBR breakdown voltage IR= 5 mA 5.5 7 9.5 V
Cddiode capacitance f=1MHz
VR= 0 V - 2.9 3.5 pF
VR= 5 V - 1.9 - pF
rdif differential resistance IR= 1 mA - - 100 Ω
f = 1 MHz; Tamb =25°C
Fig 2. Diode capacitance as a function of reverse
voltage; typical values Fig 3. V-I characteristics for a bidirectional ESD
protection diode
VR (V)
054231
006aab036
2.2
2.6
3.0
Cd
(pF)
1.8
006aaa676
−VCL −VBR −VRWM VCL
VBR
VRWM
−IRM
IRM
−IR
IR
−IPP
IPP
−+
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 5 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
Fig 4. ESD clamping test setup and waveforms
006aab037
50 Ω
RZ
CZ
DUT
(DEVICE
UNDER
TEST)
GND
GND
450 ΩRG 223/U
50 Ω coax
ESD TESTER
IEC 61000-4-2 network
CZ = 150 pF; RZ = 330 Ω
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
GND
GND
unclamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network) clamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network) pin 1 to 2
unclamped −8 kV ESD pulse waveform
(IEC 61000-4-2 network) clamped −8 kV ESD pulse waveform
(IEC 61000-4-2 network) pin 1 to 2
vertical scale = 10 A/div
horizontal scale = 15 ns/div
vertical scale = 10 A/div
horizontal scale = 15 ns/div vertical scale = 10 V/div
horizontal scale = 100 ns/div
vertical scale = 10 V/div
horizontal scale = 100 ns/div
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 6 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
7. Application information
The PESD5V0U2BT is designed for the bidirectional protection of two signal lines from
the damage caused by ESD pulses. The PESD5V0U2BT may be used on lines where the
signal polarities are either positive or negative with respect to ground.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESD5V0U2BT as close to the input terminal or connector as possible.
2. The path length between the PESD5V0U2BT and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 5. Bidirectional protection of two lines
006aab039
PESD5V0U2BT
GND
line 2 to be protected
line 1 to be protected
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 7 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
8. Package outline
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
Fig 6. Package outline SOT23 (TO-236AB)
04-11-04Dimensions in mm
0.45
0.15
1.9
1.1
0.9
3.0
2.8
2.5
2.1 1.4
1.2
0.48
0.38 0.15
0.09
12
3
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 10000
PESD5V0U2BT SOT23 4 mm pitch, 8 mm tape and reel -215 -235
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 8 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
10. Soldering
Fig 7. Reflow soldering footprint SOT23 (TO-236AB)
Fig 8. Wave soldering footprint SOT23 (TO-236AB)
solder resist
occupied area
solder lands
solder paste
Dimensions in mm
sot023
1.00
0.60
(3x)
1.30
12
3
2.50
3.00
0.85
2.70
2.90
0.50 (3x)
0.60 (3x)
3.30
0.85
sot023
4.004.60
2.80
4.50
1.20
3.40
3
21
1.20 (2x)
preferred transport direction during soldering
Dimensions in mm
solder resist
occupied area
solder lands
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 9 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
11. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PESD5V0U2BT_1 20070327 Product data sheet - -
PESD5V0U2BT_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 27 March 2007 10 of 11
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PESD5V0U2BT
Ultra low capacitance bidirectional double ESD protection diode
© NXP B.V. 2007. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 27 March 2007
Document identifier: PESD5V0U2BT_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 6
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 7
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Contact information. . . . . . . . . . . . . . . . . . . . . 10
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
