General Description
The AAT1142 SwitchReg is a dynamically pro-
grammable 2.2MHz step-down converter with an
input voltage range of 2.7V to 5.5V and output from
0.6V to 2.0V. Its low supply current, high level of
integration, and small footprint make the AAT1142
the ideal choice for microprocessor core power in
systems such as smartphones.
The 2.2MHz switching frequency allows the use of
a small external inductor and capacitors. Peak cur-
rent mode control and internal compensation pro-
vide stable operation and fast voltage response
without over/undershoot or ringing.
The AAT1142 delivers up to 800mA of output current
while consuming 35µA of typical no load quiescent
current. Dynamic Voltage Management is provided
through I2C or AnalogicTech's S2Cwire™ (Simple
Serial Control™) single wire interface. The user can
program the output from 0.6V to 2.0V in 50mV steps.
The AAT1142 optimizes power efficiency through-
out the load range via PWM/PFM mode. Pulling
the MODE/SYNC pin high enables PWM Only
mode, maintaining constant frequency and low
noise across the operating range. Alternatively, the
converter may be synchronized to an external
clock input via the MODE/SYNC pin. Over-temper-
ature and short-circuit protection safeguard the
AAT1142 and system components from damage.
The AAT1142 is available in a Pb-free, space-sav-
ing 2.85x3.0x1.0mm TSOPJW-12 package or a
Pb-free, low-profile 3x3x0.8mm TDFN33-12 pack-
age. The device is rated over the -40°C to +85°C
temperature range.
Features
•V
IN Range: 2.7V to 5.5V
•V
OUT Programmable Range: 0.6V to 2.0V
• Dynamic Voltage Management:
— 50mV Output Resolution
— Fast, Stable Response
• Serial Control Options:
—I
2C Two-Wire Interface
—S
2Cwire Single-Wire Interface
• 800mA Output Current
• Up to 93% Efficiency
• Line, Load Regulation Less Than ±0.5%
• 2.2MHz Switching Frequency
• Ultra-Small External Filter
• Low 35µA No Load Quiescent Current
• 100% Duty Cycle Low Dropout Operation
• Internal Soft Start
• Over-Temperature Protection
• Current Limit Protection
• Multi-Function MODE/SYNC Pin:
— PFM/PWM for High Efficiency
— PWM Only for Low Noise
— Clock Input to Synchronize to System Clock
• TSOPJW-12 or TDFN33-12 Package
• Temperature Range: -40°C to +85°C
Applications
• Camcorders
• Cellular Phones and Smartphones
• Digital Still Cameras
• Handheld Instruments
• Microprocessor / DSP Core
• MP3, Portable Music, and Portable Media
Players
• PDAs and Handheld Computers
AAT1142
800mA Voltage-Scaling Step-Down Converter
Typical Application
Efficiency vs. Load
(V
OUT
= 1.8V)
Output Current (mA)
Efficiency (%)
30
40
50
60
70
80
90
100
0 1 10 100 1000
PWM Only
Mode
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 5.0V
LXVIN
AAT1142
MODE/SYNC
PGND
FB
L
1
2.2µH
AGND
C
2
4.7µF
C
1
10µ
F
V
IN
: 2.7V to 5.5V
V
OUT
: 0.6V to 2.0V
800mA Maximum
SDA
SCL
EN/SET
I
2
C
S
2
Cwire*
*Optional S
2
Cwire or I
2
C Input
1142.2006.07.1.0 1
SwitchReg™
Pin Descriptions
Pin Configuration
TSOPJW-12 TDFN33-12
(Top View) (Top View)
PVIN
N/C
VIN
1
A
GND
AGND
FB
LX
PGND
MODE/SYNC
SDA
SCL
EN/SET
2
3
4
5
6
12
11
10
9
8
7
1
2
3
4
5
6
12
11
10
9
8
7
LX
PGND
MODE/SYNC
SDA
SCL
EN/SET
VIN
AGND
AGND
AGND
AGND
FB
Pin #
TSOPJW-12 TDFN33-12 Symbol Function
1 12 LX Connect the output inductor to this pin. The switching node is
internally connected to the drain of both high- and low-side
MOSFETs.
2 11 PGND Main power ground return pin. Connect to the output and
input capacitor return.
3 10 MODE/SYNC Connect to ground for PFM/PWM mode and optimized effi-
ciency throughout the load range. Connect to high for low
noise PWM Only operation under all operating conditions.
Connect to an external clock for synchronization (PWM Only).
4 9 SDA I2C control pin: Data input.
5 8 SCL I2C control pin: Clock input.
6 7 EN/SET IC enable pin. Pull high to enable the AAT1142; pull low to
disable the AAT1142. Also serves as S2Cwire input for pro-
grammable output voltages.
7 6 FB Feedback input pin. This pin is connected directly to the con-
verter output for programmable output.
8, 9, 10, 11 4, 5 AGND Ground connection pin.
1213 VIN Input voltage for the converter.
1211 PVIN Input voltage for the power switches.
n/a 2 N/C Not connected.
n/a EP Exposed paddle (bottom); connect to ground as closely as
possible to the device.
AAT1142
800mA Voltage-Scaling Step-Down Converter
21142.2006.07.1.0
1. VIN and PVIN are tied together in the TSOPJW-12 package.
Absolute Maximum Ratings1
Thermal Information2
Symbol Description Value Units
PDMaximum Power Dissipation TSOPJW-123625 mW
TDFN33-1242.0 W
θJA Thermal Resistance TSOPJW-12 160 °C/W
TDFN33-12 50
Symbol Description Value Units
VIN, PVIN Input Voltage and Input Power to GND 6.0 V
VLX LX to GND -0.3 to VIN + 0.3 V
VFB FB to GND -0.3 to VIN + 0.3 V
VSDA/SCL SDA/SCL to GND -0.3 to 6.0 V
VMODE/SYNC, VEN/SET MODE/SYNC and EN/SET to GND -0.3 to 6.0 V
TJOperating Junction Temperature Range -40 to 150 °C
TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 3
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at condi-
tions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
3. Derate 6.25mW/°C above 25°C.
4. Derate 20mW/°C above 25°C.
Electrical Characteristics1
L = 2.2µH, CIN = COUT = 10µF, VIN = 3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are
at TA= 25°C.
Symbol Description Conditions Min Typ Max Units
Step-Down Converter
VIN Input Voltage 2.7 5.5 V
VIN Rising 2.7 V
VUVLO UVLO Threshold Hysteresis 250 mV
VIN Falling 2.0 V
VOUT Output Voltage Tolerance IOUT = 0mA to 800mA, -3.0 3.0 %
VIN = 2.7V to 5.5V
VOUT VOUT Programmable Range 0.6 2.0 V
VSLEW
Output Voltage Programming COUT = 10µF 10 mV/µs
Slew Rate
IQQuiescent Current No Load 35 70 µA
ISHDN Shutdown Current EN/SET = AGND = PGND 1.0 µA
ILIM P-Channel Current Limit 1.0 A
RDS(ON)H High Side Switch On Resistance 0.29 Ω
RDS(ON)L Low Side Switch On Resistance 0.24 Ω
ILXLEAK LX Leakage Current VIN = 5.5V, VLX = 0V to VIN 1µA
ΔVOUT/Line Regulation VIN = 2.7V to 5.5V 0.2 %/V
VOUT*ΔVIN
ROUT Output Impedance 250 kΩ
TSStart-Up Time From Enable to Output Regulation 100 µs
FOSC Oscillator Frequency 2.2 MHz
FSYNC SYNC Frequency Range 1.0 3.0 MHz
TSD
Over-Temperature Shutdown 140 °C
Threshold
THYS
Over-Temperature Shutdown 15 °C
Hysteresis
AAT1142
800mA Voltage-Scaling Step-Down Converter
41142.2006.07.1.0
1. The AAT1142 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
Electrical Characteristics1
L = 2.2µH, CIN = COUT = 10µF, VIN = 3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are
at TA= 25°C.
Characteristics of SDA and SCL Bus Lines
Standard Mode Fast Mode
Parameter Symbol Min Max Min Max Units
SCL Clock Frequency fSCL 100 400 kHz
Hold Time for START Condition; After tHD;STA 4.0 0.6 µs
this Period, the First Clock Pulse is
Generated
LOW Period of the SCL Clock tLOW 4.7 1.3 µs
HIGH Period of the SCL Clock tHIGH 4.0 0.6 µs
Set-up Time for a Repeated START tSU;STA 4.7 0.6 µs
Condition
Data in Hold Time tHD;DAT 0 3.45 0 0.9 µs
Data in Set-Up Time tSU;DAT 350 350 ns
Set-Up Time for STOP Condition tSU;STO 4.0 0.6 µs
Bus Free Time Between a STOP and tBUF 4.7 1.3 µs
START Condition
Input Low Level VIL VIN · 0.3 VIN · 0.3 V
Input High Level VIH VIN · 0.7 VIN · 0.7 V
Symbol Description Conditions Min Typ Max Units
EN/SET and MODE/SYNC
VEN/SET(L) Enable Threshold Low 0.6 V
VEN/SET(H) Enable Threshold High 1.4 V
TEN/SET(L) EN/SET Low Time VEN/SET < 0.6V 0.3 75 µs
TEN/SET(H) EN/SET High Time VEN/SET > 1.4V 50 75 µs
TOFF EN/SET Timeout VEN/SET < 0.6V 500 µs
TLATCH EN/SET Latch Timeout VEN/SET > 1.4V 500 µs
IEN/SET Input Low Current VIN = VFB = 5.5V -1.0 1.0 µA
VMODE/SYNC(L) Enable Threshold Low VIN ×V
0.4
VMODE/SYNC(H) Enable Threshold High VIN ×V
0.7
IMODE/SYNC Input Low Current -1.0 1.0 µA
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 5
1. The AAT1142 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
Typical Characteristics
DC Regulation
(V
OUT
= 1.2V)
Output Current (mA)
Output Accuracy (%)
-2.0
-1.0
0.0
1.0
2.0
0 1 10 100 1000
V
IN
= 2.7V V
IN
= 3.6V
V
IN
= 4.2V V
IN
= 5.0V
Efficiency vs. Load
(V
OUT
= 1.2V)
Output Current (mA)
Efficiency (%)
20
30
40
50
60
70
80
90
100
0 1 10 100 1000
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 5.0V
PWM Only
Mode
DC Regulation
(V
OUT
= 1.0V)
Output Current (mA)
Output Accuracy (%)
-2.0
-1.0
0.0
1.0
2.0
0 1 10 100 1000
V
IN
= 2.7V V
IN
= 3.6V
V
IN
= 4.2V V
IN
= 5.0V
Efficiency vs. Load
(V
OUT
= 1.0V)
Output Current (mA)
Efficiency (%)
20
30
40
50
60
70
80
90
100
0 1 10 100 100
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 5.0V
PWM Only
Mode
DC Regulation
(V
OUT
= 0.9V)
Output Current (mA)
Output Accuracy (%)
-2.0
-1.0
0.0
1.0
2.0
0 1 10 100 1000
V
IN
= 2.7V V
IN
= 3.6V
V
IN
= 4.2V V
IN
= 5.0V
Efficiency vs. Load
(V
OUT
= 0.9V)
Output Current (mA)
Efficiency (%)
20
30
40
50
60
70
80
90
100
0 1 10 100 1000
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 5.0V
PWM Only
Mode
AAT1142
800mA Voltage-Scaling Step-Down Converter
61142.2006.07.1.0
Typical Characteristics
Switching Frequency vs. Temperature
(V
IN
= 3.6V; V
OUT
= 1.0V; I
OUT
= 400mA)
Temperature (°
°C)
Variation (%)
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
2.0
4.0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
Output Voltage Accuracy vs. Temperature
(V
IN
= 3.6V; V
OUT
= 1.0V; I
OUT
= 400mA)
Temperature (°
°C)
Accuracy (%)
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
Line Regulation
(V
OUT
= 1.0V)
Input Voltage (V)
Output Accuracy (%)
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
2.5 3.0 3.5 4.0 4.5 5.0 5.5
I
OUT
= 650mA
I
OUT
= 0mA
I
OUT
= 100mA
Soft Start
(V
IN
= 3.6V; V
OUT
= 1.8V; I
OUT
= 800mA)
Output and Enable Voltage
(top) (V)
Inductor Current
(bottom) (A)
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
4.0
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
Time (50µs/div)
DC Regulation
(V
OUT
= 1.8V)
Output Current (mA)
Output Accuracy (%)
-2.0
-1.6
-1.2
-0.8
-0.4
0.0
0.4
0.8
1.2
1.6
2.0
0 1 10 100 100
0
V
IN
= 4.2V
V
IN
= 5.0V
V
IN
= 3.6V
V
IN
= 2.7V
Efficiency vs. Load
(V
OUT
= 1.8V)
Output Current (mA)
Efficiency (%)
30
40
50
60
70
80
90
100
0 1 10 100 1000
PWM Only
Mode
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 5.0V
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 7
Typical Characteristics
Line Response
(V
OUT
= 1.2V; I
OUT
= 650mA)
Output Voltage
(top) (VAC)
Input Voltage
(bottom) (V)
Time (500µs/div)
-0.4
-0.3
-0.2
-0.1
0.0
0.1
0.2
3.0
3.5
4.0
4.5
5.0
5.5
6.0
No Load Quiescent Current vs. Input Voltage
(V
OUT
= 1.8V)
Input Voltage (V)
Supply Current (µA)
20
25
30
35
40
45
50
55
60
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
85°C
25°C
-40°C
Load Transient Response
(400mA to 800mA; V
IN
= 3.6V; V
OUT
= 1.0V)
Output Voltage
(top) (V)
Load and Inductor Current
(bottom) (200mA/div)
Time (50µs/div)
-0.2
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
Load Transient Response
(10mA to 400mA; V
IN
= 3.6V; V
OUT
= 1.2V)
Output Voltage
(top) (V)
Load and Inductor Current
(bottom) (200mA/div)
Time (50µs/div)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
N-Channel RDS(ON) vs. Input Voltage
Input Voltage (V)
R
DS(ON)L
(mΩ
Ω
)
150
200
250
300
350
400
450
2.5 3 3.5 4 4.5 5 5.5 6 6.5
125°C
100°C85°C
25°C
P-Channel RDS(ON) vs. Input Voltage
Input Voltage (V)
R
DS(ON)H
(mΩ
Ω
)
200
250
300
350
400
450
2.5 3 3.5 4 4.5 5 5.5 6 6.5
125°C
100°C
85°C
25°C
AAT1142
800mA Voltage-Scaling Step-Down Converter
81142.2006.07.1.0
Typical Characteristics
Output Programming Step
from 1.2V to 0.9V
(V
IN
= 3.6V; R
OUT
= 1.85Ω
Ω
)
Output Voltage
(top) (V)
Output Current
(bottom) (A)
Time (50µs/div)
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
1.10
1.20
1.30
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.85
0.90
Output Programming Step
from 0.9V to 1.2V
(V
IN
= 3.6V; R
OUT
= 1.85Ω
Ω
)
Output Voltage
(top) (V)
Output Current
(bottom) (A)
Time (50µs/div)
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
1.10
1.20
1.30
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.85
0.90
Output Ripple
(V
IN
= 4.2V; V
OUT
= 0.8V; I
OUT
= 650mA)
Output Voltage
(top) (V)
Inductor Current
(bottom) (A)
Time (200ns/div)
0.72
0.73
0.74
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.60
0.62
0.64
0.66
0.68
0.70
0.72
0.74
0.76
0.78
0.80
Output Ripple
(V
IN
= 4.2V; V
OUT
= 0.8V; No Load)
Output Voltage
(top) (V)
Inductor Current
(bottom) (A)
Time (4µs/div)
0.60
0.65
0.70
0.75
0.80
0.85
0.90
-0.02
0.00
0.02
0.04
0.06
0.08
0.10
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 9
Functional Block Diagram
SCL
LX
Logic
DH
DL
PGND
AGND
PVINVIN
FB
SDA
EN/SET
MODE/SYNC
Control
Logic
Voltage
Reference
Err.
Amp.
AAT1142
800mA Voltage-Scaling Step-Down Converter
10 1142.2006.07.1.0
Functional Description
The AAT1142 is a high performance, 800mA step-
down converter with an input voltage range from
2.7V to 5.5V. The AAT1142 uses Dynamic Voltage
Management, which allows the system host to
quickly set the output voltage through the integrat-
ed I2C or S2Cwire interface. Through this interface,
the host can change the output voltage to track
processor idle and active states, greatly extending
battery life without degrading system performance.
I2C provides an industry-standard, dual-line inter-
face, while S2Cwire provides a single-line, high-
speed serial interface.
The 2.2MHz switching frequency allows the use of
small external components. Only three external
components are needed to program the output
from 0.6V to 2.0V. Typically, one 4.7µF capacitor,
one 10µF capacitor, and one 2.2µH inductor are
required.
The integrated low-loss MOSFET switches provide
up to 93% efficiency. PFM operation maintains
high efficiency under light load conditions (typically
<50mA). Pulling the MODE/SYNC pin high allows
optional PWM Only low noise mode. This main-
tains constant frequency and low output ripple
across all load conditions. Alternatively, the IC can
be synchronized to an external clock via the
MODE/SYNC input. External synchronization can
be maintained between 1MHz and 3MHz.
At low input voltages, the converter dynamically
adjusts the operating frequency prior to dropout to
maintain the required duty cycle and provide accu-
rate output regulation. Output regulation is main-
tained until the dropout voltage, or minimum input
voltage, is reached.
The AAT1142 achieves better than ±0.5% output
regulation across the input voltage and output load
range. Maximum continuous load is 800mA. A
current limit of 1A (typical) protects the IC and sys-
tem components from short-circuit damage.
Typical no load quiescent current is 35µA.
Thermal protection completely disables switching
when the maximum junction temperature is detect-
ed. The junction over-temperature threshold is
140°C with 15°C of hysteresis. Once an over-tem-
perature or over-current fault condition is removed,
the output voltage automatically recovers.
Peak current mode control and optimized internal
compensation provide high loop bandwidth and
excellent response to input voltage and fast load
transient events. The output voltage is stable across
all operating conditions, ensuring fast transitions
with no overshoot or ringing. Soft start eliminates
output voltage overshoot when the enable or the
input voltage is applied. Under-voltage lockout pre-
vents spurious start-up events.
Control Loop
The AAT1142 is a peak current mode step-down
converter. The current through the P-channel
MOSFET (high side) is sensed for current loop
control, as well as short-circuit and overload pro-
tection. A fixed slope compensation signal is added
to the sensed current to maintain stability for duty
cycles greater than 50%. The peak current mode
loop appears as a voltage-programmed current
source in parallel with the output capacitor.
The output of the voltage error amplifier programs
the current mode loop for the necessary peak
switch current to force a constant output voltage for
all load and line conditions. Internal loop compen-
sation terminates the transconductance voltage
error amplifier output. Loop stability and fast tran-
sient response are maintained across the entire
input and output voltage range with a small 2.2µH
output inductor and 10µF output capacitor.
Soft Start/Enable
Soft start limits the current surge seen at the input
and eliminates output voltage overshoot. When
pulled low, the enable input forces the AAT1142
into a low-power, non-switching state. The total
input current during shutdown is less than 1µA.
The turn-on time from EN to output regulation is
100µs (typical).
Alternatively, the EN/SET pin serves as the input
for S2Cwire single line control. Details of S2Cwire
operation and timing diagrams are provided in the
Applications Information section of this datasheet.
Current Limit and Over-Temperature
Protection
Switching is terminated after entering current limit
for a series of pulses to minimize power dissipation
and stresses under overload and short-circuit con-
ditions. Switching is terminated for seven consecu-
tive clock cycles after a current limit has been
sensed for a series of four consecutive clock cycles.
Thermal protection completely disables switching
when internal dissipation becomes excessive. The
junction over-temperature threshold is 140°C with
15°C of hysteresis. Once an over-temperature or
over-current fault condition is removed, the output
voltage automatically recovers.
Under-Voltage Lockout
Internal bias of all circuits is controlled via the VIN
input. Under-voltage lockout (UVLO) guarantees
sufficient VIN bias and proper operation of all inter-
nal circuitry prior to activation.
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 11
Applications Information
The AAT1142 output voltage may be programmed
from 0.6V to 2.0V through I2C or S2Cwire serial
interface. When using I2C or S2Cwire, the output
voltage can be programmed across the entire out-
put voltage range or in increments as small as
±50mV (see Figure 2).
I2C Serial Interface
The AAT1142 is compatible with the I2C interface,
which is a widely used two-line serial interface.
The I2C two-wire communications bus consists of
SDA and SCL lines. SDA provides data, while SCL
provides clock input. SDA data consists of an
address bit sequence followed by a data bit
sequence. SDA data transfer is synchronized to
SCL rising clock edges.
When using the I2C interface, EN/SET is pulled
high to enable the output or low to disable the out-
put. To ensure a disable event, the EN/SET pulse
width must be greater than the latch time (500µs
maximum).
The I2C serial interface requires a master to initiate
all the communications with slave devices. The I2C
protocol is a bidirectional bus allowing both read and
write actions to take place; while the AAT1142 is a
slave device and only supports the write protocol.
The AAT1142 is a receiver-only (or write-only)
slave device and the Read / Write (R/W) bit is set
low. The AAT1142 address is preset to 0x14 (Hex).
I2C START and STOP Conditions
START and STOP conditions are initialized by the
I2C bus master. The master determines the START
(beginning) and STOP (end) of a transfer with the
slave device. Prior to initiating a START or after
STOP, both the SDA and SCL lines are in bus-free
mode. Bus-free mode is when SDA and SCL are
both in the high state (see Figure 3).
AAT1142
800mA Voltage-Scaling Step-Down Converter
12 1142.2006.07.1.0
Figure 1: AAT1142 Evaluation Board Schematic.
C1
4.7µF
V
OUT
LX
U1 AAT1142 TSOPJW-12
L1 CDRH2D14/2R2
C1 4.7µF 10V 0805 X5R
C2 10µF 10V 0805 X5R
C3 10µF optional
C4 0.1µF optional
R1 0Ω 0603
R2 optional 0603
R3 10K 0603
R4, R5 1.8K 0603
V
IN
V
IN
V
IN
V
IN
V
IN
LX
1
PGND
2
MODE/SYNC
3
SDA
4
SCL
5
EN/SET
6
FB
7
AGND
8
AGND
9
AGND
10
AGND
11
VIN
12
AAT1142
TSOPJW-12
U1
SDA
SCL
1
2
JP1
1
2
3
JP3
C3
(optional)
10µF
C4
(optional)
0.1µF
(optional)
C2
10µF
R5
1.8K
R4
1.8K
L1
2.2µH
R3
10K
0
R1
R2
(optional)
1
2
JP2
I2C Address Bit Map
Figure 4 illustrates the address bit map format. The
7-bit address is sent with the Most Significant Bit
(MSB) first and is valid when SCL is high. This is fol-
lowed by the R/W bit in the Least Significant Bit
(LSB) location. The R/W bit determines the direction
of the transfer ('1' for read, '0' for write). The
AAT1142 is a write-only device and this bit must be
set low when communicating with the AAT1142. The
Acknowledge bit (ACK) is set to low by the AAT1142
slave to acknowledge receipt of the address.
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 13
Figure 2: AAT1142 Graphical Output Voltage Programming Map.
Figure 3: I2C Start and Stop Conditions.
START: A High "1" to Low "0" Transition on the SDA Line While SCL is High "1"
STOP: A Low "0" to High "1" Transition on the SDA Line While SCL is High "1"
SDA
SCL
SD
A
SCL
START STOP
0.0
0.5
1.0
1.5
2.0
1.8
(default)
2.5
13579111315
17 19 21 23 25 27 29 31 32
I
2
C/S
2
Cwire Register
Output Voltage Level (V)
I2C Data Bit Map
Figure 5 illustrates the data bit format. The 8-bit
data is always sent with the most significant bit first
and is valid when SCL is high. The ACK bit is set
low by the AAT1142 slave device to acknowledge
receipt of the data.
I2C Acknowledge Bit
The ACK bit is the ninth bit in the address and data
byte. The master must first release the SDA line, and
then the slave will pull the SDA line low. The
AAT1142 sends a low bit to acknowledge receipt of
each byte. This occurs during the ninth clock cycle
of Address and Data transfers (see Figures 5 and 6).
I2C Software Protocol
An I2C master / slave data transfer, detailing the
address and data bits, is shown in Figure 6. The
programming sequence is as follows:
1. Send a start condition
2. Send the I2C slave address with the R/W bit
set low
3. Wait for acknowledge within the clock cycle
4. Send the data bits
5. Wait for acknowledge within the clock cycle
6. Send the stop condition
AAT1142
800mA Voltage-Scaling Step-Down Converter
14 1142.2006.07.1.0
Figure 4: I2C Address Bit Map;
7-bit Slave Address (A6-A0), 1-bit Read/Write (R/W), 1-bit Acknowledge (ACK).
SCL 1 2 3456789
SDA A6 A5 A4 A3 A2 A1 A0 R/W ACK
Slave Address
LSBMSB
Figure 5: I2C Data Bit Map;
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
Figure 6: I2C SCL, SDA Transfer Protocol Example;
7-bit Slave Address (A6-A0 = 0x14), 1-bit Read/Write (R/W = 0), 1-bit Acknowledge (ACK),
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
Start Slave Address R/W ACK Data ACK Stop
1SCL 23456789 123456789
1100000
7-bit address (0x14)
0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
SCL 1 2 3456789
SDA D7 D6 D5 D4 D3 D2 D1 D0 ACK
Data
LSBMSB
Table 1: AAT1142 I2C Output Voltage Programming Map (X = don’t care).
Data Bits Output
Data Voltage
Register D7 D6 D5 D4 D3 D2 D1 D0 (V)
1 X X 0 0 0 0 0 0 0.60
2 X X 0 0 0 0 0 1 0.65
3 X X 0 0 0 0 1 0 0.70
4 X X 0 0 0 0 1 1 0.75
5 X X 0 0 0 1 0 0 0.80
6 X X 0 0 0 1 0 1 0.85
7 X X 0 0 0 1 1 0 0.90
8 X X 0 0 0 1 1 1 0.95
9 X X 0 0 1 0 0 0 1.00
10 X 0 0 0 1 0 0 1 1.05
11 X X 0 0 1 0 1 0 1.10
12 X X 0 0 1 0 1 1 1.15
13 X X 0 0 1 1 0 0 1.20
14 X X 0 0 1 1 0 1 1.25
15 X X 0 0 1 1 1 0 1.30
16 X X 0 0 1 1 1 1 1.35
17 X X 0 1 0 0 0 0 1.40
18 X X 0 1 0 0 0 1 1.45
19 X X 0 1 0 0 1 0 1.50
20 X X 0 1 0 0 1 1 1.55
21 X X 0 1 0 1 0 0 1.60
22 X X 0 1 0 1 0 1 1.65
23 X X 0 1 0 1 1 0 1.70
24 X X 0 1 0 1 1 1 1.75
25 X X 0 1 1 0 0 0 1.80 (default)
26 X X 0 1 1 0 0 1 1.85
27 X X 0 1 1 0 1 0 1.90
28 X X 0 1 1 0 1 1 1.95
29 X X 0 1 1 1 0 0 2.00
30 X X 0 1 1 1 0 1 2.00
31 X X 0 1 1 1 1 0 2.00
32 X X 0 1 1 1 1 1 2.00
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 15
I2C Output Voltage Programming
The AAT1142 output voltage is programmed
through the I2C interface according to Table 1. The
data register encoded on the SCL and SDA lines
determines the output voltage set-point after initial
start-up. Upon power-up and prior to I2C program-
ming, the default output voltage is set to 1.8V.
S2Cwire Serial Interface
AnalogicTech's S2Cwire serial interface is a propri-
etary high-speed single-wire interface. The S2Cwire
interface records rising edges of the EN/SET input
and decodes them into one of 32 registers which
determines the output voltage, as shown in Table 2.
Each state corresponds to an output voltage setting.
When using the S2Cwire interface, both I2C inputs
should be tied to the ground return. This disables
the I2C functionality.
S2Cwire Serial Interface Timing
The S2Cwire serial interface has flexible timing.
Data can be clocked-in at speeds up to 1MHz.
After data has been submitted, EN/SET is held
high to latch the data for a period TLAT. The output
is subsequently changed to the predetermined volt-
age. When EN/SET is set low for a time greater
than TOFF, the AAT1142 is disabled. When dis-
abled, the data register is reset to the default value.
AAT1142
800mA Voltage-Scaling Step-Down Converter
16 1142.2006.07.1.0
S2Cwire Timing Diagram
1
EN/SET
2n-1 n ≤ 64
Data Reg 0n-1
0
T
HI
T
LO
T
LAT
T
OFF
S2Cwire Output Voltage Programming
The AAT1142 is programmed through the S2Cwire
interface according to Table 2. The rising clock
edges received through the EN/SET pin corre-
sponding to a given data register determine the
output voltage set-point. Upon power-up and prior
to S2Cwire programming, the default output voltage
is set to 1.8V.
Table 2: AAT1142 S2Cwire Output Voltage
Programming Map.
Rising Rising
Clock Clock
Edges/ Output Edges/ Output
Data Voltage Data Voltage
Register (V) Register (V)
1 No change 17 1.40
2 0.65 18 1.45
3 0.70 19 1.50
4 0.75 20 1.55
5 0.80 21 1.60
6 0.85 22 1.65
7 0.90 23 1.70
8 0.95 24 1.75
9 1.00 25 1.80 (default)
10 1.05 26 1.85
11 1.10 27 1.90
12 1.15 28 1.95
13 1.20 29 2.00
14 1.25 30 2.00
15 1.30 31 2.00
16 1.35 32 2.00
Component Selection
Inductor Selection
The step-down converter uses peak current mode
control with slope compensation to maintain stability
for duty cycles greater than 50%. The output induc-
tor value must be selected so the inductor current
down slope meets the internal slope compensation
requirements. The internal slope compensation for
the programmable AAT1142 is 0.61A/µsec. This
equates to a slope compensation that is 75% of the
inductor current down slope for a 1.8V output and
2.2µH inductor.
Manufacturer's specifications list both the inductor
DC current rating, which is a thermal limitation,
and the peak current rating, which is determined
by the saturation characteristics. The inductor
should not show any appreciable saturation under
normal load conditions. Some inductors may meet
the peak and average current ratings yet result in
excessive losses due to a high DCR. Always con-
sider the losses associated with the DCR and its
effect on the total converter efficiency when
selecting an inductor.
The 2.2µH CDRH2D14 series Sumida inductor has
a 94mΩDCR and a 1.5A DC current rating. At full
800mA load, the inductor DC loss is 60mW which
gives a 4.8% loss in efficiency for an 800mA, 1.0V
output.
Input Capacitor
Select a 4.7µF to 10µF X7R or X5R ceramic capac-
itor for the input. To estimate the required input
capacitor size, determine the acceptable input rip-
ple level (VPP) and solve for C. The calculated
value varies with input voltage and is a maximum
when VIN is double the output voltage.
Always examine the ceramic capacitor DC voltage
coefficient characteristics when selecting the prop-
er value. For example, the capacitance of a 10μF,
6.3V, X5R ceramic capacitor with 5.0V DC applied
is actually about 6µF.
The maximum input capacitor RMS current is:
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
for VIN = 2 · VO
The term appears in both the input
voltage ripple and input capacitor RMS current
equations and is a maximum when VOis twice VIN.
This is why the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT1142. Low ESR/ESL X7R and X5R ceramic
⎛⎞
· 1
-
⎝⎠
V
O
V
IN
V
O
V
IN
I
O
RMS(MAX)
I2
=
⎛⎞
· 1
-
= D
· (1 - D) = 0.5
2
=
⎝⎠
V
O
V
IN
V
O
V
IN
1
2
⎛⎞
I
RMS
= I
O
· · 1
-
⎝⎠
V
O
V
IN
V
O
V
IN
C
IN(MIN)
= 1
⎛⎞
- ESR
·
4
·
F
S
⎝⎠
V
PP
I
O
⎛⎞
· 1
-
= for V
IN
= 2 · V
O
⎝⎠
V
O
V
IN
V
O
V
IN
1
4
⎛⎞
· 1
-
⎝⎠
V
O
V
IN
C
IN
=
V
O
V
IN
⎛⎞
- ESR
·
F
S
⎝⎠
V
PP
I
O
0.75 ⋅ V
O
m = = = 0.61
L
0.75 ⋅ 1.8V
2.2µH
A
µsec
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 17
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed as
closely as possible to the IC. This keeps the high
frequency content of the input current localized,
minimizing EMI and input voltage ripple.
Proper placement of the input capacitor (C1) is
shown in the evaluation board layout in Figure 7.
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain meas-
urements can also result.
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic capacitor should
be placed in parallel with the low ESR, ESL bypass
ceramic capacitor. This dampens the high Q net-
work and stabilizes the system.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7µF to 10µF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabilize
the output during large load transitions and has the
ESR and ESL characteristics necessary for low out-
put ripple. A smaller capacitor may result in slightly
increased no load output regulation and output rip-
ple with input voltages above 5V. This should be
verified under actual operating conditions.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
put capacitor. During a step increase in load cur-
rent, the ceramic output capacitor alone supplies
the load current until the loop responds. Within two
or three switching cycles, the loop responds and
the inductor current increases to match the load
current demand. The relationship of the output volt-
age droop during the three switching cycles to the
output capacitance can be estimated by:
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
above equation establishes a limit on the minimum
value for the output capacitor with respect to load
transients.
The internal voltage loop compensation also limits
the minimum output capacitor value to 4.7μF. This
is due to its effect on the loop crossover frequency
(bandwidth), phase margin, and gain margin.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
Thermal Calculations
There are three types of losses associated with the
AAT1142 step-down converter: switching losses,
conduction losses, and quiescent current losses.
Conduction losses are associated with the RDS(ON)
characteristics of the power output switching
devices. Switching losses are dominated by the gate
charge of the power output switching devices. At full
load, assuming continuous conduction mode
(CCM), a simplified form of the losses is given by:
IQis the step-down converter quiescent current.
The term tsw is used to estimate the full load step-
down converter switching losses.
For the condition where the step-down converter is
in dropout at 100% duty cycle, the total device dis-
sipation reduces to:
P
TOTAL
= I
O
2
· R
DS(ON)H
+ I
Q
· V
IN
P
TOTAL
I
O
2
· (R
DS(ON)H
· V
O
+ R
DS(ON)L
· [V
IN
- V
O
])
V
IN
=
+ (t
sw
· F
S
· I
O
+ I
Q
) · V
IN
C
OUT
=
3
·
ΔI
LOAD
V
DROOP
·
F
S
AAT1142
800mA Voltage-Scaling Step-Down Converter
18 1142.2006.07.1.0
Since RDS(ON), quiescent current, and switching
losses all vary with input voltage, the total losses
should be investigated over the complete input
voltage range.
Given the total losses, the maximum junction tem-
perature can be derived from the θJA for the
TSOPJW-12 package which is 160°C/W.
Layout
The suggested PCB layout for the AAT1142 in a
TSOPJW-12 package is shown in Figures 7 and 8.
The following guidelines should be used to help
ensure a proper layout.
1. The input capacitor (C2) should connect as
closely as possible to VIN (Pin 12) and PGND
(Pin 2).
2. C1 and L1 should be connected as closely as
possible. The connection of L1 to the LX pin
(Pin 1) should be as short as possible.
3. The feedback pin (Pin 7) should be separate
from any power trace and connected close to the
VOUT terminal. Sensing along a high-current
load trace will degrade VOUT load regulation.
4. The resistance of the trace from the GND ter-
minal to PGND (Pin 2) should be kept to a min-
imum. This will help to minimize any error in DC
regulation due to differences in the potential of
the internal signal ground and the power
ground.
5. Connect unused signal pins to ground to avoid
unwanted noise coupling. When using S2Cwire,
connect SDA and SCL to ground to disable I2C
functionality.
6. When using the TDFN33-12 package, connect
the exposed paddle (EP) to the GND plane.
T
J(MAX)
=
P
TOTAL
·
Θ
JA
+ T
AMB
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 19
Figure 7: AAT1142 Evaluation Board Figure 8: AAT1142 Evaluation Board
Top Side Layout (TSOPJW-12 Package). Bottom Side Layout (TSOPJW-12 Package).
Table 3: Typical Surface Mount Inductors.
Table 4: Surface Mount Capacitors.
Manufacturer Part Number Type Value Voltage Temp. Co. Case
MuRata GRM188R60J106ME47D Ceramic 10 6.3 X5R 0603
MuRata GRM21BR60J106KE19L Ceramic 10 10 X5R 0805
MuRata GRM188R60J475KE19D Ceramic 4.7 6.3 X5R 0603
MuRata GRM21BR61A475KA73L Ceramic 4.7 10 X5R 0805
Inductance Max DC DCR Size (mm)
Manufacturer Part Number (µH) Current (A) (ΩΩ) LxWxH Type
Sumida CDRH3D16-2R2 2.2 1.20 0.072 3.8x3.8x1.8 Shielded
Sumida CDRH2D14-2R2 2.2 1.50 0.094 3.2x3.2x1.55 Shielded
Taiyo Yuden NR3010T2R2M 2.2 1.10 0.095 3.0x3.0x1.0 Shielded
Taiyo Yuden CBC3225T2R2MR 2.2 1.13 0.080 3.2x2.5x2.5 Non-Shielded
AAT1142
800mA Voltage-Scaling Step-Down Converter
20 1142.2006.07.1.020 1142.2006.07.1.0
AAT1142
800mA Voltage-Scaling Step-Down Converter
1142.2006.07.1.0 21
Ordering Information
Package Information
TSOPJW-12
All dimensions in millimeters.
0.20 + 0.10
- 0.05
0.055 ± 0.045 0.45 ± 0.15
7° NOM
4° ± 4°
3.00 ± 0.10
2.40 ± 0.10
2.85 ± 0.20
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
0.15 ± 0.05
0.9625
±
0.0375
1.00 + 0.10
- 0.065
0.04 REF
0.010
2.75 ± 0.25
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Package Marking1Part Number (Tape and Reel)2
TSOPJW-12 RIXYY AAT1142ITP-1.8-T1
TDFN33-12 AAT1142IWP-1.8-T1
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
AAT1142
800mA Voltage-Scaling Step-Down Converter
22 1142.2006.07.1.0
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights,
or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice.
Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold sub-
ject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech
warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality con-
trol techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed.
AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are regis-
tered trademarks or trademarks of their respective holders.
TDFN33-12
All dimensions in millimeters.
Top View Bottom View
Detail "B"
Detail "A"
Side View
3.00 ± 0.05
Index Area
(D/2 x E/2)
Detail "A"
Detail "B"
1.70 ± 0.05
3.00 ± 0.05
0.05 ± 0.05
0.229 ± 0.051
7.5° ± 7.5°
2.40 ± 0.05
0.16
Pin 1 Indicator
(optional)
0.375 ± 0.125
0.3 ± 0.10
0.45 ± 0.050.23 ± 0.05
0.075 ± 0.075
0.1 REF
0.8 + 0.05
-0.20
Option A:
C0.30 (4x) max
Chamfered corner
Option B:
R0.30 (4x) max
Round corner