TC1017-3.3VCTTR - MICROCHIP - searchdatasheet.com

TC1017

Features

• Space -sav in g 5-Pi n SC- 70 an d SOT-23 Package s

• Extremely Low Operating Current for Longer

Battery Life: 53 µ A (typ.)

• Very Low Dropout Voltage

• Rated 150 mA Output Current

• Re quires Only 1 µF Ceramic Output Capaci tance

• High Output Voltage Accuracy: ±0.5% (typ.)

• 10 µs (typ.) Wake-Up Time from SHDN

• Power-Saving Shutdown Mode: 0.05 µA (typ.)

• Overcurrent and Overtemperature Protection

• Pin-Compatible Upgrade for Bipolar Regulators

Applications

• Cellular/GSM/PHS Phones

• Battery-Operated Systems

• Portable Computers

• Medical Instruments

• Elec t roni c Ga mes

• Pagers

General Descripti on

The TC1017 is a high-accuracy (typically ±0.5%)

CMOS upgrade for bipolar Low Dropout regulators

(LDOs). It is offered in a SC-70 or SOT-23 package.

The SC-70 package represents a 50% footprint reduc-

tion vers us the po pular SOT-23 pack age and i s of fered

in two pinouts to make board layout easier.

Developed specifically for battery-powered systems,

the TC1017’s CMOS construction consumes only

53 µA typical supply current over the entire 150 mA

operat ing load range . This can be as much as 60 times

less tha n the quies cent opera ting curren t consum ed by

bipolar LD Os.

The TC1017 is designed to be stable, over the entire

input voltage and output current range, with low-value

(1 µF) ceramic or tantalum capacitors. This helps to

reduce board space and save cost. Additional inte-

grated features, such as shutdown, overcurrent and

overtemperature protection, further reduce the board

space and cost of the entire voltage-regulating

application.

Key performance parameters for the TC1017 include

low dropout voltage (285 mV typical at 150 mA output

current), low supply current while shutdown (0.05 µA

typical) and fast stable response to sudden input

voltage and load changes.

Package Types

SC-70

SHDN NC

VOUT

VIN

GND

TC1017

SOT-23

123

NCVOUT

SHDNGNDVIN

TC1017

VIN GND

NCVOUT

SHDN

TC1017R

150 mA, T iny CMOS LDO With Shutdown

TC1017

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maxim um Ratings †

Input Voltage.............. .. .. .. .. ..... .. .. .. .. .. .. .... ..... .. .. .. .. .. .. .. .. ....6.5V

Power Dissipati on . .. ...... ......... .. ..... Intern al l y L im i te d (Note 7)

Maximum Vo ltage On Any Pin ..................V IN + 0.3V to -0.3V

† Notice: Stresses above those listed under "Maximum

Ratings" may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operation listings of this specification is not implied. Exposure

to maximum rating conditions for extended periods may af fect

device reliability.

PIN FUNCTION TABLE

Name Function

SHDN Shutdown control input.

NC No connect

GND Ground terminal

VOUT Regulated voltage output

VIN Unregulated supply input

ELECTR ICAL CHARACTERISTICS

Electrical Specifications: Unless otherwise noted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C

Boldface type specifications apply for junction temperatures of –40°C to +125°C.

Parameter Sym Min Typ Max Units Test Conditions

Input Operating Voltage VIN 2.7 —6.0 VNote 1

Maximum Outpu t Current IOUTMAX 150 ——mA

Output Voltage VOUT VR – 2.5% VR ±0.5% VR + 2.5% VNote 2

VOUT Temperature Coefficient TCVOUT —40 — ppm/°C Note 3

Line Regulation |(ΔVOUT/ΔVIN)| / VR—0.040.2 %/V (VR + 1V) < VIN < 6V

Load Regulation (Note 4) |ΔVOUT| / VR—0.381.5 %I

L = 0.1 mA to IOUTMAX

Dropout Voltage (Note 5) VIN – VOUT —

—

180

285

—

200

350

500

mV IL = 100 µA

IL = 50 mA

IL = 100 mA

IL = 150 mA

Supply Current IIN —5390 µA SHDN = VIH, IL = 0

Shutdown Supply Current IINSD — 0.05 2 µA SHDN = 0V

Power Supply Rejection Ratio PSRR — 58 — dB f =1 kHz, IL = 50 mA

Wake-Up Time

(from Shutdown Mode) tWK —10—µsV

IN = 5V, IL = 60 mA,

CIN = COUT =1 µF,

f = 100 Hz

Note 1: The minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ (VR + 2.5%) + VDROPOUT.

2: VR is the regulator voltage setting. For example: VR = 1.8V, 2.7V, 2.8V, 3.0V.

4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested

over a load range from 0.1 mA to the m axim um specif ied output current. Changes in output voltage due to heating

effects a re covered by the thermal regulation specification.

5: Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal

value at a 1V differential.

6: Thermal regulation is defined as the change in output volt age at a time T af ter a change in power dissip ation i s applied,

excluding load or line regulation eff ects. Specifications are for a current pulse equal to ILMAX at VIN = 6V for t = 10 msec.

7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power

dissipation causes the device to initiate thermal shutdown. Please see Section 5.1 “Thermal Shutdown”, for more

details.

8: Output current is limited to 120 mA (typ) when VOUT is less than 0.5V due to a load fault or short-circuit condition.

TCVOUT

VOUTMAX VOUTMIN

–()106

VOUT TΔ×

--------------------------------------------------------------------------------------

TC1017

Settling Time

(from Shutdown mode) tS—32—µsV

IN = 5V, IL = 60 mA,

CIN = 1 µF,

COUT = 1 µF, f = 100 Hz

Output Short-Circuit Current IOUTSC — 120 — mA VOUT = 0V, Average

Current (Note 8)

Thermal Regulation VOUT/PD—0.04—V/WNotes 6, 7

Thermal Shutdown Die

Temperature TSD — 160 — °C

Thermal Shutdown Hysteresis ΔTSD —10—°C

Output Noise eN — 800 — nV/√Hz f = 10 kHz

SHDN Input High Threshold VIH 45 ——%V

IN VIN = 2.7V to 6.0V

SHDN Input Low Threshold VIL ——15 %VIN VIN = 2.7V to 6.0V

ELECTRIC AL CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C

Boldface type specifications apply for junction temperatures of –40°C to +125°C.

Parameter Sym Min Typ Max Units Test Conditions

Note 1: The minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ (VR + 2.5%) + VDROPOUT.

2: VR is the regulator voltage setting. For example: VR = 1.8V, 2.7V, 2.8V, 3.0V.

4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested

over a load range from 0.1 mA to the m axim um specif ied output current. Changes in output voltage due to heating

effects a re covered by the thermal regulation specification.

5: Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal

value at a 1V differential.

6: Thermal regulation is defined as the change in output volt age at a time T af ter a change in power dissip ation i s applied,

excluding load or line regulation ef fect s. Specifications are for a current pulse equal to ILMAX at VIN = 6V for t = 10 msec.

7: The maximum allowable power dissipation is a function of ambient tem perat ure, the maximum allowable junction

temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power

dissipation causes the device to initiate thermal shutdown. Please see Section 5.1 “Thermal Shutdown”, for more

details.

8: Output current is limited to 120 mA (typ) when VOUT is less than 0.5V due to a load fault or short-circuit condition.

TCVOUT

VOUTMAX VOUTMIN

–()106

VOUT TΔ×

--------------------------------------------------------------------------------------

TEMPERATURE CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, VDD = +2.7V to +6.0V and VSS = GND.

Parameters Sym Min Typ Max Units Conditions

Temperature Ranges

Specified Temperature Range TA-40 — +125 °C Extended Temperature parts

Operating Temperature Range TA-40 — +125 °C

Storage Temperature Range TA-65 — +150 °C

Thermal Package Resistances3

Thermal Resistance, 5L-SOT23 θJA — 255 — °C/W

Thermal Resistance, 5L-SC-70 θJA — 450 — °C/W

TC1017

2.0 TYPICAL PERFORMANCE CHARACTERISTICS

Note: Unless otherwise n oted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C.

FIGURE 2-1: Dropout Voltage vs. Output

Current.

FIGURE 2-2: Load Regulation vs.

Temperature.

FIGURE 2-3: Supply Current vs. Input

Voltage.

FIGURE 2-4: Dropout Voltage vs.

Temperature.

FIGURE 2-5: Short-Circuit Current vs.

Input Voltage.

FIGURE 2-6: Supply Current vs.

Temperature.

Note: The g r ap hs and t ables provid ed fol lowing this note are a st atistical s umm ar y b as ed on a limited n um ber of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0 25 50 75 100 125 150

Load Current (mA)

Dropout Voltage (V)

TA = +125°C

TA = +25°C

TA = -40°C

VOUT = 2.85V

-0.70

-0.65

-0.60

-0.55

-0.50

-0.45

-0.40

-0.35

-0.30

-40 -15 10 35 60 85 110

Temperatu re (°C)

Load Regulation (%)

VOUT

= 2.85V

IOUT

= 0-150 mA

VIN

= 6.0V

VIN

= 3.85V

VIN

= 3.3V

3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0

Input Voltage (V)

Supply Current (µA)

TA = -40°C

TA = +25°C

TA = +125°C

VOUT = 2.85V

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

-40 -15 10 35 60 85 110

Temperature (°C)

Dropout Voltage (V)

IOUT = 50 mA

IOUT = 100 mA

IOUT = 150 mA

VOUT = 2.85V

100

120

140

160

123456

Input Voltage (V)

Short Circuit Current (mA)

VOUT = 2.85V

-40 -15 10 35 60 85 110

Temperature (°C)

Supply Current (µA)

VIN = 6.0V

VIN = 3.85V

VIN = 3.3V

VOUT = 2.85V

TC1017

Note: Unless otherwise n oted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C.

FIGURE 2-7: Dropout Voltage vs. Output

Current.

FIGURE 2-8: Load Regulation vs.

Temperature.

FIGURE 2-9: Suppl y Curr ent vs.

Temperature.

FIGURE 2-10: Dropout Voltage vs.

Temperature.

FIGURE 2-11: Supply Current vs. Input

Voltage.

FIGURE 2-12: Output Voltage vs. Supply

Voltage.

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0 25 50 75 100 125 150

Load Current (mA)

Dropout Voltage (V)

VOUT = 3.30V

TA = +125°C

TA = +25°C

TA = -40°C

-0.70

-0.65

-0.60

-0.55

-0.50

-0.45

-0.40

-0.35

-0.30

-40 -15 10 35 60 85 110

Temperatu re (°C)

Load Regulation (%)

VOUT = 3.30V

IOUT = 0-150 mA

VIN = 6.0V

VIN = 4.0V

VIN = 4.3V

-40 -15 10 35 60 85 110

Temperature (°C)

Supply Current (µA)

VOUT = 3.30V

VIN = 4.0V

VIN = 4.3V

VIN = 6.0V

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

-40 -15 10 35 60 85 110

Temperature (°C)

Dropout Voltage (V)

VOUT = 3.30V

IOUT = 150 mA

IOUT = 100 mA

IOUT = 50 mA

4.04.55.05.56.0

Input Voltage (V)

Supply Current (µA)

TA = +125°C

TA = +25°C

TA = -40°C

VOUT = 3.30V

2.862

2.863

2.864

2.865

2.866

2.867

2.868

2.869

3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0

Input Voltage (V)

Output Voltage (V)

VOUT = 2.85V

TA = -40°C

TA = +25°C

TA = +125°C

TC1017

Note: Unless otherwise n oted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C.

FIGURE 2-13: Output Voltage vs. Output

Current.

FIGURE 2-14: Shutdown Current vs. Input

Voltage.

FIGURE 2-15: Power Supply Rejection

Ratio vs. Frequency.

FIGURE 2-16: Output Voltage vs.

Temperature.

FIGURE 2-17: Output Noise vs. Frequency.

FIGURE 2-18: Power Supply Rejection

Ratio vs. Frequency.

2.854

2.856

2.858

2.860

2.862

2.864

2.866

2.868

2.870

0 25 50 75 100 125 150

Load Current (mA)

Output Voltage (V)

VIN = 3.85V

VIN = 6.0V

VOUT = 2.85V

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0

Input Voltage (V)

Shutdown Current (µA)

TA = +25°C

TA = + 125°CVOUT = 2.85V

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (KHz)

PSRR (dB)

VINDC = 3.85V

VINAC = 100 mVp-p

VOUTDC = 2.85V

IOUT = 100

COUT =1

FX7RCeramic

2.862

2.863

2.864

2.865

2.866

2.867

2.868

2.869

-40 -15 10 35 60 85 110

Temperature (°C)

Output Voltage (V)

VIN = 3.3V

VIN= 3.85V

VIN = 6.0V

VOUT = 2.85V

0.01

0.1

100

10 100 1000 10000 100000 1000000

Frequency (Hz)

Noise (µV/



Hz)

VIN = 3.85V

VOUT = 2.85V

CIN = 1 µF

COUT = 1 µF

IOUT = 40 mA

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (KHz)

PSRR (dB)

VINDC = 3.85V

VINAC = 100 mVp-p

VOUTDC = 2.85V

IOUT =1mA

COUT =1

FX7RCeramic

TC1017

Note: Unless otherwise n oted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C.

FIGURE 2-19: Power Supply Rejection

Ratio vs. Frequency.

FIGURE 2-20: Wake-Up Respon se.

FIGURE 2-21: Wake-Up Respon se.

FIGURE 2-22: Load Transient Response.

FIGURE 2-23: Load Transient Response.

FIGURE 2-24: Line Transient Response.

-80

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (KHz)

PSRR (dB)

VINDC = 3.85V

VINAC = 100 mVp-p

VOUTDC = 2.85V

IOUT =50mA

COUT =1

FX7RCeramic

VIN

= 3.85V

CIN

= 10 µF

COUT

= 1 µF Cerami c

Shutdow n Inpu

VOUT = 2. 85 V

VIN = 3.85V

CIN

= 10 µF

COUT = 4.7 µF Ceramic

Shutdown Inpu

VOUT

= 2.85V

VIN = 3.85V

CIN

= 10 µF

COUT = 1 µF Ceramic

VOUT = 2.85V

IOUT = 0.1 mA to 120 mA

VIN

= 3.85V

CIN

= 10 µF

COUT

= 4.7 µF Ceramic

VOUT = 2.85V

IOUT = 0. 1 mA to 120 mA

CIN

= 0 µF

COUT = 1.0 µF Ceram ic

ILOAD = 120 mA

VOUT = 2.85V

VIN = 3.85V to 4.85V

TC1017

Note: Unless otherwise n oted, VIN = VR + 1V, IL = 100 µA, CL = 1.0 µF, SHDN > VIH, TA = +25°C.

FIGURE 2-25: Line Transient Response.

FIGURE 2-26: Line Transient Response.

FIGURE 2-27: Line Transient Response.

CIN

= 0 µF

COUT = 4.7 µF Ceramic

ILOAD = 12 0 mA

VOUT = 2.85V

VIN = 3. 85V to 4. 85V

CIN

= 0 µF

COUT = 1 µF Ceramic

ILOAD = 100 µA

VOUT = 3. 33V

VIN = 4.3V to 5.3V

CIN

= 0 µF

COUT

= 10 µF Ceramic

ILOAD = 100 µA

VOUT = 3.33V

VIN = 4.3V to 5.3V

TC1017

3.0 PIN DESCRIPTIONS

The desc riptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

3.1 Shutdown Control Input (SHDN)

The regulator is fully enabled when a logic-high is

applied to SHDN . The regulator enters shutdown when

a logic-low is applied to this input. During shutdown, the

output voltage falls to zero and the supply current is

reduced to 0.05 µA (typ.)

3.2 Ground Terminal

For best performance, it is recommended that the

ground pin be tied to a ground plane.

3.3 Regulated Voltage Output (VOUT)

Bypass the regulated voltage output to GND with a

minimum capacitance of 1 µF. A ceramic bypass

capacitor is recomm ended for best performance.

3.4 Unregulated Supply Input (VIN)

The minimum VIN has to meet two conditions in order

to ensure that the output maintains regulation:

VIN ≥2.7V and VIN ≥ [(VR + 2.5%) + VDROPOUT]. The

maximum VIN should be less than or equal to 6V.

Power dissipation may limit VIN to a lower potential in

order to maintain a junction temperature below 125°C.

Refer to Section 5.0 “Thermal Considerations”, for

determining junction temperature.

It is recomm ended that VIN be byp assed to G ND wi th a

ceramic capacitor.

Pin No.

5-Pin SC-70

Pin No.

5-Pin SOT-23

5-Pin SC-70R Symbol Description

13SHDN

Shutdown Control Input

24NC No Connect

32GND Ground Terminal

45VOUT Regulated Voltage Output

51V

IN Unregulated Supply Input

TC1017

4.0 DETAILED DESCRIPTION

The TC1017 is a precision, fixed-output, linear voltage

regulator. The internal linear pass element is a

P-channel MOSFET. As with all P-channel CMOS

LDOs, there is a body drain diode with the cathode

connected to VIN and the anode connected to VOUT

(Figure 4-1).

As is shown in Figure 4-1, the output voltage of the

LDO is sensed and divided down internally to reduce

external component count. The internal error amplifier

has a fixed bandgap reference on the inverting input

and the sensed output voltage on the non-inverting

input. The error amplifier output will pull the gate

voltage down until the inputs of the error amplifier are

equal to regulate the output voltage.

Outpu t ov erlo ad p rot ecti on i s im plem ent ed b y se nsi ng

the current in the P-channel MOSFET. During a shorted

or faulted load condition in which the output voltage

falls to less than 0.5V, the output current is limited to a

typical value of 120 mA. The current-limit protection

helps prevent excessive current from damaging the

Printed Circuit Board (PCB).

An internal thermal sensing device is used to monitor

the junc tion temperature of the LDO. When the sensed

temperature is over the set threshold of 160°C (typical),

the P-channel MOSFET is turned off. When the P-chan-

nel is off, the power dissipation internal to the device is

almost zero. The device cools until the junction temper-

ature is approximately 150°C and the P-channel is

turned on. If the internal power dissipation is still high

enough for the junction to rise to 160°C, it will again shut

off and cool. The maximum operating junction tempera-

ture of the device is 125°C. Steady-state operation at or

near the 1 60°C o vertempera ture p oint can l ead to p er-

manent damage of the device.

The output voltage VOUT rem a i ns stab l e ov er the en t ir e

input operating voltage range (2.7V to 6.0V) and the

entire lo ad range (0 mA to 150 mA). The output vol tage

is sensed through an internal resistor divider and

compared with a precision internal voltage reference.

Several fixed-output voltages are available by

changing the value of the internal resistor divider.

Figure 4-2 shows a typical application circuit. The

regulato r is enabled any time the shu t do w n in put p in i s

at or above VIH. It is shut down (disabled) any time the

shut down inpu t pin is below V IL. For ap plicatio ns where

the SHDN feature is not used, tie the SHD N pin direc tly

to the input supply voltage source. While in shutdown,

the supply current decreases to 0.006 µA (typical) and

the P-channel MOSFET is turned off.

As shown in Figure 4-2, batteries have inte rnal source

impedance. An input capacitor is used to lower the

input im pedance of the LDO. In some appli cations, high

input impedance can cause the LDO to become

unstable. Adding more input capacitance can

compensate for this.

FIGURE 4-1: TC1017 Block Diagram (5-Pin SC-70 Pinout).

FIGURE 4-2: Typical Application Circuit (5-Pin SC-70 Pinout).

-EA

VOUT

VREF

SHDN

VIN

R1R2

SHDN

GND

VIN

NC Current Lim it

Over

Error

Feedback Resistors

Control

Temp.

Body

Diode

Amp

VOUT

SHDN

GND

VIN

BATTERY

RSOURCE CIN 1µF Ceramic

COUT 1µF Ceramic

TC1017

Load

TC1017

4.1 Input Capacitor

Low input source impedance is necessary for the LDO

to operate properly. When operating from batteries, or

in applications with long lead length (> 10") between

the input s ou r ce a nd th e LD O, so me inpu t ca p ac itance

is required. A minimum of 0.1 µ F is recommended for

most applications and the capacitor should be placed

as close to the input of the LDO as is practical. Larger

input capacitors will help reduce the input impedance

and further reduce any high-frequency noise on the

input and output of the LDO.

4.2 Output Capacitor

A minimum output capacitance of 1 µF for the TC1017

is required for stability. The Equivalent Series Resis-

tance (ESR) requirements on the output capacitor are

betwee n 0 and 2 o hms. The out put ca pacitor s hould be

located as close to the LDO output as is practical.

Ceram ic materials X7R and X5R hav e low temperatur e

coefficients and are well within the acceptable ESR

range required. A typical 1 µF X5R 0805 ca pacitor has

an ES R of 5 0 mil li - o hm s. La r g er o ut p ut ca pac it o rs c an

be used w ith the TC101 7 to improv e dynam ic beha vior

and input ripple-rejection performance.

Ceramic, aluminum electrolytic or tantalum capacitor

types can be used. Since many aluminum electrolytic

capacitors freeze at approximately –30°C, ceramic or

solid tantalums are recommended for applications

operating below –25°C. When operating from sources

other than batteries, supply-noise rejection and

transient response can be improved by increasing the

value of the input and output capacitors and employing

pas siv e filtering techniq ue s.

4.3 Turn-On Response

The turn-on response is defined as two separate

response categories, wake-up time (tWK) and settling

time (tS).

The T C1017 ha s a fa st w ake-up time (10 µsec, typica l)

when released from shutdown. See Figure 4-3 for the

wake-up time designated as tWK. T he wa ke- up ti me is

defined as the time it takes for the output to rise to 2%

of the VOUT value after being released from shutdown.

The total turn-on response is defined as the settling

time (tS) (see Figure 4-3). Settling time (inclusive with

tWK) is defined as the condition when the output is

within 98% of its fully-enabled value (32 µsec, typical)

when released from shutdown. The settling time of the

output voltage is dependent on load conditions and

output capacitance on VOUT (RC response).

The table below demonstrates the typical turn-on

response timing for different input voltage power-up

frequencies: VOUT = 2.85V, VIN = 5.0V, IOUT = 60 mA

and COUT = 1 µF.

FIGURE 4-3: Wake-Up Time from Shutdown.

Frequency Typical (tWK) Typical (tS)

1000 Hz 5.3 µsec 14 µsec

500 Hz 5.9 µsec 16 µsec

100 Hz 9.8 µsec 32 µsec

50 Hz 14.5 µsec 52 µsec

10 Hz 17.2 µsec 77 µsec

VIH

tWK

VOUT

98%

VIL

SHDN

TC1017

5.0 THERMAL CONSIDERATIONS

5.1 Thermal Shutdown

Integrated thermal protection circuitry shuts the

regulator off when the die temperature exceeds

approximately 160°C. The regulator remains off until

the die temperature drops to approximately 150°C.

5.2 Power Dissipation: SC-70

The TC1017 is available in the SC-70 package. The

thermal resistance for the SC-70 package is

approximately 450°C/W when the copper area used in

the PCB layout is similar to the J EDEC J51-7 high ther-

mal conductivity standard or semi-G42-88 standard.

For applications with a larger or thicker copper area,

the thermal resistance can be lowered. See AN792, “A

Method to Determine How Much Power a SOT-23 Can

Dissipate in an Application”, DS00792, for a method to

determ ine the thermal resistance for a particular appli-

cation.

The TC1017 power dissipation capability is dependant

upon several variables: input voltage, output voltage,

load current, ambient temperature and maximum

junction temperature. The absolute maximum steady-

state junction temperature is rated at +125°C. The

power dissipation within the device is equal to:

EQUATION 5- 1:

The VIN x IGND term is typically very small when

compared to the (VIN–VOUT) x ILOAD term, simplifying

the powe r dissipation within the LDO to be:

EQUATION 5- 2:

To determine the maximum power dissipation

capability, the following equation is used:

EQUATION 5- 3:

Given the following example:

Find:

1. Internal pow e r diss ip a tio n:

2. Maximum allowable ambient temperature:

3. Maximum allowable power dissipation at

desired ambient:

In this example, the TC1017 dissipates approximately

158.5 mW and the junction temperature is raised 71°C

over the ambient. The absolute maximum power

dissip ati on is 15 5 mW when given a maxi mum amb ient

temperat ure of 55°C .

Input voltage, output voltage or load current limits can

also be deter mine d by subs titutin g know n va lues i n the

power dissipation equations.

Figure 5-1 and Figure 5-2 depict typical maximum

power dissipation versus ambient temperature, as well

as typical maximum current versus ambient tempera-

ture, with a 1V input voltage to output voltage

differential, respectively.

FIGURE 5-1: Power Dissipation vs.

Ambient Temperature (SC-70 package).

PDVIN VOUT

–()ILOAD VIN IGND

×+×=

PDVIN VOUT

–()ILOAD

×=

PDMAX TJ_MAX TA_MAX

–()

----------------------------------------------=

Where:

TJ_MAX = the maximum junction

temperature allowed

TA_MAX = the maximum ambient

temperature

RθJA = the thermal res istance from

junction to air

VIN = 3.0V to 4.1V

VOUT = 2.85V ±2.5%

ILOAD = 120 mA (outp ut current)

TA= 55°C (m ax. desired ambient)

PDMAX VIN_MAX VOUT_MIN

–()ILOAD

×=

4.1V 2.85 0.975()×–()120mA×=

158.5mW=

TA_MAX TJ_MAX P–DMAX R

×=

125

C 158.5mW 450

C/W×–()=

C= 125

C71

C–()=

PDTJ_MAX TA

–

------------------------------=

155mW=

125

C55

C–

450

C/W

-----------------------------------=

100

150

200

250

300

350

400

-40 -15 10 35 60 85 110

Ambient Tem perat ur e (°C)

Power Dissipation (mW)

TC1017

FIGURE 5-2: Maximum Current vs.

Ambient Temperature (SC-70 package).

5.3 Power Dissipation: SOT-23

The TC1017 is also availa ble in a SOT-23 package for

improv ed thermal performance. The ther mal resistance

for the SOT-23 package is approximately 255°C/W

when the copper area used in the printed circuit board

layout is similar to the JEDEC J51-7 low thermal

conductivity standard or semi-G42-88 standard. For

applications with a larger or thicker copper area, the

thermal resistance can be lowered. See AN792, “A

Method to Determine How Much Power a SOT-23 Can

Dissipate in an Application”, DS00792, for a method to

determine the thermal resistance for a particular

application.

The TC1017 power dissipation capability is dependant

upon several variables: input voltage, output voltage,

load current, ambient temperature and maximum

junction temperature. The absolute maximum steady-

state junction temperature is rated at +125°C. The

power dissipation within the device is equal to:

EQUATION 5- 4:

The VIN x IGND term is typically very small when

compared to the (VIN–VOUT) x ILOAD term, simplif yi ng the

power dissipation within the LDO to be:

EQUATION 5- 5:

To determine the maximum power dissipation

capability, the following equation is used:

EQUATION 5-6:

Given the following example:

Find:

1. Internal pow e r diss ip a tio n:

2. Maximum allowable ambient temperature:

3. Maximum allowable power dissipation at

desired ambient:

In this example, the TC1017 dissipates approximately

158.5 mW and the junction temperature is raised

40.5°C over the ambient. The absolute maximum

power dissipation is 157 mW when given a maximum

ambient temperature of +85°C.

Input voltage, output voltage or load current limits can

also be deter mine d by subs titutin g know n va lues i n the

power dissipation equations.

Figure 5-3 and Figure 5-4 depict typical maximum

power dissipation versus ambient temperature, as well

as typical maximum current versus ambient tempera-

ture with a 1V input voltage to output voltage

differential, respectively.

100

120

140

160

-40 -15 10 35 60 85 110

Ambient Temper at ur e (°C)

Max imum Current (mA)

VIN - VOUT = 1V

PDVIN VOUT

–()ILOAD VIN IGND

×+×=

PDVIN VOUT

–()ILOAD

×=

VIN = 3 .0V to 4.1V

VOUT = 2.85V ±2.5%

ILOAD = 120 mA (out put current)

TA= +85°C (max. desired ambient)

PDMAX TJ_MAX TA_MAX

–()

RθJA

----------------------------------------------

Where:

TJ_MAX = the maximum junction

temperature allowed

TA_MAX = the maxi mum ambient

temperature

RθJA = the thermal resistance from

junction to air

PDMAX VIN_MAX VOUT_MIN

–()ILOAD

×=

4.1V 2.85 0.975()×–()120mA×=

158.5mW=

TA_MAX TJ_MAX P–DMAX R

×=

125

C 158.5mW 255

C/W×–()=

84.5

C= 125

C40.5

C–()=

PDTJ_MAX TA

–

------------------------------=

157mW=

125

C85

C–

255

C/W

-----------------------------------=

TC1017

FIGURE 5-3: Power Dissipation vs.

Ambient Temperature (SOT-23 Package).

FIGURE 5-4: Maximum Current vs.

Ambient Temperature (SOT-23 Package).

5.4 Layout Considerations

The prim ary p a th for heat conduct ion ou t o f th e SC-7 0/

SOT-23 package is through the package leads. U sing

heavy wide traces at the pads of the device will facili-

tate the removal of the heat within the package, thus

lowering the thermal resistance RθJA. By l oweri ng the

therma l resi stanc e, th e maxi mum int ern al powe r dissi -

pation capability of the package is increased.

FIGURE 5-5: SC-70 Package Suggested

Layout.

100

200

300

400

500

600

700

-40 -15 10 35 60 85 110

Ambient Temp erature ( ° C)

Power Dissipation (mW)

100

120

140

160

-40 -15 10 35 60 85 110

Ambient Temperature (°C)

Maximum Cu rrent (mA)

VIN - VOUT = 1V

SHDN

OUT

GND

TC1017

6.0 PACKAGE INFORMATION

6.1 Package Marking Information

5-Pin SC-70/ SC-70R

Top Side Bottom Side

XXN YWW

XXN

Part Number TC1017 Pinout

Code TC101 7R Pinout

Code

TC1017 – 1.8VLT CE CU

TC1017 – 1.85VLT CQ DF

TC1017 – 1.9VLT CB

TC1017 – 2.5VLT CR CV

TC1017 – 2.6VLT CF CW

TC1017 – 2.7VLT CG CX

TC1017 – 2.8VLT CH CY

TC1017 – 2.85VLT CJ CZ

TC1017 – 2.9VLT CK DA

TC1017 – 3.0VLT CL DB

TC1017 – 3.2VLT CC DC

TC1017 – 3.3VLT CM DD

TC1017 – 4.0VLT CP DE

5-Pin SC-70/ SC-70R

Legend: XX...X Customer-s pecific information*

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-fr ee JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the ev ent the fu ll Mic rochip part nu mber ca nnot be m arked o n one lin e, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

TC1017

6.1 Package Marking Information (Continued)

5-Lead SOT-23

XXNN

Part Number Code

TC1017 – 1.8VCT DA

TC1017 – 1.85VCT DK

TC1017 – 2.6VCT DB

TC1017 – 2.7VCT DC

TC1017 – 2.8VCT DD

TC1017 – 2.85VCT DE

TC1017 – 2.9VCT DF

TC1017 – 3.0VCT DG

TC1017 – 3.3VCT DH

TC1017 – 4.0VCT DJ

Example:

DANN

TC1017

5-Lead Plastic Small Outline Transistor (LT) (SC-70)

0.300.15.012.006BLead Width

0.180.10.007.004

Lead Thickness

0.300.10.012.004LFoot Length

2.201.80.087.071DOverall Length

1.351.15.053.045

Molded Package Width

2.401.80.094.071EOverall Width

0.100.00.004.000

Standoff

1.000.80.039.031

Molded Package Thickness

1.100.80.043.031AOverall Height

0.65 (BSC).026 (BSC)

Pitch

Number of Pins

MAXNOMMINMAXNOMMINDimension Limits

MILLIMETERS*INCHESUnits

exceed .005" (0.127mm) per side.

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

Notes:

JEITA (EIAJ) Standard: SC-70

Drawing No. C04-061

*Controlling Parameter

Top of Molded Pkg to Lead Shoulder

Q1 .004 .016 0.10 0.40

TC1017

5-Lead Plastic Small Outline Transistor (OT) (SOT-23)

10501050

Mold Draft Angle Bottom 10501050

Mold Draft Angle Top 0.500.430.35.020.017.014BLead Width 0.200.150.09.008.006.004

Lead Thickness 10501050

Foot A ngle 0.550.450.35.022.018.014LFoot Length 3.102.952.80.122.116.110DOverall Length 1.751.631.50.069.064.059E1Molded Package Width 3.002.802.60.118.110.102EOverall Width 0.150.080.00.006.003.000A1Standoff § 1.301.100.90.051.043.035A2Mold ed Packag e Thickness 1.451.180.90.057.046.035AOverall Height 1.90.075

Outside lead pitch (basic) 0.95

.038

Pitch 55

Number of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MO-178

Drawing No. C04-091

§ Significant Characteristic

TC1017

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Sales and Support

Device: TC1017: 150 mA Tiny CMO S LDO with Shutdown

TC1017R:150 mA Tiny CMOS LDO with Shutdown

(SC-70 only)

Voltage Options:*

(Standard) 1.8V

1.85V

2.5V SC-70 only

2.6V

2.7V

2.8V

2.85V

2.9V

3.0V

3.2V SC-70 only

3.3V

4.0V

* Other voltage options available. Please contact

your local Microchip sales office for details.

Temperature

Range: V = -40°C to +125°C

Package: LT TR = 5-pin SC-70 (Tape and Reel)

CTTR = 5-pin SOT-23 (Tape and Reel)

PART NO. X.XX X

TemperatureVoltage

Options

Device Range

Examples:

a) TC1017-1.8VLTTR: 150 mA, Ti ny CMOS

LDO with Shutdown,

SC-70 package.

b) TC1017R-1.8VLTTR:150mA, Tiny CMOS

LDO with Shutdown,

SC-70R package.

c) TC10 17-2.6VCT TR :150 mA, Tiny CMOS

LDO with Shutdown,

SOT-23 package.

d) TC1017-2.7VLTTR: 150 mA, Ti ny CMOS

LDO with Shutdown,

SC-70 package.

e) TC1017-2.8VCTTR:150 mA, Tiny CMOS

LDO with Shutdown,

SOT-23 package.

f) TC1017-2.85VLT TR :150 mA , Tiny CMOS

LDO with Shutdown,

SC-70 package.

g) TC1017-2.9VCTTR:150 mA, Tiny CMOS

LDO with Shutdown,

SOT-23 package.

h) TC1017-3.0VLTTR: 150 mA, Ti ny CMOS

LDO with Shutdown,

SC-70 package.

i) TC1017-3.3VCTTR:150 mA, Tiny CMOS

LDO with Shutdown,

SOT-23 package.

j) TC1017-4.0VLTTR: 150 mA, Tiny C MOS

LDO with Shutdown,

SC-70 package.

XXXX

Package

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and

recommended workarounds. To determine if an errata sheet exists for a partic ular device, please contact one of the following:

1. Your local Microchip sales off ice

2. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Dat a Sheet (include Literature #) you are using.

Customer Notification System

TC1017

NOTES:

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIND WHETHER EXP RESS OR IMPLIED,

WRITTEN OR ORAL, STATUTORY OR OTHERWISE,

RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

its use. Use of Microchip’s products as critical components in

life support systems is not authorized except with express

written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICST ART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are

registered trademarks of Microchip Technology Incorporated

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Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,

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rfPICDEM, Select Mode, Smart Serial, SmartTel, Total

Endurance and WiperLock are trademarks of Microchip

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SQTP is a service mark of Microchip T echnology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protect ion feat ures of our

products. Attempt s to break Microchip’ s code protecti on feature may be a violation of the Digit al Millenni um Copyright Act. If su ch a c t s

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

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03/01/05