BD3539FVM-TR - ROHM Semiconductor

○Product structure：Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays

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1.0V to 5.5V, 1A 1ch

Termination Regulators for DDR-SDRAMs

BD3539FVM BD3539NUX

General Description

BD3539 is a termination regulator that complies with

JEDEC requirements for DDR1-SDRAM,

DDR2-SDRAM, and DDR3-SDRAM. This linear power

supply uses a built-in N-channel MOSFET and

high-speed OP-AMPS specially designed to provide

excellent transient response. It has a sink/source

current capability of up to 1A and has a power supply

bias requirement of 3.3 V (for DDR2 and DDR3) and 5.0

V (for DDR1, DDR2, and DDR3) for driving the

N-channel MOSFET. By employing an independent

reference voltage input (VDDQ) and a feedback pin

(VTTS), this termination regulator provides excellent

output voltage accuracy and load regulation as required

by JEDEC standards. Additionally, BD3539 has a

reference power supply output (VREF)for DDR-SDRAM

or for memory controllers. Unlike the VTT output that

goes to “Hi-Z” state, the VREF output is kept

unchanged when EN input is changed to “Low”, making

this IC suitable for DDR-SDRAM under “Self Refresh”

state.

Features

 Incorporates a Push-Pull Power Supply for

Termination (VTT)

 Incorporates a Reference Voltage Circuit (VREF)

 Incorporates an Enabler

 Incorporates an Under Voltage Lockout (UVLO)

 Incorporates a Thermal Shutdown Protector (TSD)

 Compatible with Dual Channel (DDR1, DDR2,

DDR3)

 Usable Ceramic Capacitor at Output

Applications

Power Supply for DDR 1/2/3 - SDRAM

Key Specifications

 Termination Input Voltage Range: 1.0V to 5.5V

 VCC Input Voltage Range: 2.7V to 5.5V

 VDDQ Reference Voltage Range: 1.0V to 2.75V

 Output Voltage: 1/2xVDDQ V(Typ)

 Output Current: 1.0A (Max)

 High side FET ON-Resistance: 0.35(Typ)

 Low side FET ON-Resistance: 0.35(Typ)

 Standby Current: 0.5mA (Typ)

 Operating Temperature Range: -30°C to +100°C

Packages W(Typ) x D(Typ) x H(Max)

Typical Application Circuit, Block Diagram

MSOP8

2.90mm x 4.00mm x 0.90mm

SON008X2030

2.00mm x 3.00mm x 0.60mm

VCC

VDDQ

VTT_IN

VCC

SOFT

UVLO

TSD

Reference

Block

Thermal

Protection

Enable EN

GND

VREF

VTTS

VDDQ

½ x

VTT

VTT_IN

UVLO

TSD

UVLO

TSD

UVLO

VCC

TSD

UVLO

7 56

C2 C3

Datashee

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Datasheet

BD3539FVM BD3539NUX

TSZ22111・15・001 22.Jul.2015 Rev.002

TSZ02201-0J2J0A900710-1-2

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Pin Configurations

○FVM

○NUX

Pin Descriptions

No. Pin Name Pin Function

1 GND Ground pin

2 EN Enable input pin

3 VTTS Detector pin for termination voltage

4 VREF Reference voltage output pin

5 VDDQ Reference voltage input pin

6 VCC VCC pin

7 VTT_IN Termination input pin

8 VTT Termination output pin

No. Pin Name Pin Function

1 VTT_IN Termination input pin

2 VTT Termination output pin

3 GND Ground pin

4 EN Enable input pin

5 VTTS Detector pin for termination voltage

6 VREF Reference voltage output pin

7 VDDQ Reference voltage input pin

8 VCC VCC pin

Bottom FIN Substrate (connected to GND)

Description of Blocks

1. VCC

The VCC pin is for the independent power supply input that operates the internal circuit of the IC. It is the voltage at this

pin that drives the IC’s amplifier circuits. The VCC input ranges from 2.7V to 5.5V and maximum current consumption is

4mA. A bypass capacitor of 1F or so should be connected to this pin when using the IC in an application circuit.

2. VDDQ

This is the power supply input pin for an internal voltage divider network. The voltage at VDDQ is halved by two 100k

internal voltage-divider resistors and the resulting voltage serves as reference for the VTT output. Since VREF=VTT =

1/2VDDQ, the JEDEC requirement for DDR-SDRAM can be satisfied by supplying the correct voltage to VDDQ.

Noise input should be avoided at the VDDQ pin as it is also included by the voltage-divider at the output. An RC filter

consisting of a resistor and a capacitor (220 and 2.2F, for instance,) may be used to reduce the noise input but make

sure that it will not significantly affect the voltage-divider’s output. the IC.

3. VTT_IN

VTT_IN is the power supply input pin for the VTT output. Input voltage may range from 1.0V to 5.5V, but consideration

must be given to the current limit dictated by the ON-Resistance of the IC and to the change in allowable loss due to

input/output voltage difference.

Generally, the following voltages are supplied:

・DDR3 VTT_IN = 1.5V

・DDR2 VTT_IN = 1.8V

・DDR1 VTT_IN = 2.5V

Take note that a high-impedance voltage input at VTT_IN may result in oscillation or degradation in ripple rejection, so

connecting a 10µF capacitor with minimal change in capacitance to VTT_IN terminal is recommended. However, this

impedance may depend on the characteristics of the power supply input and the impedance of the PC board wiring,

which must be carefully checked before use.

VTT_IN

GND

VTTS

VREF

VTT

VCC

VDDQ

4 5

TOP VIEW

VDDQ

VTT_IN

VTT

GND

VCC

VREF

VTTS

4 5

TOP VIEW

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Description of Blocks – continued

4. VREF

BD3539 provides a constant voltage, VREF, which is independent from the VTT output and can serve as reference input

for memory controllers and DRAMs. The voltage level of VREF is kept constant even if the EN pin is at “Low” level,

making the use of this IC compatible with the “Self Refresh” state of DRAMs.

In order to stabilize the output voltage, connecting the correct combination of capacitor and resistor to VREF is necessary.

For this purpose, a 1.0F to 2.2F ceramic capacitor, characterized by minimal variation in capacitance, is recommended.

The maximum current capability of the VREF pin is 25mA, but for an application which consumes a small amount of

VREF current (1mA or less), using a capacitance of 0.1F or less will do.

5. VTTS

VTTS is a sense pin for the load regulation of the VTT output voltage. In case the wire connecting VTT pin and the load

is too long, connecting VTTS pin to the part of the wire nearer to the load may improve load regulation.

VTTS terminal is High impedance terminal. Therefore it is easy to be affected by the noise. The stable operation of the IC

is possible by inserting RC filter (e.g.,: R=200, C=1000pF) near VTTS terminal.

6. VTT

This is the output pin for the DDR memory termination voltage and it has a sink/source current capability of ±1.0A. VTT

voltage tracks the voltage at VDDQ pin divided in half. The output is turned OFF when EN pin is “Low” or when either the

VCC UVLO or the thermal shutdown protection function is activated.

Always connect a capacitor to VTT pin for loop gain and phase compensation and for reduction in output voltage variation

in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may cause oscillation

and high ESR (Equivalent Series Resistance) may result in increased output voltage variation during a sudden change in

load. A 10µF or so ceramic capacitor is recommended, though ambient temperature and other conditions should also be

considered.

7. EN

A “High” input of 2.3V or higher to EN turns ON the VTT output. A “Low” input of 0.8V or less, on the other hand, turns

VTT to a Hi-Z state. With a “Low” EN input, however, the VREF output remains ON, provided that sufficient VCC and

VDDQ voltages have been established.

When EN terminal repeats ON/OFF, an inrush current may flow in VTT_IN terminal. Please be careful about voltage Drop

of the VTT_IN line.

Absolute Maximum Ratings

Parameter Symbol Limit Unit

BD3539FVM BD3539NUX

Input Voltage VCC 7

(Note 1) V

Enable Input Voltage VEN 7

(Note 1) V

Termination Input Voltage VTT_IN 7

(Note 1) V

VDDQ Reference Voltage VDDQ 7

(Note 1) V

Output Current ITT 1 A

Power Dissipation1 Pd1 0.38 (Note 2) 0.24 (Note 4) W

Power Dissipation2 Pd2 0.58 (Note 3) 0.51 (Note 5) W

Power Dissipation3 Pd3 - 0.87 (Note 6) W

Operating Temperature Range Topr -30 to +100 °C

Storage Temperature Range Tstg -55 to +150 °C

Maximum Junction Temperature Tjmax +150 °C

(Note 1) Should not exceed Pd. Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.

(Note 2) For Ta25°C (With no heat sink) ja=322.6°C /W

(Note 3) For Ta25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate, with no heat sink ja=212.8°C /W

(Note 4) For Ta25°C (With no heat sink) ja=516.5°C /W

(Note 5) For Ta25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate 1-layer board, ja=242.7°C /W

(Note 6) For Ta25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate 4-layer board (copper foil density: 5505mm2 (copper foil area in each

layer)), ja=142.5°C /W

Caution: Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as

short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is operated in a

special mode exceeding the absolute maximum ratings.

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Recommended Operating Ratings (Ta=25°C)

Parameter Symbol

Limit Unit

Min Max

Input Voltage VCC 2.7 5.5 V

Termination Input Voltage VTT

IN 1.0 5.5 V

VDDQ Reference Voltage VDDQ 1.0 2.75 V

Enable Input Voltage VEN -0.3 +5.5 V

Electrical Characteristics

(Unless otherwise noted, Ta=25°C, VCC=3.3V, VEN=3V, VDDQ=1.5V, VTT_IN=1.5V)

Parameter Symbol Limit Unit Conditions

Min Typ Max

Standby Current ISTBY - 0.5 1.0 mA VEN=0V

Circuit Current ICC - 2 4 mA VEN=3V

[Enable]

High Level Enable Input Voltage VENHIGH 2.3 - 5.5 V

Low Level Enable Input Voltage VENLOW -0.3 - +0.8 V

Enable Pin Input Current IEN - 7 10 µA VEN=3V

[Termination]

Termination Output Voltage

(DDR3) VTT3 1/2xVDDQ

-15m 1/2xVDDQ 1/2xVDDQ

+15m V ITT=-1.0A to +1.0A

Ta=0°C to 100°C

Termination Output Voltage

(DDR2) VTT2 1/2xVDDQ

-30m 1/2xVDDQ 1/2xVDDQ

+30m V

VCC = 3.3V, VDDQ = 1.8V

VTT_IN = 1.8V

ITT=-1.0A to +1.0A

Ta=0°C to 100°C

Termination Output Voltage

(DDR1) VTT1 1/2xVDDQ

-30m 1/2xVDDQ 1/2xVDDQ

+30m V

VCC = 5.0V, VDDQ = 2.5V

VTT_IN = 2.5V

ITT=-1.0A to +1.0A

Ta=0°C to 100°C

Source Current ITT+ 1.0 - - A

Sink Current ITT- - - -1.0 A

Load Regulation VTT - - 30 mV ITT=-1.0A to +1.0A

Upper Side ON-Resistance RON_H - 0.35 0.65 

Lower Side ON-Resistance RON_L - 0.35 0.65 

[VDDQ]

Input Impedance ZVDDQ 140 200 260 k

[VREF]

Output Voltage VREF 1/2xVDDQ

-15m 1/2xVDDQ 1/2xVDDQ

+15m V IREF=-25mA to +25mA

Ta=0°C to 100°C

[UVLO]

Threshold Voltage VUVLO 2.30 2.45 2.60 V VCC : sweep up

Hysteresis Voltage VUVLO 100 160 220 mV VCC : sweep down

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Typical Performance Curves

Figure 1. Termination Output Voltage vs Output Current

(DDR3)

Output Current : ITT [A]

Termination Output Voltage : VTT [mV]

748.5

749.0

749.5

750.0

750.5

751.0

751.5

-20 -10 0 10 20

IREF[mA]

VREF [mV]

Figure 2. Output Voltage vs IREF

(DDR3)

IREF [mA]

Output Voltage : VREF [mV]

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Typical W aveforms

10µsec/Div

VREF(50mV/div)

VTT(50mV/div)

ITT(1A/div)

sin

source

10µsec/Div

VREF(50mV/div)

VTT(50mV/div)

ITT(1A/div)

sink

source

VCC

VDDQ

VTT_IN

VTT

2sec/Div

VCC

VTT

2sec/Div

Figure 3. DDR3 (-1A to +1A) Figure 4. DDR3 (+1A to -1A)

Figure 5. Input Sequence1 Figure 6. Input Sequence 2

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Typical Waveforms – continued

200µsec/Div

VCC

VDDQ

VTT_IN

VTT

2sec/Div

Figure 7. Input Sequence 3 Figure 8. EN Soft Start

VTT

VDDQ

VREF

Figure 9. VDDQ Soft Start

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TSZ22111・15・001 22.Jul.2015 Rev.002

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Application Information

1. Evaluation Board

Part No Value Company Parts Name Part No Value Company Parts Name

U1 - ROHM BD3539FVM C4 - - -

R1 - - - C5 10µF KYOCERA CM21B106M06A

R4 220Ω ROHM MCR032200 C6 - - -

J1 0Ω - - C7 10µF KYOCERA CM21B106M06A

J2 0Ω - - C8 - - -

C1 - - - C9 2.2µF KYOCERA CM105B225K06A

C2 1µF KYOCERA CM105B105K06A C10 - - -

C3 1µF KYOCERA CM105B105K06A C11 - - -

■

BD3539FVM Evaluation Board Application Components

Silk Screen Top Layer Bottom Layer

■

BD3539FVM Evaluation Board Layout

■

BD3539FVM Evaluation Board Circuit

C5, C6

GND

VCC

VDDQ

VTT_IN

GND

VCC

SW1

C11

J2 R

4 C9

C3,C4

C7 C8 C10

VTT_IN

VCC

VTT

VREF

VDDQ

VTTS

GND

BD3539FVM

VREF

VTTS

VTT

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2. Example of Layout Pattern

The input capacitor Cin of VTT_IN should be placed as close as possible to VTT_IN pin. Similarly, the VTT output capacitor

should be placed as close as possible to the IC’s pin. As for wiring pattern, make the pin wiring and the GND pattern as

wide as possible. As for the metal trace connecting to the inner GND plane, please place many through holes.

Since VTTS pin has comparatively high impedance, floating capacitance should be as small as possible and design layout

at upper layer pattern. Please be careful in drawing.

Please make the GND pattern space wide and design the layout with the ability to increase radiation efficiency.

[Example of Board Layout Pattern] [Pin Configuration]

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3. Power Dissipation

In thermal design, consider the temperature range wherein the IC is guaranteed to operate and apply appropriate

margins. The temperature conditions that need to be considered are listed below:

(1) Ambient temperature Ta: 100°C or lower

(2) Chip junction temperature Tj: 150°C or lower

The chip junction temperature Tj can be considered as follows:

(a) Calculation based on IC surface temperature Tc, mounted on a board

j-c:MSOP-8 46.0°C/W

PCB size: 70x70x1.6mm (Board copper foil area: 70x70mm2)

(b) Calculation based on ambient temperature Ta

j-a:MSOP-8 212.8°C/W With no heat sink

322.6°C /W 1-layer board (copper foil area :70x70mm2)

j-a:VSON008X2030 516.5°C /W With no heat sink

242.7°C /W 1-layer board(copper foil area:70x70mm2)

142.5°C /W 4-layer board(copper foil area:70x70mm2)

PCB size: 70x70x1.6mm3 (with thermal via)

Since the package has the FIN at the bottom of the IC, package power is considerably affected by the area of the copper

foil where FIN is connected. In order to release heat, please make the board area large enough or add many

through-holes to the inner layer pattern.

Most heat loss in BD3539 occurs at the output N-channel FET. The lost power is determined by multiplying the voltage

between IN and OUT by the output current. Since this IC is packaged for high-power applications, its thermal derating

characteristics significantly depend on the PC board. So when designing, the size of the PC board to be used should be

carefully considered.

Power consumption (W) = Input voltage (VTT_IN) - Output voltage (VTT  V

DDQ) x IOUT(Ave)

Example) Where VTT_IN =1.5V, VDDQ=1.5V, IOUT (Ave)= 0.5A

 











AVVWnconsumptioPower

375.0

5.075.05.1





WcjTcTj 



WajTaTj 



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Heat Dissipation Characteristics [Tc]

◎MSOP8

Heat Dissipation Characteristics [Ta]

◎MSOP8 ◎VSON008X2030

2.72W

[W]

0 25 75 100 125 50

1.0

0.5

3.0

2.5

150

[°C]

1-layer board

ja=46.0°C/W

2.0

1.5

Ambient Temperature [Ta]

Power Dissipation [Pd]

[W]

0 25 75 100 125 150 50

[°C]

0.5

0.25

1.0

0.75

(1) 877.2mW

(2) 515.0mW

(3) 242.0mW

(1) 4-layer board (copper foil area : 5505mm

)

Every layer has copper foil area,ja=142.5°C /W

(2) 1-layer board

ja=242.7°C /W

(3) With no heat sink

ja=516.5°C /W

150

[°C]

Power Dissipation [Pd]

Ambient Temperature [Ta]

(1) 587.4mW

[mW]

0 25 75 100 125 50

200

100

600

500

400

300

(2) 387.4mW

(1) 1-layer board

ja=212.8°C /W

(2) with no heat sink

ja=322.6°C /W

Power Dissipation [Pd]

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Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

terminals.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital

and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block.

Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the

capacitance value when using electrolytic capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on

the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Thermal Consideration

Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in

deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the

IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,

increase the board size and copper area to prevent exceeding the Pd rating.

6. Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.

The electrical characteristics are guaranteed under the conditions of each parameter.

7. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of

connections.

8. Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

9. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned OFF completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

11. Unused Input Terminals

Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance

and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to the power

supply or ground line.

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Operational Notes – continued

12. Regarding Input Pins of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Figure 10. Example of Monolithic IC Structure

13. Thermal Shutdown Circuit (TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be

within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction

temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the

TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

The present IC incorporates a thermal shutdown protection circuit (TSD circuit). The working temperature is 175°C

(standard value) and has a -15°C (standard value) hysteresis width.

14. Capacitor Across Output and GND

If a large capacitor is connected between the output pin and ground pin, current from the charged capacitor can flow into

the output pin and may destroy the IC when the VCC or VTT_IN pin is shorted to ground or pulled down to 0V. Use a

capacitor smaller than 1000µF between output and ground.

15. Output Capacitor, Resistor (C1/Block Diagram)

Do not fail to connect a output capacitor to VREF output terminal for stabilization of output voltage. The capacitor

connected to VREF output terminal works as a loop gain phase compensator. Insufficient capacitance may cause

oscillation. It is recommended to use a low temperature coefficient 1-10F ceramic capacitor, though it depends on

ambient temperature and load conditions. It is therefore requested to carefully check under the actual temperature and

load conditions to be applied.

16. Output Capacitor (C4)

Do not fail to connect a capacitor to VTT output pin for stabilization of output voltage. This output capacitor works as a

loop gain phase compensator and an output voltage variation reducer in the event of sudden change in load.

Insufficient capacitance may cause an oscillation. And if the equivalent series resistance (ESR) of this capacitor is high,

the variation in output voltage increases in the event of sudden change in load. It is recommended to use a 10F or so

ceramic capacitor, though it depends on ambient temperature and load conditions. It is therefore requested to carefully

check under the actual temperature and load conditions to be applied.

14/18

Datasheet

BD3539FVM BD3539NUX

www.rohm.com

TSZ22111・15・001 22.Jul.2015 Rev.002

TSZ02201-0J2J0A900710-1-2

Operational Notes – continued

17. Input capacitors setting (C2 and C3)

These input capacitors are used to reduce the output impedance of power supply to be connected to the input terminals

(VCC and VTT_IN). Increase in the power supply output impedance may result in oscillation or degradation in ripple

rejecting characteristics. It is recommended to use a low temperature coefficient 1F (for VCC) and 10F (for VTT_IN)

capacitor, but it depends on the characteristics of the power supply input, and the capacitance and impedance of the pc

board wiring pattern. It is therefore requested to carefully check under the actual temperature and load conditions to be

applied.

18. Input Terminals (VCC, VDDQ, VTT_IN and EN)

VCC, VDDQ, VTT_IN and EN terminals of this IC are made up independent one another. To VCC terminal, the UVLO

function is provided for malfunction protection. Irrespective of the input order of the inputs terminals, VTT output is

activated to provide the output voltage when UVLO and EN voltages reach the threshold voltage while VREF output is

activated when UVLO voltage reaches the threshold. If VDDQ and VTT_IN terminals have equal potential and common

impedance, any change in current at VTT_IN terminal may result in variation of VTT_IN voltage, which affects VDDQ

terminal and may cause variation in the output voltage. It is therefore required to perform wiring in such manner that

VDDQ and VTT_IN terminals may not have common impedance. If impossible, take appropriate corrective measures

including suitable CR filter to be inserted between VDDQ and VTT_IN terminals.

19. VTTS terminal

This terminal is used to improve load regulation of VTT output. The connection with VTT terminal must be done so that it

would not have a common impedance with high current line for better load regulation of VTT output.

20. Operating Range

Within the operating range, the operation and function of the circuits are generally guaranteed at an ambient

temperature within the range specified. The values specified for electrical characteristics may not be guaranteed, but

drastic change may not occur to such characteristics within the operating range.

21. Allowable Loss Pd

For the allowable loss, the thermal derating characteristics are shown on page 12, which should be used as a guide.

Any use that exceeds the allowable loss may result in degradation in the functions inherent to IC including a decrease in

current capability due to chip temperature increase. Use within the allowable loss.

22. The use of the IC in the strong electromagnetic field may sometimes cause malfunction, to which care must be taken. In

the event that a load containing a large inductance component is connected to the output terminal, and generation of

back-EMF at the start-up and when output is turned OFF is assumed, it is recommended to insert a protection diode.

23. In the event that a load containing a large inductance component is

connected to the output terminal, and generation of back-EMF at the

start-up and when output is turned OFF is assumed, it is recommended

to insert a protection diode.

24. Application Circuit

Although we can recommend the application circuits contained herein with a relatively high degree of

confidence, we ask that you verify all characteristics and specifications of the circuit as well as its

performance under actual conditions. Please note that we cannot be held responsible for problems that may arise

due to patent infringements or noncompliance with any and all applicable laws and regulations.

OUTPUT PIN

(Example)

15/18

Datasheet

BD3539FVM BD3539NUX

www.rohm.com

TSZ22111・15・001 22.Jul.2015 Rev.002

TSZ02201-0J2J0A900710-1-2

Ordering Information

B D 3 5 3 9 x x x T R

Part Number

Package

FVM: MSOP8

NUX: VSON008X2030

Packaging and forming specification

TR: Embossed tape and reel

Marking Diagrams

Part Number Marking Package Orderable Part Number

3539 MSOP8 BD3539FVM-TR

3539 VSON008X2030 BD3539NUX-TR

MSOP8 (TOP VIEW)

353 Part Number Marking

LOT Number

1PIN MARK

VSON008X2030 (TOP VIEW)

Part Number Marking

LOT Numbe

1PIN MARK

353

16/18

Datasheet

BD3539FVM BD3539NUX

www.rohm.com

TSZ22111・15・001 22.Jul.2015 Rev.002

TSZ02201-0J2J0A900710-1-2

Physical Dimension, Tape and Reel Information

Package Name MSOP8

Direction of feed

Reel

∗

Order quantity needs to be multiple of the minimum quantity.

Embossed carrier tapeTape

Quantity

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

3000pcs

()

1pin

17/18

Datasheet

BD3539FVM BD3539NUX

www.rohm.com

TSZ22111・15・001 22.Jul.2015 Rev.002

TSZ02201-0J2J0A900710-1-2

Physical Dimension, Tape and Reel Information – continued

Package Name VSON008X2030

∗

Order quantity needs to be multiple of the minimum quantity.

Embossed carrier tapeTape

Quantity

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

4000pcs

()

Direction of feed

Reel 1pin

18/18

Datasheet

BD3539FVM BD3539NUX

www.rohm.com

TSZ22111・15・001 22.Jul.2015 Rev.002

TSZ02201-0J2J0A900710-1-2

Revision History

Date Revision Changes

07.Mar.2014 001 New Release

22.Jul.2015 002 Revised Applications

Datasheet

Notice-PGA-E Rev.001

Notice

Precaution on using ROHM Products

1. Our Products are designed and manufacture d for application in ordinar y el ec tronic eq uipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred b y you or third parties arisin g from the use of an y ROHM’s Prod ucts for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applic ations

JAPAN USA EU CHINA

CLASSⅢ CLASSⅢ CLASSⅡb CLASSⅢ

CLASSⅣ CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe d esign against the physical injur y, damage to any property, which

a failure or malfunction of our Products may cause. T he following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliabili ty, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlig ht or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing comp onents, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flu x (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subj ec t to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation (P d) depe nding on Ambient temperature (T a). When us ed in sealed area, confirm the actual

ambient temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for fail ure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halog enous (chlor ine, bromine, etc.) flux is used, the residue of flux ma y negatively affect prod uct

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM represe ntative in advance.

For details, please refer to ROHM Mounting specification

Datasheet

Notice-PGA-E Rev.001

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise you r own indepen dent verificatio n and judgmen t in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please t ake special care under dry condit ion (e.g. Grounding of human body / equipment / sol der iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportati on

1. Product performance a nd soldered connections may deteri orate if the Products are store d in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds thos e recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderabil ity of products out of recommended storage time perio d

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommen de d storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive s t ress applied when dropping o f a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Bakin g is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products pl ease dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoi ng information or data will not infringe any int ellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained i n this document. Provide d, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including b ut not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated compani es or third parties.

DatasheetDatasheet

Notice – WE Rev.001

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or

concerning such information.

Mouser Electronics

Authorized Distributor

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