1
FEATURES
DESCRIPTION
V OutputVoltage V
DO - -
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
ULTRALOW QUIESCENT CURRENT 250-mALOW DROPOUT VOLTAGE REGULATORS
Because the PMOS device behaves as a low-valueresistor, the dropout voltage is very low (typically 2302
250-mA Low Dropout Voltage Regulator
mV at an output current of 250 mA for the TPS76650)Available in 1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V,
and is directly proportional to the output current.3.0 V, 3.3 V, 5.0 V Fixed Output and Adjustable
Additionally, since the PMOS pass element is aVersions
voltage-driven device, the quiescent current is verylow and independent of output loading (typically 35Dropout Voltage to 140 mV (Typ) at 250 mA
µA over the full range of output current, 0 mA to 250(TPS76650)
mA). These two key specifications yield a significantUltralow 35- µA Typical Quiescent Current
improvement in operating life for battery-powered3% Tolerance Over Specified Conditions for
systems. This LDO family also features a sleepFixed Output Versions mode; applying a TTL high signal to EN (enable)shuts down the regulator, reducing the quiescentOpen-Drain Power Good
current to less than 1 µA (typ).8-Pin SOIC Package
Power good (PG) is an active high output that can beThermal Shutdown Protection
used to implement a power-on reset or a low-batteryindicator.
The TPS766xx is offered in 1.5 V, 1.8 V, 2.5 V, 2.7 V,This device is designed to have an ultralow quiescent
2.8 V, 3.0 V, 3.3 V and 5.0 V fixed voltage versionscurrent and be stable with a 4.7- µF capacitor. This
and in an adjustable version (programmable over thecombination provides high performance at a
range of 1.25 V to 5.5 V). Output voltage tolerance isreasonable cost.
specified as a maximum of 3% over line, load, andtemperature ranges. The TPS766xx family isavailable in an 8-pin SOIC package.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999 2009, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
(1) To calculate the minimum input voltage for your maximum output current, use the following equation:
V =V +V
I(min) O(max) DO(max load)
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
SLVS237C AUGUST 1999 REVISED JANUARY 2009 .................................................................................................................................................
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
(2)
XX is nominal output voltage (for example, 28 = 2.8V, 01 = Adjustable).
(3)
TPS766 xxyz Yis package designator.Zis package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .(2) Output voltages from 1.5 V to 5.0 V in 50-mV increments are available through the use of innovative factory EEPROM programming;minimum order quantities may apply. Contact factory for details and availability.(3) The TPS76601 is programmable using an external resistor divider (see Application Information ).
Over operating free-air temperature range (unless otherwise noted).
(1)
PARAMETER TPS766xx UNIT
V
I
Input voltage range
(2)
0.3 to 13.5 VVoltage range at EN 0.3 to 16.5 VMaximum PG voltage 16.5 VPeak output current Internally limitedContinuous total power dissipation See Dissipation Ratings TableV
O
Output voltage (OUT, FB) 7 VT
J
Operating virtual junction temperature range 40 to +125 ° CT
stg
Storage temperature range 65 to +150 ° CESD rating, HBM 2 kV
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods maydegrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyondthose specified is not implied.(2) All voltage values are with respect to network terminal ground.
AIR FLOW T
A
< +25 ° C DERATING FACTOR T
A
= +70 ° C T
A
= +85 ° CPACKAGE (CFM) POWER RATING ABOVE T
A
= +25 ° C POWER RATING POWER RATING
0 568 mW 5.68 mW/ ° C 312 mW 227 mWD
250 904 mW 9.04 mW/ ° C 497 mW 361 mW
MIN MAX UNIT
V
I
Input voltage
(1)
2.7 10 VV
O
Output voltage range 1.2 5.5 VI
O
Output current
(2)
0 250 mAT
J
Operating virtual junction temperature
(2)
40 125 ° C
(2) Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that thedevice operate under conditions beyond those specified in this table for extended periods of time.
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ELECTRICAL CHARACTERISTICS
LineReg.(mV)=(%/V) ´´1000
V (V 2.7V)
O imax -
100
LineReg.(mV)=(%/V) ´´1000
V (V (V +1V))
O imax -O
100
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
Over recommended operating free-air temperature range, V
i
= V
O(typ)
+ 1 V, I
O
= 10 µA, EN = 0 V, C
O
= 4.7 µF (unlessotherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
5.5 V V
O
1.25 V, T
J
= +25 ° C V
OTPS76601
5.5 V V
O
1.25 V, T
J
= 40 ° C to +125 ° C 0.97 V
O
1.03 V
O
T
J
= +25 ° C, 2.7 V < V
IN
< 10 V 1.5TPS76615
T
J
= 40 ° C to +125 ° C, 2.7 V < V
IN
< 10 V 1.455 1.545T
J
= +25 ° C, 2.8 V < V
IN
< 10 V 1.8TPS76618
T
J
= 40 ° C to +125 ° C, 2.8 V < V
IN
< 10 V 1.746 1.854T
J
= +25 ° C, 3.5 V < V
IN
< 10 V 2.5TPS76625
T
J
= 40 ° C to +125 ° C, 3.5 V < V
IN
< 10 V 2.425 2.575T
J
= +25 ° C, 3.7 V < V
IN
< 10 V 2.7Output voltage
TPS76627 V(10 µA to 250 mA load)
(1)
T
J
= 40 ° C to +125 ° C, 3.7 V < V
IN
< 10 V 2.619 2.781T
J
= +25 ° C, 3.8 V < V
IN
< 10 V 2.8TPS76628
T
J
= 40 ° C to +125 ° C, 3.8 V < V
IN
< 10 V 2.716 2.884T
J
= +25 ° C, 4.0 V < V
IN
< 10 V 3.0TPS76630
T
J
= 40 ° C to +125 ° C, 4.0 V < V
IN
< 10 V 2.910 3.090T
J
= +25 ° C, 4.3 V < V
IN
< 10 V 3.3TPS76633
T
J
= 40 ° C to +125 ° C, 4.3 V < V
IN
< 10 V 3.201 3.399T
J
= +25 ° C, 6.0 V < V
IN
< 10 V 5.0TPS76650
T
J
= 40 ° C to +125 ° C, 6.0 V < V
IN
< 10 V 4.850 5.15010 µA < I
O
< 250 mA, T
J
= +25 ° C 35Quiescent current (GND current) EN = 0 V
(1)
µAI
O
= 250 mA, T
J
= 40 ° C to +125 ° C 50Output voltage line regulation ( ΔV
O
/V
O
)
(1), (2)
V
O
+ 1 V < V
I
10 V, T
J
= +25 ° C 0.01 %/VLoad regulation I
O
= 10 µA to 250 mA 0.5%BW = 300 Hz to 50 kHz,Output noise voltage 200 µVrmsC
O
= 4.7 µF, T
J
= +25 ° COutput current limit V
O
= 0 V 0.8 1.2 AThermal shutdown junction temperature 150 ° CT
J
= +25 ° CEN = V
I
, 1 µA2.7 V < V
I
< 10 VStandby current
T
J
= 40 ° C to +125 ° CEN = V
I
, 10 µA2.7 V < V
I
< 10 VFB input current TPS76601 FB = 1.5 V 2 nAHigh level enable input voltage 2.0 VLow level enable input voltage 0.8 Vf = 1 kHz, C
O
= 4.7 µF,Power-supply ripple rejection
(1)
63 dBI
O
= 10 µA, T
J
= +25 ° C
(1) Minimum IN operating voltage is 2.7 V or V
O(typ)
+ 1 V, whichever is greater. Maximum IN voltage 10 V.(2) If V
O
1.8 V then V
imin
= 2.7 V, V
imax
= 10 V:
If V
O
2.5 V then V
imin
= V
O
+ 1 V, V
imax
= 10 V:
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CO
(1)
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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ELECTRICAL CHARACTERISTICS (continued)Over recommended operating free-air temperature range, V
i
= V
O(typ)
+ 1 V, I
O
= 10 µA, EN = 0 V, C
O
= 4.7 µF (unlessotherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Minimum input voltage for valid PG I
O(PG)
= 300 µA 1.1Trip threshold voltage V
O
decreasing 92 98 %V
O
PG Hysteresis voltage Measured at V
O
0.5 %V
O
Output low voltage V
I
= 2.7 V, I
O(PG)
= 1 mA 0.15 0.4 VLeakage current V
(PG)
= 5 V 1 µAEN = 0 V 1 0 1Input current ( EN) µAEN = V
I
1 1I
O
= 250 mA, T
J
= +25 ° C 310TPS76628
I
O
= 250 mA, T
J
= 40 ° C to +125 ° C 540I
O
= 250 mA, T
J
= +25 ° C 270TPS76630
I
O
= 250 mA, T
J
= 40 ° C to +125 ° C 470Dropout voltage
(3)
mVI
O
= 250 mA, T
J
= +25 ° C 230TPS76633
I
O
= 250 mA, T
J
= 40 ° C to +125 ° C 400I
O
= 250 mA, T
J
= +25 ° C 140TPS76650
I
O
= 250 mA, T
J
= 40 ° C to +125 ° C 250
(3) IN voltage equals V
O(Typ)
100 mV; TPS76601 output voltage set to 3.3 V nominal with external resistor divider. TPS76615, TPS76618,TPS76625, and TPS76627 dropout voltage limited by input voltage range limitations (that is, TPS76630 input voltage must drop to 2.9 Vfor purpose of this test).
(1) See Applications Information section for capacitor selection details.
Figure 1. Typical Application Configuration for Fixed Output Options
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FUNCTIONAL BLOCK DIAGRAM ADJUSTABLE VERSION
FUNCTIONAL BLOCK DIAGRAM FIXED-VOLTAGE VERSION
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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NC/FB
PG
GND
EN
1
2
3
4
8
7
6
5
OUT
OUT
IN
IN
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
SLVS237C AUGUST 1999 REVISED JANUARY 2009 .................................................................................................................................................
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D PACKAGE
SOIC-8
(TOP VIEW)
PIN DESCRIPTIONS
TPS766xx
NAME NO. I/O DESCRIPTION
EN 4 I Enable input.FB/NC 1 I Feedback input voltage for adjustable device (not connected for fixed options).GND 3 Regulator ground.IN 5, 6 I Input voltage.OUT 7, 8 O Regulated output voltage.PG 2 O Power good output.
Table 1. Table of Graphs
FIGURE
vs Load current Figure 2 ,Figure 3Output voltage
vs Free-air temperature Figure 4 ,Figure 5vs Load current Figure 6 ,Figure 7Ground current
vs Free-air temperature Figure 8 ,Figure 9Power-supply ripple rejection vs Frequency Figure 10Output spectral noise density vs Frequency Figure 11Output impedance vs Frequency Figure 12Dropout voltage vs Free-air temperature Figure 13 ,Figure 14Line transient response Figure 15 ,Figure 17Load transient response Figure 16 ,Figure 18Output voltage vs Time Figure 19Dropout voltage vs Input voltage Figure 20Equivalent series resistance (ESR) vs Output current Figure 21 to Figure 24Equivalent series resistance (ESR) vs Added ceramic capacitance Figure 25 ,Figure 26
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TYPICAL CHARACTERISTICS
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
TPS76633 TPS76615OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsLOAD CURRENT LOAD CURRENT
Figure 2. Figure 3.
TPS76633 TPS76615OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 4. Figure 5.
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TYPICAL CHARACTERISTICS (continued)
TPS76633 TPS76615GROUND CURRENT GROUND CURRENTvs vsLOAD CURRENT LOAD CURRENT
Figure 6. Figure 7.
TPS76633 TPS76615GROUND CURRENT GROUND CURRENTvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 8. Figure 9.
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
TYPICAL CHARACTERISTICS (continued)
TPS76633 TPS76633POWER-SUPPLY RIPPLE REJECTION OUTPUT SPECTRAL NOISE DENSITYvs vsFREQUENCY FREQUENCY
Figure 10. Figure 11.
TPS76633 TPS76650OUTPUT IMPEDANCE DROPOUT VOLTAGEvs vsFREQUENCY FREE-AIR TEMPEATURE
Figure 12. Figure 13.
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TYPICAL CHARACTERISTICS (continued)
TPS76633
DROPOUT VOLTAGE
vs TPS76615FREE-AIR TEMPEATURE LINE TRANSIENT RESPONSE
Figure 14. Figure 15.
TPS76633 TPS76633LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 16. Figure 17.
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
TYPICAL CHARACTERISTICS (continued)
TPS76633
OUTPUT VOLTAGETPS76633 vsLOAD TRANSIENT RESPONSE TIME (AT STARTUP)
Figure 18. Figure 19.
TPS76601
DROPOUT VOLTAGE
vsINPUT VOLTAGE
Figure 20.
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TYPICAL CHARACTERISTICS (continued)
TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITYEQUIVALENT SERIES RESISTANCE
(1)
EQUIVALENT SERIES RESISTANCE
(1)
vs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 21. Figure 22.
TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITYEQUIVALENT SERIES RESISTANCE
(1)
EQUIVALENT SERIES RESISTANCE
(1)
vs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 23. Figure 24.
(1)
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, anyseries resistance added externally, and PWB trace resistance to C
O
.
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
TYPICAL CHARACTERISTICS (continued)
TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITYEQUIVALENT SERIES RESISTANCE
(1)
EQUIVALENT SERIES RESISTANCE
(1)
vs vsADDED CERAMIC CAPACITANCE ADDED CERAMIC CAPACITANCE
Figure 25. Figure 26.
(1)
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, anyseries resistance added externally, and PWB trace resistance to C
O
.
Figure 27. Test Circuit for Typical Regions of Stability (Figure 21 through Figure 24 ) (Fixed OutputOptions)
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APPLICATION INFORMATION
DEVICE OPERATION
MINIMUM LOAD REQUIREMENTS
FB PIN CONNECTION (ADJUSTABLE VERSION ONLY)
EXTERNAL CAPACITOR REQUIREMENTS
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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The TPS766xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,3.3 V, and 5.0 V), and an adjustable regulator, the TPS76601 (adjustable from 1.25 V to 5.5 V).
The TPS766xx features very low quiescent current that remains virtually constant even with varying loads.Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to theload current through the regulator (I
B
= I
C
/β). The TPS766xx uses a PMOS transistor to pass current; becausethe gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp pass element is its tendency to saturate when the device goes intodropout. The resulting drop in βforces an increase in I
B
to maintain the load. During power up, this increase in I
Btranslates to large start-up currents. Systems with limited supply current may fail to start up. In battery-poweredsystems, it means rapid battery discharge when the voltage decays below the minimum required for regulation.The TPS766xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS766xx family also features a shutdown mode that places the output in the high-impedance state(essentially equal to the feedback-divider resistance) and reduces quiescent current to 1 µA (typ). If theshutdown feature is not used, EN should be tied to ground. Response to an enable transition is quick; regulatedoutput voltage is reestablished in typically 160 µs.
The TPS766xx family is stable even at zero load; no minimum load is required for operation.
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The outputvoltage is sensed through a resistor divider network to close the loop as shown in Figure 29 . Normally, thisconnection should be as short as possible; however, the connection can be made near a critical circuit toimprove performance at that point. Internally, FB connects to a high-impedance, wide-bandwidth amplifier andnoise pickup feeds through to the regulator output. Routing the FB connection to minimize or avoid noise pickupis essential.
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improvesload transient response and noise rejection if the TPS766xx is located more than a few inches from the powersupply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) loadtransients with fast rise times are anticipated.
Like most low dropout regulators, the TPS766xx requires an output capacitor connected between OUT and GNDto stabilize the internal control loop. The minimum recommended capacitance value is 4.7 µF and the ESR(equivalent series resistance) must be between 300 mW and 20 . Capacitor values 4.7 µF or larger areacceptable, provided the ESR is less than 20 . Solid tantalum electrolytic and aluminum electrolytic capacitorsare all suitable, provided they meet the requirements described previously. Ceramic capacitors, with seriesresistors that are sized to meet the previously described requirements, may also be used.
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PROGRAMMING THE TPS76601 ADJUSTABLE LDO REGULATOR
(1)
(2)
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
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................................................................................................................................................. SLVS237C AUGUST 1999 REVISED JANUARY 2009
Figure 28. Typical Application Circuit (Fixed Versions)
The output voltage of the TPS76601 adjustable regulator is programmed using an external resistor divider asshown in Figure 29 . The output voltage is calculated using:
Where:
V
ref
= 1.224 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 7- µA divider current. Lower value resistors can beused but offer no inherent advantage and waste more power. Higher values should be avoided because leakagecurrents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 169 k to set the divider current at 7 µA, and then calculate R1 using:
Figure 29. TPS76601 Adjustable LDO Regulator Programming
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POWER-GOOD INDICATOR
REGULATOR PROTECTION
POWER DISSIPATION AND JUNCTION TEMPERATURE
(3)
(4)
TPS76615 , , TPS76618 , , TPS76625TPS76627 , TPS76628 , TPS76630TPS76633 , TPS76650 , TPS76601
SLVS237C AUGUST 1999 REVISED JANUARY 2009 .................................................................................................................................................
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The TPS766xx features a power-good (PG) output that can be used to monitor the status of the regulator. Theinternal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominalregulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullupresistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as alow-battery indicator.
The TPS766xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the inputvoltage drops below the output voltage (for example, during power down). Current is conducted from the outputto the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may beappropriate.
The TPS766xx also features internal current limiting and thermal protection. During normal operation, theTPS766xx limits output current to approximately 0.8 A (typ). When current limiting engages, the output voltagescales back linearly until the overcurrent condition ends. While current limiting is designed to prevent grossdevice failure, care should be taken not to exceed the power dissipation ratings of the package. If thetemperature of the device exceeds +150 ° C (typ), thermal-protection circuitry shuts it down. Once the device hascooled below +130 ° C (typ), regulator operation resumes.
Specified regulator operation is assured to a junction temperature of +125 ° C; the maximum junction temperatureshould be restricted to +125 ° C under normal operating conditions. This restriction limits the power dissipation theregulator can handle in any given application. To ensure the junction temperature is within acceptable limits,calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than orequal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
Where:
T
J
max is the maximum allowable junction temperature;R
θJA
is the thermal resistance junction-to-ambient for the package (that is, 176 ° C/W for the 8-terminal SOIC);andT
A
is the ambient temperature.
The regulator dissipation is calculated using:
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermalprotection circuit.
16 Submit Documentation Feedback Copyright © 1999 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS76615 TPS76618 TPS76625 TPS76627 TPS76628 TPS76630 TPS76633 TPS76650TPS76601
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS76601D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76601DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76601DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76601DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76615D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76615DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76615DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76615DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76618D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76618DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76618DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76618DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76625D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76625DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76625DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76625DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76628D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS76628DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76628DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76628DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76630D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76630DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76633D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76633DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76633DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76633DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76650D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76650DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76650DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS76650DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2011
Addendum-Page 3
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS76601DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76615DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76618DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76625DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76628DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76633DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76633DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS76650DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS76601DR SOIC D 8 2500 367.0 367.0 35.0
TPS76615DR SOIC D 8 2500 367.0 367.0 35.0
TPS76618DR SOIC D 8 2500 367.0 367.0 35.0
TPS76625DR SOIC D 8 2500 367.0 367.0 35.0
TPS76628DR SOIC D 8 2500 367.0 367.0 35.0
TPS76633DR SOIC D 8 2500 367.0 367.0 35.0
TPS76633DR SOIC D 8 2500 367.0 367.0 35.0
TPS76650DR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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