74F545PCX - Fairchild Semiconductor

April 1988

Revised August 1999

74F545 Octal Bidirectional Transceiver with 3-STATE Outputs

74F545

Octal Bidirectional Transceiver with 3-STATE Outputs

General Descript ion

The 74F545 is an 8-bit, 3-ST ATE, high-speed transceiver . It

provides bidirectional drive for bus-oriented microproces-

sor and digital communications systems. Straight through

bidirectional transceivers are featured, with 24 mA bus

drive capability on the A Ports and 64 mA bus d rive capa-

bility on the B Ports.

One input, Tr ansmit/Receive (T/R) determines the direction

of logic signals thr ough the bidirectional transceiver. Trans-

mit enab les data from A-t o-B Ports; Receiv e enables da ta

from B-to-A Ports. The Output Enable input disables both A

and B Ports by placing them in a 3-STATE condition.

Features

■Higher drive than 8304

■8-bit bidirectional data flow reduces system package

count

■3-STATE inputs/output s for interfacing w ith bus-orien ted

systems

■24 mA and 64 mA bus drive capability on A and B Ports,

respectively

■Transmit/Receive and Output Enable simplify control

logic

■Guaranteed 40 00V minimum ESD pr otection

Ordering Code:

Devices also available in Tape and Reel. S pecify by append ing the suffix let t er “X” to the orderin g c ode.

Logic Symbols

IEEE/IEC

Connection Diagram

Order Number Package Number Package Description

74F545SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

74F545PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

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74F545

Unit Loading/Fan Out

Truth Table

H = HIGH Voltage Le ve l

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

Logic Diagram

Pleas e note that this diagram is provided only for t he underst anding o f lo gic operat ions and sh ould not be us ed to estim ate propa gation delays.

Pin Names Descrip tio n U.L. Input IIH/IIL

HIGH/LOW Outpu t I OH/IOL

OE Output Enable Input (Active LOW) 1.0/2.0 20 µA/−1.2 mA

T/R Tr ansmit/Receive Input 1.0/2.0 20 µA/−1.2 mA

A0–A7Side A 3-ST ATE Inputs or 3.5/1.083 70 µA/−650 µA

3-STATE Outputs 150/40 (33.3) −3 mA/24 mA (20 mA)

B0–B7Side B 3-ST ATE Inputs or 3.5/1.083 70 µA/−650 µA

3-STATE Outputs 600/106.6 (80) −12 mA/64 mA (48 mA)

Inputs Outputs

OE T/R

L L Bus B Data to Bus A

L H Bus A Data to Bus B

HXHigh Z

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74F545

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absolute maximum ratings are values beyond which the device

may be damaged or have its useful life impaired. Functional operation

under t hes e cond it ions is not im plied.

Note 2: Eith er v oltage lim it or c urrent limit is sufficie nt to protect in puts.

DC Electrical Characteristics

Storage Temperature −65°C to +150°C

Ambient Temperature under Bias −55°C to +125°C

Junction Temperature under Bias −55°C to +150C

VCC Pin Potential to Ground Pin −0.5V to +7.0V

Input Voltage (Note 2) −0.5V to +7.0V

Input Current (Note 2) −30 mA to +5.0 mA

Voltage Applied to Output

in HIGH State (with VCC = 0V)

Standa rd Outp ut −0.5V to VCC

3-STATE Output −0.5V to +5.5V

Current Applied to Output

in LOW State (Ma x) twi ce the rat ed IOL (mA)

ESD Last Passing Voltage (Min) 4000V

Free Air Ambient Temperature 0°C to +70°C

Supply Voltage +4.5V to +5.5V

Symbol Parameter Min Typ Max Units VCC Conditions

VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal

VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA (OE, T/R)

VOH Output HIGH 10% VCC 2.5

VMin

IOH = −1 mA (An)

Voltage 10% VCC 2.4 IOH = −3 mA (An)

10% VCC 2.0 IOH = −15 mA (Bn)

5% VCC 2.7 IOH = −1 mA (An)

5% VCC 2.7 IOH = −3 mA (An)

VOL Output LOW 10% VCC 0.5 VMin

IOL = 24 mA (An)

Voltage 10% VCC 0.55 IOL = 64 mA (Bn)

IIH Input HIGH 5.0 µAMaxV

IN = 2.7 V (OE, T/R)

Current

IBVI Input HIGH Current 7.0 µAMaxV

IN = 7.0 V (OE, T/R)

Breakdown Test

IBVIT Input HIGH Current 0.5 mA Max VIN = 5.5V (An, Bn)

Breakdown (I/O)

ICEX Output HIGH 50 µAMaxV

OUT = VCC

Leakage Current

VID Input Leakage 4.75 V 0.0 IID = 1.9 µA

Test All Other Pins Grounded

IOD Output Leakage 3.75 µA0.0

VIOD = 150 mV

Circuit Current All Other Pins Grounded

IIL Input LOW Current −1.2 mA Max VIN = 0.5V (OE, T/R)

IIH + IOZH Output Leakage Current 70 µAMaxV

OUT = 2.7V (An, Bn)

IIL + IOZL Output Leakage Current −650 µAMaxV

OUT = 0.5V (An, Bn)

IOS Output Short-Circuit Current −60 −150 mA Max VOUT = 0V (An)

−100 −225 VOUT = 0V (Bn)

IZZ Bus Drainage Test 500 µA0.0VV

OUT = 5.25V

ICCH Power Supp ly Curre nt 70 90 mA Max VO = HIGH

ICCL Power Supp ly Curre nt 95 120 mA Max VO = LOW

ICCZ Power Supp ly Curre nt 85 11 0 mA Max VO = HIGH Z

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74F545

AC Electrical Characteristics

Symbol Parameter

TA = +25°CT

A = −55°C to +125°CT

A = 0°C to +70°C

Units

VCC = +5.0V VCC = +5.0V VCC = +5.0V

CL = 50 pF CL = 50 pF CL = 50 pF

Min Typ Max Min Max Min Max

tPLH Propagation Delay 2.5 4.2 6.0 2.0 7.5 2.5 7.0 ns

tPHL An to Bn or Bn to An2.54.66.02.07.52.57.0

tPZH Output Enable Time 3.0 5.3 7.0 2.5 9.0 3.0 8.0

tPZL 3.5 6.0 8.0 3.0 10.0 3.5 9.0

tPHZ Output Disable Time 3.0 5.0 6.5 2.5 9.0 3.0 7.5

tPLZ 2.0 5.0 6.5 2.0 10.0 2.0 7.5

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74F545

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

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74F545 Octal Bidirectional Transceiver with 3-STATE Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N20A

Fairchild does no t assume any responsibility for use of any circuitry de scribed, no circuit patent licenses ar e implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a life su pport

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa i lure of the life su pp ort

device or system, or to affect its safety or effectiveness.