1
2
TAB
3
H2PAK-2
DTG1S23NZ
D(TAB)
G(1)
S(2, 3)
Features
Order code VDS RDS(on) max. IDPTOT
STH2N120K5-2AG 1200 V 10 Ω 1.5 A 60 W
AEC-Q101 qualified
Industry’s lowest RDS(on) x area
Industry’s best FoM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Applications
Switching applications
Description
This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary vertical structure. The result is a
dramatic reduction in on-resistance and ultra-low gate charge for applications
requiring superior power density and high efficiency.
Product status
STH2N120K5-2AG
Product summary(1)
Order code STH2N120K5-2AG
Marking 2N120K5
Package H2PAK-2
Packing Tape and reel
1. HTRB test was performed at 80% of
V(BR)DSS according to AEC-Q101 rev.
C. All other tests were performed
according to AEC-Q101 rev. D.
Automotive-grade N-channel 1200 V, 7.25 Ω typ., 1.5 A, MDmesh™ K5
Power MOSFET in an H2PAK-2 package
STH2N120K5-2AG
Datasheet
DS12486 - Rev 4 - September 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VGS Gate-source voltage ±30 V
ID
Drain current (continuous) at Tcase = 25 °C 1.5
A
Drain current (continuous) at Tcase = 100 °C 1
IDM(1) Drain current (pulsed) 2.5 A
PTOT Total dissipation at Tcase = 25 °C 60 W
dv/dt(2) Peak diode recovery voltage slope 4.5
V/ns
dv/dt(3) MOSFET dv/dt ruggedness 50
Tstg Storage temperature range
-55 to 150 °C
TjOperating junction temperature range
1. Pulse width is limited by safe operating area.
2. ISD ≤ 1.5 A, di/dt = 100 A/μs, VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS
3. VDS ≤ 960 V
Table 2. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case 2.08
°C/W
Rthj-pcb(1) Thermal resistance junction-pcb 30
1. When mounted on an 1-inch² FR-4, 2 Oz copper board.
Table 3. Avalanche characteristics
Symbol Parameter Value Unit
IAR(1) Avalanche current, repetitive or not repetitive 0.5 A
EAS(2) Single pulse avalanche energy 80 mJ
1. Pulse width is limited by Tjmax.
2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V
STH2N120K5-2AG
Electrical ratings
DS12486 - Rev 4 page 2/15
2Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 4. Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source breakdown
voltage VGS = 0 V, ID = 1 mA 1200 V
IDSS Zero gate voltage drain
current
VGS = 0 V, VDS = 1200 V 0.5
µA
VGS = 0 V, VDS = 1200 V,
Tcase = 125 °C(1) 100
IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V ±100 nA
VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 2 3 4 V
RDS(on) Static drain-source
on-resistance VGS = 10 V, ID = 0.5 A 7.25 10 Ω
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0 V
- 124 -
pF
Coss Output capacitance - 13 -
Crss Reverse transfer capacitance - 0.5 -
Co(tr)(1) Time-related equivalent
capacitance VGS = 0 V, VDS = 0 to 960 V
- 15 -
pF
Co(er)(2) Energy-related equivalent
capacitance - 5 -
RGIntrinsic gate resistance f = 1 MHz, ID = 0 A - 16 - Ω
QgTotal gate charge VDD = 960 V, ID = 1.5 A,
VGS = 0 to 10 V
(see Figure 13. Test circuit for
gate charge behavior)
- 5.3 -
nC
Qgs Gate-source charge - 0.8 -
Qgd Gate-drain charge - 3.5 -
1. Co(tr) is a constant capacitance value giving the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
2. Co(er) is a constant capacitance value giving the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD = 600 V, ID = 0.75 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 12. Test circuit for
resistive load switching times
and Figure 17. Switching time
waveform)
- 10.3 -
ns
trRise time - 7.8 -
td(off) Turn-off delay time - 34 -
tfFall time - 39 -
STH2N120K5-2AG
Electrical characteristics
DS12486 - Rev 4 page 3/15
Table 7. Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
ISD Source-drain current - 1.5 A
ISDM(1) Source-drain current (pulsed) - 2.5 A
VSD(2) Forward on voltage VGS = 0 V, ISD = 1.5 A - 1.5 V
trr Reverse recovery time ISD = 1.5 A, di/dt = 100 A/µs,
VDD = 60 V
(see Figure 14. Test circuit for
inductive load switching and
diode recovery times)
- 350 ns
Qrr Reverse recovery charge - 1.35 µC
IRRM Reverse recovery current - 7.7 A
trr Reverse recovery time ISD = 1.5 A, di/dt = 100 A/µs,
VDD = 60 V, Tj = 150 °C
(see Figure 14. Test circuit for
inductive load switching and
diode recovery times)
- 600 ns
Qrr Reverse recovery charge - 2.09 µC
IRRM Reverse recovery current - 7.7 A
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
STH2N120K5-2AG
Electrical characteristics
DS12486 - Rev 4 page 4/15
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area
GADG050320181141SOA
100
10-1
10-2
10-3
10-1 100101102103
ID
(A)
VDS (V)
Operation in this area is
limited by R DS(on)
tp = 100 µs
tp = 10 µs
tp = 1 ms
tp = 10 ms
Single pulse,
TC = 25 °C
TJ 150 °C
Figure 2. Thermal impedance
Figure 3. Output characteristics
GADG050320181127OCH
2.5
2
1.5
1
0.5
00 8 16 24
ID
(A)
VDS (V)
VGS = 5 V
VGS = 6 V
VGS = 7 V
VGS = 8, 9, 10 V
Figure 4. Transfer characteristics
GADG050320181127TCH
2.5
2
1.5
1
0.5
002468
ID
(A)
VGS (V)
VDS = 30 V
Figure 5. Gate charge vs gate-source voltage
GADG050320181127QVG
16
12
8
4
0
800
600
400
200
0
0 2 4 6
VGS
(V)
VDS
(V)
Qg (nC)
VDS
VDD = 960 V
Qgs
Qgd
ID = 1.5 A
GADG050320181127QVG
16
12
8
4
0
800
600
400
200
0
0 2 4 6
VGS
(V)
VDS
(V)
Qg (nC)
VDS
VDD = 960 V
Qgs
Qgd
ID = 1.5 A
Figure 6. Static drain-source on-resistance
GADG050320181140RID
8.5
8
7.5
7
6.50 0.5 1 1.5
RDS(on)
(Ω)
ID (A)
VGS = 10 V
STH2N120K5-2AG
Electrical characteristics (curves)
DS12486 - Rev 4 page 5/15
Figure 7. Capacitance variations
GADG050320181128CVR
10 3
10 2
10 1
10 0
10 -1
10 -1 10 0 10 1 10 2
C
(pF)
VDS (V)
CISS
COSS
CRSS
f = 1 MHz
Figure 8. Normalized gate threshold voltage vs
temperature
GADG050320181127VTH
1.2
1
0.8
0.6
0.4
-75 -25 25 75 125
VGS(th)
(norm.)
Tj (°C)
ID = 100 µA
Figure 9. Normalized on-resistance vs temperature
GADG050320181128RON
2.5
2
1.5
1
0.5
0
-75 -25 25 75 125
RDS(on)
(norm.)
Tj (°C)
VGS = 10 V
Figure 10. Normalized V(BR)DSS vs temperature
GADG050320181129BDV
1.08
1
0.92
0.84
-75 -25 25 75 125
V(BR)DSS
(norm.)
Tj (°C)
ID = 1 mA
Figure 11. Source- drain diode forward characteristics
GADG050320181128SDF
1
0.8
0.6
0.40 0.5 1 1.5
VSD
(V)
ISD (A)
TJ = -55 °C
TJ = 25 °C
TJ = 150 °C
STH2N120K5-2AG
Electrical characteristics (curves)
DS12486 - Rev 4 page 6/15
3Test circuits
Figure 12. Test circuit for resistive load switching times
AM01468v1
VD
RG
RL
D.U.T.
2200
μF VDD
3.3
μF
+
pulse width
VGS
Figure 13. Test circuit for gate charge behavior
AM01469v1
47 kΩ 1 kΩ
47 kΩ
2.7 kΩ
1 kΩ
12 V
IG= CONST 100 Ω
100 nF
D.U.T.
+
pulse width
VGS
2200
μF
VG
VDD
Figure 14. Test circuit for inductive load switching and
diode recovery times
AM01470v1
A
D
D.U.T.
SB
G
25 Ω
AA
BB
RG
G
D
S
100 µH
µF
3.3 1000
µF VDD
D.U.T.
+
_
+
fast
diode
Figure 15. Unclamped inductive load test circuit
AM01471v1
VD
ID
D.U.T.
L
VDD
+
pulse width
Vi
3.3
µF
2200
µF
Figure 16. Unclamped inductive waveform
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
Figure 17. Switching time waveform
AM01473v1
0
VGS 90%
VDS
90%
10%
90%
10%
10%
ton
td(on) tr
0
toff
td(off) tf
STH2N120K5-2AG
Test circuits
DS12486 - Rev 4 page 7/15
4Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
STH2N120K5-2AG
Package information
DS12486 - Rev 4 page 8/15
4.1 H²PAK-2 package information
Figure 18. H²PAK-2 package outline
8159712_6
STH2N120K5-2AG
H²PAK-2 package information
DS12486 - Rev 4 page 9/15
Table 8. H²PAK-2 package mechanical data
Dim.
mm
Min. Typ. Max.
A 4.30
-
4.70
A1 0.03 0.20
C 1.17 1.37
e 4.98 5.18
E 0.50 0.90
F 0.78 0.85
H 10.00 10.40
H1 7.40 7.80
L 15.30 15.80
L1 1.27 1.40
L2 4.93 5.23
L3 6.85 7.25
L4 1.5 1.7
M 2.6 2.9
R 0.20 0.60
V
Figure 19. H²PAK-2 recommended footprint
8159712_6
Note: Dimensions are in mm.
STH2N120K5-2AG
H²PAK-2 package information
DS12486 - Rev 4 page 10/15
4.2 Packing information
Figure 20. Tape outline
P1
A0 D1
P0
F
W
E
D
B0
K0
T
User direction of feed
P2
10 pitches cumulative
tolerance on tape +/- 0.2 mm
User direction of feed
R
Bending radius
Top cover
tape
AM08852v2
STH2N120K5-2AG
Packing information
DS12486 - Rev 4 page 11/15
Figure 21. Reel outline
Table 9. Tape and reel mechanical data
Tape Reel
Dim.
mm
Dim.
mm
Min. Max. Min. Max.
A0 10.5 10.7 A 330
B0 15.7 15.9 B 1.5
D 1.5 1.6 C 12.8 13.2
D1 1.59 1.61 D 20.2
E 1.65 1.85 G 24.4 26.4
F 11.4 11.6 N 100
K0 4.8 5.0 T 30.4
P0 3.9 4.1
P1 11.9 12.1 Base quantity 1000
P2 1.9 2.1 Bulk quantity 1000
R 50
T 0.25 0.35
W 23.7 24.3
STH2N120K5-2AG
Packing information
DS12486 - Rev 4 page 12/15
Revision history
Table 10. Document revision history
Date Version Changes
23-Mar-2018 1 Initial release. The document status is preliminary data.
30-Jul-2018 2 The document status was promoted from preliminary to production data.
Updated title and features on cover page.
31-Jul-2018 3 Updated the current table. The date for revision 2 was erroneously reported
as "19-Jun-2018" instead of "30-Jul-2018".
05-Sep-2018 4 Updated IDSS parameter in Table 4. Static.
STH2N120K5-2AG
DS12486 - Rev 4 page 13/15
Contents
1Electrical ratings ..................................................................2
2Electrical characteristics...........................................................3
2.1 Electrical characteristics (curves) .................................................5
3Test circuits .......................................................................7
4Package information...............................................................8
4.1 H²PAK-2 package information ....................................................8
4.2 Packing information ...........................................................10
Revision history .......................................................................13
STH2N120K5-2AG
Contents
DS12486 - Rev 4 page 14/15
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STH2N120K5-2AG
DS12486 - Rev 4 page 15/15