MC74VHC1GT66 Advance Information Analog Switch The MC74VHC1GT66 is an advanced high speed CMOS bilateral analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining CMOS low power dissipation. This bilateral switch controls analog and digital voltages that may vary across the full power-supply range (from VCC to GND). The MC74VHC1GT66 is compatible in function to a single gate of the very High Speed CMOS MC74VHCT4066. The device has been designed so that the ON resistances (RON) are much lower and more linear over input voltage than RON of the metal-gate CMOS or High Speed CMOS analog switches. The ON/OFF Control input is compatible with TTL-type input thresholds allowing the device to be used as a logic-level translator from 3.0V CMOS logic to 5.0V CMOS logic or from 1.8V CMOS logic to 3.0V CMOS logic while operating at the high-voltage power supply. The input protection circuitry on this device allows overvoltage tolerance on the input, which provides protection when voltages of up to 7V are applied, regardless of the supply voltage. This allows the MC74VHC1GT66 to be used to interface 5V circuits to 3V circuits. * Low Power Dissipation: ICC = 2 A (Max) at TA = 25C * Diode Protection Provided on Inputs and Outputs * Improved Linearity and Lower ON Resistance over Input Voltage * Pin and Function Compatible with Other Standard Logic Families * Latchup Performance Exceeds 300 mA * ESD Performance: HBM > 2000 V; MM > 200 V, CDM > 1500 V IN/OUT XA 1 OUT/IN YA 2 http://onsemi.com MARKING DIAGRAMS SC-88A / SOT-353/SC-70 DF SUFFIX CASE 419A VEd Pin 1 d = Date Code TSOP-5/SOT-23/SC-59 DT SUFFIX CASE 483 VEd Pin 1 d = Date Code PIN ASSIGNMENT 1 IN/OUT XA 2 OUT/IN YA 3 GND 4 ON/OFF CONTROL 5 VCC VCC 5 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. GND 3 ON/OFF CONTROL 4 FUNCTION TABLE Figure 1. 5-Lead SOT-353 Pinout (Top View) X1 U IN/OUT XA 1 1 U ON/OFF CONTROL OUT/IN YA On/Off Control Input State of Analog Switch L H Off On Figure 2. Logic Symbol This document contains information on a new product. Specifications and information herein are subject to change without notice. Semiconductor Components Industries, LLC, 2000 August, 2000 - Rev. 4 1 Publication Order Number: MC74VHC1GT66/D MC74VHC1GT66 ABSOLUTE MAXIMUM RATINGS Symbol Value Unit DC Supply Voltage Characteristics VCC -0.5 to +7.0 V Digital Input Voltage VIN -0.5 to VCC +0.5 V Analog Output Voltage VIS -0.5 to VCC + 0.5 V Digital Input Diode Current IIK -20 mA DC Supply Current, VCC and GND ICC +25 mA Power dissipation in still air, SC-88A PD 200 mW Lead temperature, 1 mm from case for 10 s TL 260 C Storage temperature Tstg -65 to +150 C Derating -- SC-88A Package: -3 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Min Max Unit DC Supply Voltage Characteristics VCC 2.0 5.5 V Digital Input Voltage VIN GND VCC V Analog Input Voltage VIS GND VCC V Static or Dynamic Voltage Across Switch VIO* 1.2 V Operating Temperature Range Input Rise and Fall Time ON/OFF Control Input TA -55 C +125 tr , tf VCC = 3.3V 0.3V VCC = 5.0V 0.5V ns/V 0 0 100 20 * For voltage drops across the switch greater than 1.2V (switch on), excessive VCC current may be drawn; i.e. the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. The JA of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table and figure below. 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80 C 117.8 419,300 TJ = 90 C 1,032,200 90 TJ = 100 C 80 TJ = 110 C Time, Years TJ = 120 C Time, Hours FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130 C Junction Temperature C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES 1 1 10 100 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 1000 MC74VHC1GT66 DC ELECTRICAL CHARACTERISTICS VCC Symbol VIH Parameter Test Conditions Minimum High-Level Input Voltage ON/OFF Control Input RON = Per Spec Maximum Low-Level Input Voltage ON/OFF Control Input RON = Per Spec IIN Maximum Input Leakage Current ON/OFF Control Input ICC VIL TA 85C TA = 25C (V) Min 3.0 4.5 5.5 1.2 2.0 2.0 Typ Max Min Max TA 125C Min Max Unit V 1.2 2.0 2.0 1.2 2.0 2.0 V 3.0 4.5 5.5 0.53 0.8 0.8 0.53 0.8 0.8 0.53 0.8 0.8 VIN = VCC or GND 0 to 5.5 0.1 1.0 1.0 A Maximum Quiescent Supply Current VIN = VCC or GND VIO = 0V 5.5 2.0 20 40 A ICCT Quiescent Supply Current ON/OFF 3.4V at 5.5 1.35 1.5 1.65 mA RON Maximum "ON" Resistance VIN = VIH VIS = VCC or GND |IIS| 10mA (Figure 1) 3.0 4.5 5.5 30 20 15 50 30 20 70 40 35 100 50 45 Endpoints VIN = VIH VIS = VCC or GND |IIS| 10mA (Figure 1) 3.0 4.5 5.5 25 12 8 50 20 15 65 26 23 90 40 32 Control IOFF Maximum Off-Channel Leakage Current VIN = VIL VIS = VCC or GND Switch Off (Figure 2) 5.5 0.1 0.5 1.0 A ION Maximum On-Channel Leakage Current VIN = VIH VIS = VCC or GND Switch On (Figure 3) 5.5 0.1 0.5 1.0 A IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII IIIIIII III IIIIIII IIIII IIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII IIIIIII III III III III III III III III II IIIIIII IIIII IIIII IIII IIIIIII IIIIIII III III III III III III III III II IIII IIIIIII IIIIIII III III III III III III III III II IIII IIIIIII IIIIIII III III III III III III III III II II IIII IIIIIII IIIIIII III III III III III III III III IIII IIIIIII IIIIIII III III III III III III III III II II IIII IIIIIII IIIIIII III III III III III III III III IIII IIIIIII IIIIIII III III III III III III III IIIII IIII IIIIIII IIIIIII III III III III III III III III II II IIII IIIIIII IIIIIII III III III III III III III III IIII IIIIIII IIIIIII III III III III III III III III II IIII IIIIIII IIIIIII III III III III III III III III II IIII IIIIIII IIIIIII III III III III III III III III II IIII IIIIIII IIIIIII III III III III III III III IIIII AC ELECTRICAL CHARACTERISTICS (Cload = 50 pF, Input tr/tf = 3.0ns) Symbol tPLH, tPHL tPLZ, tPHZ tPZL, tPZH CIN Parameter Test Conditions VCC (V) Typ Max 2.0 3.0 4.5 5.5 1 0 0 0 5 2 1 1 2.0 3.0 4.5 5.5 15 8 6 4 2.0 3.0 4.5 5.5 Maximum Propogation Delay, Input X to Y YA = Open Maximum Propogation Delay, ON/OFF Control to Analog Output RL = 1000 Maximum Propogation Delay, ON/OFF Control to Analog Output RL = 1000 Maximum Input C Capacitance it ON/OFF Control Input 0.0 Contol Input = GND Analog I/O Feedthrough 5.0 Figure 4 Figure 5 Figure 5 TA 85C TA = 25C Min Min Max TA 125C Min Max Unit 6 3 1 1 7 4 2 1 ns 35 15 10 7 46 20 13 9 57 25 17 11 ns 15 8 6 4 35 15 10 7 46 20 13 9 57 25 17 11 ns 3 10 10 10 pF 4 4 10 10 10 10 10 10 Typical @ 25C, VCC = 5.0V CPD 18 Power Dissipation Capacitance (Note NO TAG) pF 1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 MC74VHC1GT66 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III IIIII IIIIIIIII IIIIIIIIIIIIII III IIII III ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) Symbol Parameter Test Conditions VCC Limit 25C Unit BW Maximum On-Channel Bandwidth or Minimum Frequency Response Figure 7 fin = 1 MHz Sine Wave Adjust fin voltage to obtain 0 dBm at VOS Increase fin = frequency until dB meter reads -3dB RL = 50, CL = 10 pF 3.0 4.5 5.5 150 175 200 MHz ISOoff Off-Channel Feedthrough Isolation Figure 8 fin = Sine Wave Adjust fin voltage to obtain 0 dBm at VIS fin = 10 kHz, RL = 600, CL = 50 pF 3.0 4.5 5.5 -50 -50 -50 dB 3.0 4.5 5.5 -40 -40 -40 3.0 4.5 5.5 45 60 130 3.0 4.5 5.5 25 30 60 fin = 1.0 kHz, RL = 50, CL = 10 pF NOISEfeed Vin 1 MHz Square Wave (tr = tf = 2ns) Adjust RL at setup so that Is = 0 A RL = 600, CL = 50 pF Feedthrough Noise Control to Switch Figure 9 RL = 50, CL = 10 pF THD Total Harmonic Distortion Figure 10 fin = 1 kHz, RL = 10k, CL = 50 pF THD = THDMeasured - THDSource VIS = 3.0 VPP sine wave VIS = 4.0 VPP sine wave VIS = 5.0 VPP sine wave mVPP % 3.3 4.5 5.5 0.20 0.10 0.06 1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. PLOTTER POWER SUPPLY - DC PARAMETER ANALYZER COMPUTER + VCC VCC 1 VCC 5 1 2 VIH 3 Figure 1. On Resistance Test Set-Up VCC 2 VCC 4 5 A 3 VIL 4 Figure 2. Maximum Off-Channel Leakage Current Test Set-Up VCC A N/C 1 5 2 3 VCC 1 TEST POINT VIH 4 Figure 3. Maximum On-Channel Leakage Current Test Set-Up 5 2 3 VIH 4 Figure 4. Propagation Delay Test Set-Up http://onsemi.com 4 MC74VHC1GT66 Switch to Position 1 when testing tPLZ and tPZL Switch to Position 2 when testing tPHZ and tPZH VCC TEST POINT VCC VCC 1 1 VCC 1 RL 2 A 5 2 CL* 3 N/C 1 N/C 2 5 3 4 4 2 *Includes all probe and jig capacitance. Figure 5. Propagation Delay Output Enable/Disable Test Set-Up Figure 6. Power Dissipation Capacitance Test Set-Up VOS VCC 0.1 F fin 1 CL* VCC 0.1 F fin 5 2 dB Meter VOS VIS 1 2 VIH 3 dB Meter 4 RL CL* *Includes all probe and jig capacitance. To Distortion Meter (VCC)/2 1 RL 5 V CL* VIS VCC RL IS 4 Figure 8. Off-Channel Feedthrough Isolation Test Set-Up (VCC)/2 VOS 3 *Includes all probe and jig capacitance. Figure 7. Maximum On-Channel Bandwidth Test Set-Up RL 5 2 3 IN 1 MHz VOS t r t 2 ns f 4 GND *Includes all probe and jig capacitance. fin 1 5 2 CL* VIH VCC 0.1 F 3 VIH 4 *Includes all probe and jig capacitance. Figure 9. Feedthrough Noise, ON/OFF Control to Analog Out, Test Set-Up Figure 10. Total Harmonic Distortion Test Set-Up http://onsemi.com 5 MC74VHC1GT66 tr Control XA tPLH YA VCC 50% VCC 50% tf 90% 10% tPLZ tPZL tPHL 50% VCC VOH 50% VCC 10% Analog Out VOL 90% 50% VCC tPHZ tPZH Figure 11. Propagation Delay, Analog In to Analog Out Waveforms VIH 50% VCC High Impedance VOL VOH High Impedance Figure 12. Propagation Delay, ON/OFF Control DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number MC74VHC1GT66DFT2 MC74VHC1GT66DFT4 MC74VHC1GT66DTT1 MC74VHC1GT66DTT3 Circuit Indicator MC MC MC MC Temp Range Identifier 74 74 74 74 Device Function Technology VHC1G T66 VHC1G T66 VHC1G T66 VHC1G T66 http://onsemi.com 6 Package Suffix DF DF DT DT Tape & Reel Suffix Package Type Tape and Reel Size T2 SC-88A/ SOT-353 /SC-70 178mm (7") 3000 Unit T4 SC-88A/ SOT-353 /SC-70 330mm (13") 100000 Unit T1 TSOP5/ SOT-23 /SC-59 178mm (7") 3000 Unit T3 TSOP5/ SOT-23 /SC-59 330mm (13") 100000 Unit MC74VHC1GT66 P0 K t P2 D TOP COVER TAPE E A0 + K0 SEE NOTE 2 B1 10 PITCHES CUMULATIVE TOLERANCE ON TAPE 0.2 mm (0.008") SEE NOTE 2 F + B0 W + D1 FOR COMPONENTS 2.0 mm x 1.2 mm AND LARGER P EMBOSSMENT FOR MACHINE REFERENCE ONLY INCLUDING DRAFT AND RADII CONCENTRIC AROUND B0 CENTER LINES OF CAVITY USER DIRECTION OF FEED *TOP COVER TAPE THICKNESS (t1) 0.10 mm (0.004") MAX. R MIN. BENDING RADIUS TAPE AND COMPONENTS SHALL PASS AROUND RADIUS R" WITHOUT DAMAGE EMBOSSED CARRIER 100 mm (3.937") MAXIMUM COMPONENT ROTATION 10 EMBOSSMENT 1 mm MAX TYPICAL COMPONENT CAVITY CENTER LINE TAPE 1 mm (0.039") MAX TYPICAL COMPONENT CENTER LINE 250 mm (9.843") CAMBER (TOP VIEW) ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250 mm Figure 13. Carrier Tape Specifications EMBOSSED CARRIER DIMENSIONS (See Notes 1 and 2) Tape Size B1 Max 8 mm 4.35 mm (0.171") D D1 E F K P P0 P2 R T W 1.5 +0.1/ -0.0 mm (0.059 +0.004/ -0.0") 1.0 mm Min (0.039") 1.75 0.1 mm (0.069 0.004") 3.5 0.5 mm (1.38 0.002") 2.4 mm (0.094") 4.0 0.10 mm (0.157 0.004") 4.0 0.1 mm (0.156 0.004") 2.0 0.1 mm (0.079 0.002") 25 mm (0.98") 0.3 0.05 mm (0.01 +0.0038/ -0.0002") 8.0 0.3 mm (0.315 0.012") 1. Metric Dimensions Govern-English are in parentheses for reference only. 2. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to 0.50 mm max. The component cannot rotate more than 10 within the determined cavity http://onsemi.com 7 MC74VHC1GT66 t MAX 1.5 mm MIN (0.06") A 13.0 mm 0.2 mm (0.512" 0.008") 20.2 mm MIN (0.795") 50 mm MIN (1.969") FULL RADIUS G Figure 14. Reel Dimensions REEL DIMENSIONS Tape Size T&R Suffix A Max G t Max 8 mm T1, T2 178 mm (7") 8.4 mm, +1.5 mm, -0.0 (0.33" + 0.059", -0.00) 14.4 mm (0.56") 8 mm T3, T4 330 mm (13") 8.4 mm, +1.5 mm, -0.0 (0.33" + 0.059", -0.00) 14.4 mm (0.56") DIRECTION OF FEED BARCODE LABEL POCKET Figure 15. Reel Winding Direction http://onsemi.com 8 HOLE MC74VHC1GT66 CAVITY TAPE TOP TAPE TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN COMPONENTS DIRECTION OF FEED Figure 16. Tape Ends for Finished Goods T2" PIN ONE AWAY FROM SPROCKET HOLE User Direction of Feed Figure 17. DFT2 and DFT4 (SC88A) Reel Configuration/Orientation T1" PIN ONE AWAY FROM SPROCKET HOLE User Direction of Feed Figure 18. DTT1 and DTT3 (TSOP5) Reel Configuration/Orientation http://onsemi.com 9 TAPE LEADER NO COMPONENTS 400 mm MIN MC74VHC1GT66 PACKAGE DIMENSIONS SC-88A / SOT-353 / SC-70 DF SUFFIX 5-LEAD PACKAGE CASE 419A-01 ISSUE B A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MM. V 5 4 DIM A B C D G H J K N S V -B- S 1 2 3 D 5 PL 0.2 (0.008) M B M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 J C K H EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE 1.9 mm http://onsemi.com 10 0.65 mm 0.65 mm 0.4 mm (min) 0.5 mm (min) MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40 MC74VHC1GT66 PACKAGE DIMENSIONS TSOP-5 / SOT-23 / SC-59 DT SUFFIX 5-LEAD PACKAGE CASE 483-01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. D S 5 4 1 2 3 B L DIM A B C D G H J K L M S G A J C 0.05 (0.002) H M K EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE 0.094 2.4 0.037 0.95 0.074 1.9 0.037 0.95 EEE EEE EEE EEE EEE EEE 0.039 1.0 http://onsemi.com 11 MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.00 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0 10 2.50 3.00 0.028 0.7 inches mm INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0 10 0.0985 0.1181 MC74VHC1GT66 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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