Low Power, 350 MHz
Voltage Feedback Amplifiers
AD8038/AD8039
Rev. G
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FEATURES
Low power: 1 mA supply current/amp
High speed
350 MHz, −3 dB bandwidth (G = +1)
425 V/μs slew rate
Low cost
Low noise
8 nV/√Hz @ 100 kHz
600 fA/√Hz @ 100 kHz
Low input bias current: 750 nA maximum
Low distortion
−90 dB SFDR @ 1 MHz
−65 dB SFDR @ 5 MHz
Wide supply range: 3 V to 12 V
Small packaging: 8-lead SOT-23, 5-lead SC70, and 8-lead SOIC
APPLICATIONS
Battery-powered instrumentation
Filters
A/D drivers
Level shifting
Buffering
Photo multipliers
FUNCTIONAL BLOCK DIAGRAM
NC
1
–IN
2
+IN
3
–V
S4
DISABLE
8
+V
S
7
V
OUT
6
NC
5
NC = NO CONNECT
AD8038
0
2951-001
Figure 1. 8-lead SOIC (R)
AD8038
V
OUT 1
+IN
3
–V
S2
+V
S
5
–IN
4
0
2951-002
Figure 2. 5-Lead SC70 (KS)
NC = NO CONNECT
V
OUT1 1
–IN1
2
+IN1
3
–V
S4
+V
S
8
V
OUT2
7
–IN2
6
+IN2
5
AD8039
02951-003
Figure 3. 8-Lead SOIC (R) and 8-Lead SOT-23 (RJ)
GENERAL DESCRIPTION
The AD8038 (single) and AD8039 (dual) amplifiers are high speed
(350 MHz) voltage feedback amplifiers with an exceptionally low
quiescent current of 1.0 mA/amplifier typical (1.5 mA maximum).
The AD8038 single amplifier in the 8-lead SOIC package has a
disable feature. Despite being low power and low cost, the amplifier
provides excellent overall performance. Additionally, it offers a
high slew rate of 425 V/µs and a low input offset voltage of 3 mV
maximum.
The Analog Devices, Inc., proprietary XFCB process allows low
noise operation (8 nV/√Hz and 600 fA/√Hz) at extremely low
quiescent currents. Given a wide supply voltage range (3 V to 12 V),
wide bandwidth, and small packaging, the AD8038 and AD8039
amplifiers are designed to work in a variety of applications
where power and space are at a premium.
The AD8038 and AD8039 amplifiers have a wide input common-
mode range of 1 V from either rail and swing to within 1 V of each
rail on the output. These amplifiers are optimized for driving
capacitive loads up to 15 pF. If driving larger capacitive loads, a small
series resistor is needed to avoid excessive peaking or overshoot.
The AD8039 amplifier is available in a 8-lead SOT-23 package,
and the single AD8038 is available in both an 8-lead SOIC and a
5-lead SC70 package. These amplifiers are rated to work over
the industrial temperature range of −40°C to +85°C.
–6
10000.1 1 10 100
–3
0
3
6
9
12
15
18
21
24
FREQUENCY (MHz)
GAIN (dB)
G = +5
G = +2
G = +1
G = +10
0
2951-004
Figure 4. Small Signal Frequency Response for Various Gains,
VOUT = 500 mV p-p, VS = ±5 V
AD8038/AD8039
Rev. G | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Maximum Power Dissipation ..................................................... 5
Output Short Circuit .................................................................... 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6
Layout, Grounding, and Bypassing Considerations .................. 13
Disable ......................................................................................... 13
Power Supply Bypassing ............................................................ 13
Grounding ................................................................................... 13
Input Capacitance ...................................................................... 13
Output Capacitance ................................................................... 13
Input-to-Output Coupling ........................................................ 13
Applications Information .............................................................. 14
Low Power ADC Driver ............................................................ 14
Low Power Active Video Filter ................................................. 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 16
REVISION HISTORY
8/09—Rev. F to Rev. G
Changes to Applications Section and General Description
Section ................................................................................................ 1
Changes to Disable Section and Grounding Section ................. 13
Changes to Low Power ADC Driver Section and Low Power
Active Video Filter Section ............................................................ 14
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 16
8/04—Rev. E to Rev. F
Changes to Figure 4 ........................................................................ 10
8/03—Rev. D to Rev. E
Change to TPC 34............................................................................. 8
7/03—Rev. C to Rev. D
Changes to Ordering Guide ............................................................ 4
Updated TPC 35 Caption ................................................................ 8
6/03—Rev. B to Rev. C
Updated Connection Diagrams ...................................................... 1
Updated Ordering Guide ................................................................. 4
Updated Outline Dimensions ....................................................... 11
5/02—Rev. A to Rev. B
Add Part Number AD8038 ............................................... Universal
Changes to Product Title .................................................................. 1
Changes to Features .......................................................................... 1
Changes to Product Description ..................................................... 1
Changes to Connection Diagram .................................................... 1
Update to Specifications ................................................................... 2
Update to Maximum Power Dissipation ........................................ 4
Update to Output Short Circuit ....................................................... 4
Update to Ordering Guide ............................................................... 4
Change to Figure 2 ............................................................................ 4
Change to TPC 2 ............................................................................... 5
Change to TPC 18 ............................................................................. 6
Change to TPC 27 ............................................................................. 7
Change to TPC 29 ............................................................................. 8
Change to TPC 30 ............................................................................. 8
Change to TPC 31 ............................................................................. 8
Added TPC 36 .................................................................................... 8
Added TPC 37 .................................................................................... 9
Edits to Low Power Active Video Filter ....................................... 10
Change to Figure 4 ......................................................................... 10
4/02—Rev. 0 to Rev. A
Changes to Features .......................................................................... 1
Update Specifications ................................................................... 2, 3
Edits to TPC 19 .................................................................................. 7
AD8038/AD8039
Rev. G | Page 3 of 16
SPECIFICATIONS
TA = 25°C, VS = ±5 V, RL = 2 kΩ, Gain = +1, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VO = 0.5 V p-p 300 350 MHz
G = +2, VO = 0.5 V p-p 175 MHz
G = +1, VO = 2 V p-p 100 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p 45 MHz
Slew Rate G = +1, VO = 2 V step, RL = 2 kΩ 400 425 V/µs
Overdrive Recovery Time G = +2, 1 V overdrive 50 ns
Settling Time to 0.1% G = +2, VO = 2 V step 18 ns
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −90 dBc
Third Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −92 dBc
Second Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −65 dBc
Third Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −70 dBc
Crosstalk, Output-to-Output (AD8039) f = 5 MHz, G = +2 −70 dB
Input Voltage Noise f = 100 kHz 8 nV/√Hz
Input Current Noise f = 100 kHz 600 fA/√Hz
DC PERFORMANCE
Input Offset Voltage 0.5 3 mV
Input Offset Voltage Drift 4.5 µV/°C
Input Bias Current 400 750 nA
Input Bias Current Drift 3 nA/°C
Input Offset Current ±25 nA
Open-Loop Gain VO = ±2.5 V 70 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range RL = 1 kΩ ±4 V
Common-Mode Rejection Ratio VCM = ±2.5 V 61 67 dB
OUTPUT CHARACTERISTICS
DC Output Voltage Swing RL = 2 kΩ, saturated output ±4 V
Capacitive Load Drive 30% overshoot, G = +2 20 pF
POWER SUPPLY
Operating Range 3.0 12 V
Quiescent Current per Amplifier 1.0 1.5 mA
Power Supply Rejection Ratio −Supply −71 −77 dB
+Supply −64 −70 dB
POWER-DOWN DISABLE1
Turn-On Time 180 ns
Turn-Off Time 700 ns
Disable Voltage—Part is Off +VS − 4.5 V
Disable Voltage—Part is On +VS − 2.5 V
Disabled Quiescent Current 0.2 mA
Disabled In/Out Isolation f = 1 MHz −60 dB
1 Only available in AD8038 8-lead SOIC package.
AD8038/AD8039
Rev. G | Page 4 of 16
TA = 25°C, VS = 5 V, RL = 2 kΩ to VS/2, Gain = +1, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VO = 0.2 V p-p 275 300 MHz
G = +2, VO = 0.2 V p-p 150 MHz
G = +1, VO = 2 V p-p 30 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p 45 MHz
Slew Rate G = +1, VO = 2 V step, RL = 2 kΩ 340 365 V/µs
Overdrive Recovery Time G = +2, 1 V overdrive 50 ns
Settling Time to 0.1% G = +2, VO = 2 V step 18 ns
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −82 dBc
Third Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −79 dBc
Second Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −60 dBc
Third Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −67 dBc
Crosstalk, Output-to-Output f = 5 MHz, G = +2 −70 dB
Input Voltage Noise f = 100 kHz 8 nV/√Hz
Input Current Noise f = 100 kHz 600 fA/√Hz
DC PERFORMANCE
Input Offset Voltage 0.8 3 mV
Input Offset Voltage Drift 3 V/°C
Input Bias Current 400 750 nA
Input Bias Current Drift 3 nA/°C
Input Offset Current ±30 nA
Open-Loop Gain VO = ±2.5 V 70 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range RL = 1 kΩ 1.0 − 4.0 V
Common-Mode Rejection Ratio VCM = ±1 V 59 65 dB
OUTPUT CHARACTERISTICS
DC Output Voltage Swing RL = 2 kΩ, saturated output 0.9 − 4.1 V
Capacitive Load Drive 30% overshoot 20 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current per Amplifier 0.9 1.5 mA
Power Supply Rejection Ratio −65 −71 dB
POWER-DOWN DISABLE1
Turn-On Time 210 ns
Turn-Off Time 700 ns
Disable Voltage—Part is Off +VS − 4.5 V
Disable Voltage—Part is On +VS − 2.5 V
Disabled Quiescent Current 0.2 mA
Disabled In/Out Isolation f = 1 MHz −60 dB
1 Only available in AD8038 8-lead SOIC package.
AD8038/AD8039
Rev. G | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 12.6 V
Power Dissipation See Figure 5
Common-Mode Input Voltage ±VS
Differential Input Voltage ±4 V
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8038/AD8039
package is limited by the associated rise in junction temperature
(TJ) on the die. The plastic encapsulating the die locally reaches
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8038/AD8039.
Exceeding a junction temperature of 175°C for an extended
time can result in changes in the silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
TJ = TA + (PD × θJA)
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent power
is the voltage between the supply pins (VS) multiplied by the
quiescent current (IS). Assuming the load (RL) is referenced to
midsupply, then the total drive power is VS/2 × IOUT, some of which
is dissipated in the package and some in the load (VOUT × IOUT).
The difference between the total drive power and the load
power is the drive power dissipated in the package.
PD = quiescent power + (total drive power − load power)
PD = [VS × IS] + [(VS/2) × (VOUT/RL)] − [VOUT2/RL]
AMBIENT TEMPERATURE (°C)
0
–55
MAXIMUM POWER DISSIPATION (W)
1.0
–25 5 35 65 95 125
1.5
2.0
SOIC-8
0.5
SC70-5
SOT-23-8
02951-005
Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
RMS output voltages should be considered. If RL is referenced to
VS−, as in single-supply operation, then the total drive power is
VS × IOUT. If the rms signal levels are indeterminate, consider the
worst case, when VOUT = VS /4 for RL to midsupply
PD = (VS × IS) + (VS/4)2/RL
In single-supply operation with RL referenced to VS−, worst case
is VOUT = VS /2.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, throughholes, ground, and power planes reduce
the θJA. Care must be taken to minimize parasitic capacitances at
the input leads of high speed op amps as discussed in the
Layout, Grounding, and Bypassing Considerations section.
Figure 5 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 8-lead SOIC
(125°C/W), 5-lead SC70 (210°C/W), and 8-lead SOT-23
(160°C/W) packages on a JEDEC standard 4-layer board.
θJA values are approximations.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current
from the AD8038/AD8039 will likely cause a catastrophic failure.
ESD CAUTION
AD8038/AD8039
Rev. G | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
Default Conditions: ±5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25°C.
FREQUENCY (MHz)
GAIN (dB)
–6
10000.1 1 100
–3
0
3
6
9
12
15
18
21
24
G = +5
G = +2
G = +1
G = +10
10
0
2951-006
Figure 6. Small Signal Frequency Response for Various Gains,
VOUT = 500 mV p-p
FREQUENCY (MHz)
GAIN (dB)
0
1
6
7
5
4
3
2
V
S
= ±1.5V
V
S
= ±2.5V
V
S
= ±5V
10000.1 1 10010
02951-007
Figure 7. Small Signal Frequency Response for Various Supplies,
VOUT = 500 mV p-p
FREQUENCY (MHz)
GAIN (dB)
0
1
6
7
5
4
3
2
10000.1 1 10010
R
L
= 2kΩ
R
L
= 500Ω
R
L
= 1kΩ
02951-008
Figure 8. Small Signal Frequency Response for Various RL,
VS = ±5 V, VOUT = 500 mV p-p
FREQUENCY (MHz)
GAIN (dB)
0
1
6
7
R
L
= 2kΩ
5
4
3
2
R
L
= 500Ω
R
L
= 1kΩ
10000.1 1 10010
0
2951-009
Figure 9. Small Signal Frequency Response for Various RL,
VS = 5 V, VOUT = 500 mV p-p
FREQUENCY (MHz)
GAIN (dB)
0
1
2
3
4
5
6
7
8
R
L
= 500Ω
R
L
= 2kΩ
R
L
= 1kΩ
0.1 1 10010
0
2951-010
Figure 10. Large Signal Frequency Response for Various RL,
VOUT = 3 V p-p, VS = 5 V
FREQUENCY (MHz)
GAIN (dB)
0
1
2
3
4
5
6
7
8
0.1 1 10010
R
L
= 2kΩ
R
L
= 500Ω
R
L
= 1kΩ
02951-011
Figure 11. Large Signal Frequency Response for Various RL,
VOUT = 4 V p-p, VS = ±5 V
AD8038/AD8039
Rev. G | Page 7 of 16
FREQUENCY (MHz)
GAIN (dB)
0
–4
1
2
3
4C
L
= 15pF
C
L
= 10pF
C
L
= 5pF
–5
–3
–2
–1
5
1000110010
0
2951-012
Figure 12. Small Signal Frequency Response for Various CL,
VOUT = 500 mV p-p, VS = ±5 V, G = +1
FREQUENCY (MHz)
GAIN (dB)
1
3
C
L
= 10pF
C
L
= 5pF
–5
–3
–1
5
7
C
L
= 15pF
1000110010
02951-013
Figure 13. Small Signal Frequency Response for Various CL,
VOUT = 500 mV p-p, VS = 5 V, G = +1
FREQUENCY (MHz)
GAIN (dB)
0.1
–6
1
V
OUT
= 500mV
2
V
OUT
= 200mV
V
OUT
= 2V
V
OUT
= 1V
–5
–4
–3
–2
–1
0
10001 10010
02951-014
Figure 14. Frequency Response for Various Output Voltage Levels
FREQUENCY (MHz)
OPEN-LOOP GAIN (dB)
0
0.01
10
0.1
GAIN
20
30
40
50
60
70
80
PHASE
0
PHASE (Degrees)
–10
–20
180
45
–45
135
90
1 10 100 1000
02951-015
Figure 15. Open-Loop Gain and Phase, VS = ±5 V
FREQUENCY (MHz)
GAIN (dB)
0
6
9
3
–3
–40°C
+85°C
+25°C
0.1 1 10 100 1000
02951-016
Figure 16. Frequency Response vs. Temperature,
Gain = +2, VS = ±5 V, VOUT = 2 V p-p
FREQUENCY (MHz)
15432678
HARMONIC DISTORTION (dBc)
–90
–85
–80
–75
–70
–65
–60
–55
–
50
910
R
L
= 500Ω HD2
R
L
= 500Ω HD3
R
L
= 2kΩ HD3
R
L
= 2kΩ HD2
02951-017
Figure 17. Harmonic Distortion vs. Frequency for Various Loads,
VS = ±5 V, VOUT = 2 V p-p, G = +2
AD8038/AD8039
Rev. G | Page 8 of 16
HARMONIC DISTORTION (dBc)
–90
–85
–80
–75
–70
–65
–60
–55
–50
–
45
R
L
= 500Ω HD2
R
L
= 500Ω HD3
R
L
= 2kΩ HD3
R
L
= 2kΩ HD2
FREQUENCY (MHz)
15432 678910
02951-018
Figure 18. Harmonic Distortion vs. Frequency for Various Loads,
VS = 5 V, VOUT = 2 V p-p, G = +2
FREQUENCY (MHz)
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–
50
G = +1 HD2
G = +2 HD2
G = +1 HD3
G = +2 HD3
–100
15432 678910
02951-019
Figure 19. Harmonic Distortion vs. Frequency for Various Gains,
VS = ±5 V, VOUT = 2 V p-p
FREQUENCY (MHz)
HARMONIC DISTORTION (dBc)
–100
–90
–70
–60
–
50
G = +1 HD2
G = +2 HD2
G = +1 HD3
G = +2 HD3
–80
15432 678910
02951-020
Figure 20. Harmonic Distortion vs. Frequency for Various Gains,
VS = 5 V, VOUT = 2 V p-p
AMPLITUDE (V p-p)
1234
HARMONIC DISTORTION (dBc)
–100
–80
–70
–60
–50
10MHz HD2
10MHz HD3 5MHz HD2
5MHz HD3
1MHz HD2
1MHz HD3
–90
–
40
0
2951-021
Figure 21. Harmonic Distortion vs. VOUT Amplitude for Various Frequencies,
VS = ±5 V, G = +2
AMPLITUDE (V p-p)
1.0
HARMONIC DISTORTION (dBc)
–85
–75
–65
–55
10MHz HD2
10MHz HD3
5MHz HD2
5MHz HD3
1MHz HD2
–95
–
45
1.5 2.0 2.5 3.0
1MHz HD3
02951-022
Figure 22. Harmonic Distortion vs. Amplitude for Various Frequencies,
VS = 5 V, G = +2
1000
VOLTAGE NOISE (nV/ Hz)
100
10
1
10
FREQUENCY (Hz)
10M100k1k100 10k 100M1M
02951-023
Figure 23. Input Voltage Noise vs. Frequency
AD8038/AD8039
Rev. G | Page 9 of 16
FREQUENCY (Hz)
100
10 100
NOISE (fA/
√
Hz)
1k
100k
10k
1k 10k 100k 1M
02951-024
Figure 24. Input Current Noise vs. Frequency
R
L
= 2kΩ
R
L
= 500Ω
50mV/DIV 5ns/DIV
02951-025
Figure 25. Small Signal Transient Response for Various RL, VS = 5 V
R
L
= 2kΩ
R
L
= 500Ω
50mV/DIV 5ns/DIV
02951-026
Figure 26. Small Signal Transient Response for Various RL, VS = ±5 V
C
L
= 10pF
C
L
= 5pF
50mV/DIV 5ns/DIV
C
L
= 25pF WITH
R
SNUB
= 19.6Ω
02951-027
Figure 27. Small Signal Transient Response for Various CL, VS = 5 V
50mV/DIV 5ns/DIV
C
L
= 25pF WITH
R
SNUB
= 19.6Ω
C
L
= 10pF
C
L
= 5pF
02951-028
Figure 28. Small Signal Transient Response for Various CL, VS = ±5 V
R
L
= 500ΩR
L
= 2kΩ
2.5V
500mV/DIV 5ns/DIV
02951-029
Figure 29. Large Signal Transient Response for Various RL, VS = 5 V
AD8038/AD8039
Rev. G | Page 10 of 16
R
L
= 500Ω
R
L
= 2kΩ
1V/DIV 5ns/DIV
02951-030
Figure 30. Large Signal Transient Response for Various RL, VS = ±5 V
CL = 25pF
500mV/DIV 5ns/DIV
CL = 5pF
2.5V
02951-031
Figure 31. Large Signal Transient Response for Various CL, VS = 5 V
500mV/DIV 5ns/DIV
CL = 10pF
CL = 5pF
02951-032
Figure 32. Large Signal Transient Response for Various CL, VS = ±5 V
OUT
IN
2V/DIV 50ns/DIV
02951-033
Figure 33. Input Overdrive Recovery, Gain = +1
INPUT 1V/DIV
OUTPUT 2V/DIV 50ns/DIV
IN
OUT
02951-034
Figure 34. Output Overdrive Recovery, Gain = +2
V
IN
ERROR
VOLTAGE
V
S
= ±5V
G = +2
V
OUT
= 2V p-p
+0.1%
–0.1%
0
t = 0
0.5V/DIV 5ns/DIV
2mV/DIV
02951-035
Figure 35. 0.1% Settling Time VOUT = 2 V p-p
AD8038/AD8039
Rev. G | Page 11 of 16
FREQUENCY (MHz)
CROSSTALK (dB)
10000.1 1 10 100
SIDE A
–100
–40
–20
SIDE B
–
10
–30
–50
–60
–70
–80
–90
0
2951-036
Figure 36. AD8039 Crosstalk, VIN = 1 V p-p, Gain = +1
FREQUENCY (MHz)
CMRR (dB)
1 100010 100
V
S
= +5V V
S
= ±5V
–80
–70
–60
–50
–40
–30
–20
–
10
02951-037
Figure 37. CMRR vs. Frequency, VIN = 1 V p-p
10000.10.01 1 10 100
FREQUENCY (MHz)
IMPEDANCE Ω)
0.1
1
10
100
1000
V
S
= ±5V
V
S
= +5V
02951-038
Figure 38. Output Impedance vs. Frequency
10000.10.01 1 10 100
PSRR (dB)
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
+PSRR
–PSRR
FREQUENCY (MHz)
02951-039
Figure 39. PSRR vs. Frequency
R
LOAD
(Ω)
0 100 200 300 400 500
0
1
2
3
4
5
6
7
8
9
V
S
= +5V
V
S
= ±5V
V
OUT
(p-p)
02951-040
Figure 40. Output Swing vs. Load Resistance
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
1.25
1.00
0
012
246810
0.75
0.50
0.25
02951-041
Figure 41. AD8038 Supply Current vs. Supply Voltage
AD8038/AD8039
Rev. G | Page 12 of 16
FREQUENCY (MHz)
ISOL
A
TION (dB)
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0.1 10 10011000
02951-042
Figure 42. AD8038 Input-Output Isolation (G = +2, RL = 2 kΩ, VS = ±5 V)
AD8038/AD8039
Rev. G | Page 13 of 16
LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
DISABLE
The AD8038 in the 8-lead SOIC package provides a disable
feature. This feature disables the input from the output (see
Figure 42 for input-output isolation) and reduces the quiescent
current from typically 1 mA to 0.2 mA. When the DISABLE
node is pulled below 4.5 V from the positive supply rail, the part
becomes disabled. To enable the part, the DISABLE node needs
to be pulled to greater than (VS – 2.5).
POWER SUPPLY BYPASSING
Power supply pins are actually inputs, and care must be taken
so that a noise-free stable dc voltage is applied. The purpose of
bypass capacitors is to create low impedances from the supply
to ground at all frequencies, thereby shunting or filtering a
majority of the noise.
Decoupling schemes are designed to minimize the bypassing
impedance at all frequencies with a parallel combination of
capacitors. The 0.01 µF or 0.001 F (X7R or NPO) chip capacitors
are critical and should be placed as close as possible to the
amplifier package. Larger chip capacitors, such as 0.1 F
capacitors, can be shared among a few closely spaced active
components in the same signal path. A 10 F tantalum capacitor
is less critical for high frequency bypassing and, in most cases,
only one per board is needed at the supply inputs.
GROUNDING
A ground plane layer is important in densely packed PC boards
to spread the current minimizing parasitic inductances. However,
an understanding of where the current flows in a circuit is critical
to implementing effective high speed circuit design. The length
of the current path is directly proportional to the magnitude of
parasitic inductances and, therefore, the high frequency impedance
of the path. High speed currents in an inductive ground return
create an unwanted voltage noise.
The length of the high frequency bypass capacitor leads is most
critical. A parasitic inductance in the bypass grounding works
against the low impedance created by the bypass capacitor. Because
load currents flow from the supplies as well, the ground for the
load impedance should be at the same physical location as the
bypass capacitor grounds. For the larger value capacitors, which
are intended to be effective at lower frequencies, the current
return path distance is less critical.
INPUT CAPACITANCE
Along with bypassing and ground, high speed amplifiers can be
sensitive to parasitic capacitance between the inputs and ground. A
few picofarads of capacitance reduces the input impedance at
high frequencies, in turn increasing the gain of the amplifiers,
causing peaking of the frequency response, or even oscillations
if severe enough. It is recommended that the external passive
components that are connected to the input pins be placed as
close as possible to the inputs to avoid parasitic capacitance.
The ground and power planes must be kept at a distance of at
least 0.05 mm from the input pins on all layers of the board.
OUTPUT CAPACITANCE
To a lesser extent, parasitic capacitances on the output can cause
peaking of the frequency response. Two methods to minimize
this effect include the following:
• Put a small value resistor in series with the output to isolate
the load capacitor from the output stage of the amplifier, see
Figure 12, Figure 13, Figure 27, and Figure 28.
• Increase the phase margin with higher noise gains or add
a pole with a parallel resistor and capacitor from −IN to
the output.
INPUT-TO-OUTPUT COUPLING
The input and output signal traces should not be parallel to
minimize capacitive coupling between the inputs and outputs,
avoiding any positive feedback.
AD8038/AD8039
Rev. G | Page 14 of 16
APPLICATIONS INFORMATION
LOW POWER ADC DRIVER
8
1
0.1µF 10µF
0.1µF 10µF
+5V
7
0.1µF 10µF
–5V
3
2
6
54
AD8039
1kΩ
1kΩ
1kΩ
1kΩ
VINP
VINN
REF
50Ω
50Ω
AD9203
1kΩ
1kΩ
1kΩ
1kΩ
V
IN
0V
3V
2.5V
02951-043
Figure 43. Schematic to Drive AD9203 with the AD8039
The AD9203 is a low power (125 mW on a 5 V supply), 40 MSPS
10-bit converter. As such, the low power, high performance
AD8039 is an appropriate amplifier choice to drive it.
In low supply voltage applications, differential analog inputs
are needed to increase the dynamic range of the ADC inputs.
Differential driving can also reduce second and other even-order
distortion products. The AD8039 can be used to make a dc-
coupled, single-ended-to-differential driver for driving these
ADCs. Figure 43 is a schematic of such a circuit for driving the
AD9203, 10-bit, 40 MSPS ADC.
The AD9203 works best when the common-mode voltage at the
input is at the midsupply or 2.5 V. The output stage design of
the AD8039 makes it ideal for driving these types of ADCs.
In this circuit, one of the op amps is configured in the inverting
mode, and the other is in the noninverting mode. However, to
provide better bandwidth matching, each op amp is configured
for a noise gain of +2. The inverting op amp is configured for a
gain of −1, and the noninverting op amp is configured for a gain
of +2. Each has a very similar ac response. The input signal to
the noninverting op amp is divided by 2 to normalize its voltage
level and make it equal to the inverting output.
The outputs of the op amps are centered at 2.5 V, which is the
midsupply level of the ADC. This is accomplished by first taking
the 2.5 V reference output of the ADC and dividing it by 2 with
a pair of 1 k resistors. The resulting 1.25 V is applied to the
positive input of each op amp. This voltage is then multiplied by
the gain of the op amps to provide a 2.5 V level at each output.
LOW POWER ACTIVE VIDEO FILTER
Some composite video signals derived from a digital source
contain clock feedthrough that can limit picture quality. Active
filters made from op amps can be used in this application, but
they consume 25 mW to 30 mW for each channel. In power-
sensitive applications, this can be too much, requiring the use
of passive filters that can create impedance matching problems
when driving any significant load.
The AD8038 can be used to make an effective low-pass active
filter that consumes one-fifth of the power consumed by an
active filter made from an op amp. Figure 44 shows a circuit
that uses a AD8038 with ±2.5 V supplies to create a three-pole
Sallen-Key filter. This circuit uses a single RC pole in front of a
standard 2-pole active section.
0.1µF
+2.5V
10µF
–2.5V 0.1µF 10µF
C3
33pF
R3
49.9Ω
R
F
1Ω
680pF
R5
75Ω
R2
499Ω
C1
100pF
R1
200Ω
R4
49.9Ω
AD8038
V
IN
V
OUT
02951-044
Figure 44. Low-Pass Filter for Video
Figure 45 shows the frequency response of this filter. The
response is down 3 dB at 6 MHz; therefore, it passes the video
band with little attenuation. The rejection at 27 MHz is 45 dB,
which provides more than a factor of 100 in suppression of the
clock components at this frequency.
FREQUENCY (MHz)
0.1
GAIN (dB)
110
–10
10
100
0
–20
–30
–40
–50
–60
02951-045
Figure 45. Video Filter Response
AD8038/AD8039
Rev. G | Page 15 of 16
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 46. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-203-AA
0.30
0.15
0.10 MAX
1.00
0.90
0.70
0.46
0.36
0.26
SEATING
PLANE
0.22
0.08
1.10
0.80
45
123
PIN 1
0.65 BSC
2.20
2.00
1.80
2.40
2.10
1.80
1.35
1.25
1.15
0.10 COPLANARITY
0.40
0.10
Figure 47. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
AD8038/AD8039
Rev. G | Page 16 of 16
COMPLIANT TO JEDEC STANDARDS MO-178-BA
121608-A
8°
4°
0°
SEATING
PLANE
1.95
BSC
0.65 BSC
0.60
BSC
76
1234
5
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0
.15 MAX
0
.05 MIN
1.45 MAX
0.95 MIN
0.22 MAX
0.08 MIN
0.38 MAX
0.22 MIN
0.60
0.45
0.30
PIN 1
INDICATOR
8
Figure 48. 8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8038AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8038AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8038AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8038ARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8038ARZ-REEL1 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8038ARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8038AKSZ-R21 −40°C to +85°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 H1C
AD8038AKSZ-REEL1 −40°C to +85°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 H1C
AD8038AKSZ-REEL71 −40°C to +85°C 5-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-5 H1C
AD8039AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8039AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8039AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8039ARZ1 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8039ARZ-REEL1 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8039ARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8039ART-R2 −40°C to +85°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 HYA
AD8039ART-REEL −40°C to +85°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 HYA
AD8039ART-REEL7 −40°C to +85°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 HYA
AD8039ARTZ-R21 −40°C to +85°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 HYA#
AD8039ARTZ-REEL1 −40°C to +85°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 HYA#
AD8039ARTZ-REEL71 −40°C to +85°C 8-Lead Small Outline Transistor Package [SOT-23] RJ-8 HYA#
1 Z = RoHS Compliant Part, # denotes RoHS compliant part may be top or bottom marked..
©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02951-0-8/09(G)
