1. General description
The HEF4013B is a dual D-type flip-flop that features independent set-direct in put (SD),
clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when CP is
LOW and is transferred to the output on the positive-going edge of the clock. The active
HIGH asynchronous CD and SD inputs are independent and override the D or CP inputs.
The outputs are buffered for best syste m per for m an ce . Th e clo ck inp ut ’s Schmitt-trigge r
action makes the circuit highly tolerant of slower clock rise and fall times.
It operates over a recommended VDD power supply r ange of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Applications
Counters and dividers
Registers
Toggle flip-flops
4. Ordering information
HEF4013B
Dual D-type flip-flop
Rev. 9 — 10 December 2015 Product data sheet
Table 1. Ordering information
All types operate from
40
C to +125
C
Type number Package
Name Description Version
HEF4013BT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
HEF4013BTT T SSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 2 of 16
Nexperia HEF4013B
Dual D-type flip-flop
5. Functional diagram
Fig 1. Functional di agram
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© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 3 of 16
Nexperia HEF4013B
Dual D-type flip-flop
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = LOW-to-HIGH clock transition.
Fig 3. Pin configuratio n
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Table 2. Pin description
Symbol Pin Description
1Q, 2Q 1, 13 true output
1Q, 2Q 2, 12 complement output
1CP, 2CP 3, 11 clock input (LOW to HIGH edge-triggered)
1CD, 2CD 4, 10 asynchronous clear-direct input (active HIGH)
1D, 2D 5, 9 data input
1SD, 2SD 6, 8 asynchronous set-direct input (active HIGH)
VSS 7 ground (0 V)
VDD 14 supply voltage
Table 3. Function table[1]
Control Input Output
nSD nCD nCP nD nQ nQ
HLXXHL
LHXXLH
HHXXHH
LLLLH
LLHHL
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HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 4 of 16
Nexperia HEF4013B
Dual D-type flip-flop
8. Limiting values
[1] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
[2] For TSSOP14 packages: above Tamb = 60 C, Ptot derates linearly with 5.5 mW/K.
9. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 0.5 +18 V
IIK input clamping current VI<0.5 V or VI>V
DD + 0.5 V - 10 mA
VIinput voltage 0.5 VDD + 0.5 V
IOK output clamping current VO<0.5 V or VO>V
DD + 0.5 V - 10 mA
II/O input/output current - 10 mA
IDD supply current - 50 mA
Tstg storage temperature 65 +150 C
Tamb ambient temperature 40 +125 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO14 [1] -500mW
TSSOP14 [2] -500mW
P power dissipation per output - 100 mW
Table 5. Re commended operating conditions
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 3 15 V
VIinput voltage 0 VDD V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate VDD = 5 V - 3.75 s/V
VDD = 10 V - 0.5 s/V
VDD = 15 V - 0.08 s/V
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 5 of 16
Nexperia HEF4013B
Dual D-type flip-flop
10. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI=V
SS or VDD; unless otherwise specified.
Symbol Parameter Conditions VDD Tamb = 40 C Tamb = +25 C Tamb = +85 C Tamb = +125 CUnit
Min Max Min Max Min Max Min Max
VIH HIGH-level
input voltage IO < 1 A 5 V 3.5 - 3.5 - 3.5 - 3.5 - V
10 V 7.0 - 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - 11.0 - V
VIL LOW-level
input voltage IO < 1 A 5 V - 1.5 - 1.5 - 1.5 - 1.5 V
10 V - 3.0 - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 - 4.0 V
VOH HIGH-level
output voltage IO < 1 A 5 V 4.95 - 4.95 - 4.95 - 4.95 - V
10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V
VOL LOW-level
output voltage IO < 1 A 5 V - 0.05 - 0.05 - 0.05 - 0.05 V
10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V
IOH HIGH-level
output current VO = 2.5V 5V - 1.7 - 1.4 - 1.1 - 1.1 mA
VO = 4.6 V 5 V - 0.64 - 0.5 - 0.36 - 0.36 mA
VO = 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA
VO = 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA
IOL LOW-level
output current VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.3 6 - mA
VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA
VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA
IIinput leakage
current 15 V - 0.1 - 0.1 - 1.0 - 1.0 A
IDD supply current all valid input
combinations;
IO=0 A
5 V - 1.0 - 1.0 - 30 - 30 A
10 V - 2.0 - 2.0 - 60 - 60 A
15 V - 4.0 - 4.0 - 120 - 120 A
CIinput
capacitance - ---7.5-- - -pF
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 6 of 16
Nexperia HEF4013B
Dual D-type flip-flop
11. Dynamic characteristics
Table 7. Dy namic characteristics
Tamb = 25
C; unless otherwise specified. For test circuit see Figure 6.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
tPHL HIGH to LOW
propagation delay nCP to nQ, nQ;
see Figure 4 5 V [1] 83 + 0.55 CL- 110 220 ns
10 V 34 + 0.23 CL-4590ns
15 V 22 + 0.16 CL-3060ns
nSD to nQ 5 V [1] 73 + 0.55 CL- 100 200 ns
10 V 29 + 0.23 CL-4080ns
15 V 22 + 0.16 CL-3060ns
nCD to nQ 5 V [1] 73 + 0.55 CL- 100 200 ns
10 V 29 + 0.23 CL-4080ns
15 V 22 + 0.16 CL-3060ns
tPLH LOW to HIGH
propagation delay nCP to nQ, nQ;
see Figure 4 5 V [1] 68 + 0.55 CL- 95 190 ns
10 V 29 + 0.23 CL-4080ns
15 V 22 + 0.16 CL-3060ns
nSD to nQ 5 V [1] 48 + 0.55 CL- 75 150 ns
10 V 24 + 0.23 CL-3570ns
15 V 17 + 0.16 CL-2550ns
nCD to nQ 5 V [1] 33 + 0.55 CL- 60 120 ns
10 V 19 + 0.23 CL-3060ns
15 V 12 + 0.16 CL-2040ns
tttransition time see Figure 4 5 V [1] 10 + 1.00 CL- 60 120 ns
10 V 9 + 0.42 CL-3060ns
15 V 6 + 0.28 CL-2040ns
tsu set-up time nD to nCP;
see Figure 4 5 V 40 20 - ns
10 V 25 10 - ns
15 V 15 5 - ns
thhold time nD to nCP;
see Figure 4 5 V 20 0 - ns
10 V 20 0 - ns
15 V 15 0 - ns
tWpulse width nCP input LOW;
see Figure 4 5 V 60 30 - ns
10 V 30 15 - ns
15 V 20 10 - ns
nSD input HIGH;
see Figure 5 5 V 50 25 - ns
10 V 24 12 - ns
15 V 20 10 - ns
nCD input HIGH;
see Figure 5 5 V 50 25 - ns
10 V 24 12 - ns
15 V 20 10 - ns
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 7 of 16
Nexperia HEF4013B
Dual D-type flip-flop
[1] Typical values of the propagation delays and output transition times can be calculated with the extrapolation formulas. CL is given in pF.
trec recovery time nSD input;
see Figure 5 5 V +15 5-ns
10 V 15 0 - ns
15 V 15 0 - ns
nCD input;
see Figure 5 5 V 40 25 - ns
10 V 25 10 - ns
15 V 25 10 - ns
fclk(max) maximum clock
frequency see Figure 4 5 V 7 14 - MHz
10 V 14 28 - MHz
15 V 20 40 - MHz
Table 7. Dy namic characteristics …continued
Tamb = 25
C; unless otherwise specified. For test circuit see Figure 6.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
Table 8. Dynamic po wer dissipation
VSS = 0 V; tr = tf
20 ns; Tamb = 25
C.
Symbol Parameter VDD Typical formula Where
PDdynamic power dissipation 5 V PD = 850 fi + (fo CL) VDD2 Wf
i = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
(fo CL) = sum of the outputs;
VDD = supply voltage in V.
10 V PD = 3600 fi + (fo CL) VDD2W
15 V PD = 9000 fi + (fo CL) VDD2 W
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 8 of 16
Nexperia HEF4013B
Dual D-type flip-flop
12. Waveforms
Set-up and hold times are shown as positive values but may be specified as negative values.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Measurement points are given in Table 9.
Fig 4. Set-up time, hold time , minimum clock pulse wi dth, propagation delays and transition times
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Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Measurement points are given in Table 9.
Fig 5. nSD, nCD recovery time and pulse wi dth
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Supply voltage Input Output
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5 V to 15 V 0.5VDD 0.5VDD 0.1VDD 0.9VDD
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 9 of 16
Nexperia HEF4013B
Dual D-type flip-flop
Test and measurement data is given in Table 10;
Definitions test circuit:
DUT = Device Under Test.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 6. Test circuit for measuring switching times
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Supply voltage Input Load
VDD VItr, tfCL
5 V to 15 V VSS or VDD 20 ns 50 pF
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 10 of 16
Nexperia HEF4013B
Dual D-type flip-flop
13. Application information
Fig 7. N-stage shift register
Fig 8. Binary ripple up-coun te r; divide-by-2n
Fig 9. Modified ring counte r; divide-by-( n + 1)
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© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 11 of 16
Nexperia HEF4013B
Dual D-type flip-flop
14. Package outline
Fig 10. Package outline SOT108-1 (SO14)
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HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 12 of 16
Nexperia HEF4013B
Dual D-type flip-flop
Fig 11. Package outline SOT402-1 (TSSOP14)
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© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 13 of 16
Nexperia HEF4013B
Dual D-type flip-flop
15. Abbreviations
16. Revision history
Table 11. Abbreviations
Acronym Description
DUT Device Under Test
Table 12. Revision history
Document ID Release date Data sheet statu s Change notice Supersedes
HEF4013B v.9 20151210 Product data sheet - HEF4013B v.8
Modifications: Type number HEF4013BP (SOT27-1) removed.
HEF4013B v.8 20111121 Product data sheet - HEF4013B v.7
Modifications: Legal pages updated.
Changes in “General description”, “Features and benefits” and “Applications”.
HEF4013B v.7 20110913 Product data sheet - HEF4013B v.6
HEF4013B v.6 20091027 Product data sheet - HEF4013B v.5
HEF4013B v.5 20090619 Product data sheet - HEF4013B v.4
HEF4013B v.4 20080515 Product data sheet - HEF4013B_CNV v.3
HEF4013B_CNV v.3 19950101 Product specification - HEF4013B_CNV v.2
HEF4013B_CNV v.2 19950101 Product specification - -
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 14 of 16
Nexperia HEF4013B
Dual D-type flip-flop
17. Legal information
17.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conf lict with the short data sheet, the
full data sheet shall pre va il.
Product specificatio n The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
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Right to make changes — Nexperia reserves the right to make
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Applications — Applications that are described herein for any of these
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Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
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Nexperia does not accept any liability related to any default,
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customer’s applications or products, or the application or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessa ry
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by cust omer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property right s.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This docu ment contains the product specif ication.
© Nexperia B.V. 2017. All rights reserved
HEF4013B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 9 — 10 December 2015 15 of 16
Nexperia HEF4013B
Dual D-type flip-flop
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qualif ied nor test ed
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without Nexperia’s warranty of the
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from customer design an d
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
18. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia HEF4013B
Dual D-type flip-flop
19. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
9 Recommended operating conditions. . . . . . . . 4
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Application information. . . . . . . . . . . . . . . . . . 10
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
15 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
18 Contact information. . . . . . . . . . . . . . . . . . . . . 15
19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
10 December 2015