STM810TWX6F - STMicroelectronics - searchdatasheet.com

January 2010 Doc ID 9873 Rev 5 1/21

STM809, STM810

STM811, STM812

Reset circuit

Features

■Precision monitoring of 3 V, 3.3 V, and 5 V

supply voltages

■Two output configurations

– Push-pull RST output (STM809/811)

– Push-pull RST output (STM810/812)

■140 ms reset pulse width (min)

■Low supply current - 6 µA (typ)

■Guaranteed RST/RST assertion down to

VCC = 1.0 V

■Operating temperature:

–40 °C to 85 °C (industrial grade)

■Lead-free, small SOT23 and SOT143 package

SOT23-3 (WX)

SOT143-4 (W1)

Table 1. Device summary

Active-low reset Active-high reset Manual reset input Package

STM809 ✔SOT23-3

STM810 ✔SOT23-3

STM811 ✔✔SOT143-4

STM812 ✔✔SOT143-4

www.st.com

Contents STM809/810/811/812

2/21 Doc ID 9873 Rev 5

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Push-button reset input (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Negative-going VCC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Valid RST output down to VCC = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

STM809/810/811/812 List of tables

Doc ID 9873 Rev 5 3/21

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 4. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 5. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 6. SOT23-3 – 3-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 16

Table 7. SOT143-4 – 4-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . 17

Table 8. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 9. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

List of figures STM809/810/811/812
4/21 Doc ID 9873 Rev 5
List of figures
Figure 1. Logic diagram (STM809/810) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Logic diagram (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. SOT23-3 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. SOT143-4 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 6. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 7. Supply current vs. temperature, L/M/R/S/T (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. Power-down reset delay vs. temperature - VOD = VTH – VCC (L/M) . . . . . . . . . . . . . . . . . . . 9
Figure 9. Power-down reset delay vs. temperature - VOD = VTH – VCC (R/S/T) . . . . . . . . . . . . . . . . 10
Figure 10. Power-up trec vs. temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 11. Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Max transient duration NOT causing reset pulse vs. reset comparator overdrive  . . . . . . . 11
Figure 13. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. MR timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 15. SOT23-3 – 3-lead small outline transistor package outline  . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. SOT143-4 – 4-lead small outline transistor package outline  . . . . . . . . . . . . . . . . . . . . . . . 17

STM809/810/811/812 Description

Doc ID 9873 Rev 5 5/21

1 Description

The STM809/810/811/812 microprocessor reset circuits are low-power supervisory devices

used to monitor power supplies. They perform a single function: asserting a reset signal

whenever the VCC supply voltage drops below a preset value and keeping it asserted until

VCC has risen above the preset threshold for a minimum period of time (trec). The

STM811/812 also provide a push-button reset input (MR).

Figure 1. Logic diagram (STM809/810)

1. For STM810

Figure 2. Logic diagram (STM811/812)

1. For STM812

Table 2. Signal names

VSS Ground

RST Active-low reset output

RST(1)

1. STM810/812 only

Active-high reset output

VCC Supply voltage

MR(2)

2. STM811/812 only

Manual reset input

AI07832

STM809/810

RST (RST)

(1)

AI07831

VCC

STM811/812

VSS

RST (RST)(1)

Description STM809/810/811/812

6/21 Doc ID 9873 Rev 5

Figure 3. SOT23-3 connections

Figure 4. SOT143-4 connections

Figure 5. Block diagram

1. STM811/812 only

2. RST for STM810/812

Figure 6. Hardware hookup

1. STM809/811 only (RST for STM810/812)

2. STM811/812 only

AI07833

RST (RST)

VSS

(For STM810)

VCC

AI07834

RST (RST)

VSS

(For STM812)

VCC

AI07835

COMPARE

RST

DEBOUNCE

rec

Generator

(1)

RST

(2)

AI07836

VCC

VSS

VCC

MCU

STM809/810/

811/812

RST(1)

Push-button

RESET

VCC

MR(2)

VSS

RESET

Input

STM809/810/811/812 Operation

Doc ID 9873 Rev 5 7/21

2 Operation

2.1 Reset output

The STM809/810/811/812 microprocessor reset circuit asserts a reset signal to the MCU

whenever VCC goes below the reset threshold (VRST), or when the push-button reset input

(MR) is taken low (see Figure 14 on page 13). RST (active high for STM810/812) is

guaranteed valid down to VCC = 1 V (0° to 70°C).

During power-up, once VCC exceeds the reset threshold an internal timer keeps RST low for

the reset time-out period, trec. After this interval, RST returns high.

If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays

low for at least the reset time-out period. Any time VCC goes below the reset threshold, the

internal timer clears. The reset timer starts when VCC returns above the reset threshold. The

active-low reset (RST) and active-high reset (RST) both source and sink current.

2.2 Push-button reset input (STM811/812)

A logic low on MR asserts RST. RST remains asserted while MR is low, and for trec after it

returns high. The MR input has an internal 20 kΩ pull-up resistor, allowing it to be left open if

not used. This input can be driven with TTL/CMOS-logic levels or with open-drain/collector

outputs. Connect a normally open push-button switch from MR to GND to create a manual

reset function; external debounce circuitry is not required. If the device is used in a noisy

environment, connect a 0.1 µF capacitor from MR to GND to provide additional noise

immunity.

2.3 Negative-going VCC transients

The STM809/810/811/812 are relatively immune to negative-going VCC transients (glitches).

Figure 12 on page 11 shows typical transient duration versus reset comparator overdrive

(for which the STM809/810/811/812 will NOT generate a reset pulse). The graph was

generated using a negative pulse applied to VCC, starting at 0.5V above the actual reset

threshold and ending below it by the magnitude indicated (comparator overdrive). The graph

indicates the maximum pulse width a negative VCC transient can have without causing a

reset pulse. As the magnitude of the transient increases (further below the threshold), the

maximum allowable pulse width decreases. Any combination of duration and overdrive

which lies under the curve will NOT generate a reset signal. Typically, a VCC transient that

goes 100 mV below the reset threshold and lasts 20 µs or less will not cause a reset pulse.

A 0.1 µF bypass capacitor mounted as close as possible to the VCC pin provides additional

transient immunity.

Operation STM809/810/811/812

8/21 Doc ID 9873 Rev 5

2.4 Valid RST output down to VCC = 0 V

When VCC falls below 1 V, the RST (STM809/811) output no longer sinks current, but

becomes an open circuit. In most systems this is not a problem, as most MCUs do not

operate below 1 V. However, in applications where RST output must be valid down to 0 V, a

pull-down resistor may be added to hold the RST output low. This resistor must be large

enough to not load the RST output, and still be small enough to pull the output to ground. A

100 kΩ resistor is recommended.

Note: The same situation applies for the active-high RST of the STM810/812. A 100 k

pull-up

resistor to VCC should be used if RST must remain valid for VCC < 1.0 V.

STM809/810/811/812 Typical operating characteristics

Doc ID 9873 Rev 5 9/21

3 Typical operating characteristics

Note: Typical values are at TA = 25 °C, VCC = 5 V for L/M versions, VCC = 3.3 V for T/S versions,

and VCC = 3.0 V for R versions.

Figure 7. Supply current vs. temperature, L/M/R/S/T (no load)

Figure 8. Power-down reset delay vs. temperature - VOD = VTH – VCC (L/M)

AI07879

0.0

2.0

4.0

6.0

8.0

–40 –20 0 20 40 60 80

Temperature (°C)

Supply Current (µA)

3.6V

5.5V

AI07880

0.00

20.00

40.00

60.00

80.00

100.00

120.00

140.00

–40 –20 0 20 40 60 80

Temperature (°C)

Power-Down Reset Delay (µs)

VOD = 20mV

VOD = 125mV

VOD = 200mV

Typical operating characteristics STM809/810/811/812

10/21 Doc ID 9873 Rev 5

Figure 9. Power-down reset delay vs. temperature - VOD = VTH – VCC (R/S/T)

Figure 10. Power-up trec vs. temperature

AI07878

0.00

20.00

40.00

60.00

80.00

100.00

–40 –20 0 20 40 60 80

Temperature (°C)

Power-Down Reset Delay (µs)

VOD = 20mV

VOD = 125mV

VOD = 200mV

200.00

210.00

220.00

230.00

240.00

250.00

–40 –20 0 20 40 60 80

Temperature (°C)

Power-up trec (ms)

L/M

R/S/T

AI07881

STM809/810/811/812 Typical operating characteristics

Doc ID 9873 Rev 5 11/21

Figure 11. Normalized reset threshold vs. temperature

Figure 12. Max transient duration NOT causing reset pulse vs. reset comparator

overdrive

AI07882

0.993

0.994

0.995

0.996

0.997

0.998

0.999

1.001

1.000

1.002

1.003

–40 –20 0 20 40 60 80

Temperature (°C)

Normalized Threshold

L/M

R/S/T

AI07883

0.00

100.00

200.00

300.00

400.00

500.00

600.00

700.00

1 10 100 1000

Reset Comparator Overdrive, VRST – VCC (mV)

Maximum Transient Duration (µs)

R/S/T

L/M

Maximum ratings STM809/810/811/812

12/21 Doc ID 9873 Rev 5

4 Maximum ratings

Stressing the device above the rating listed in the absolute maximum ratings table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the operating sections of

this specification is not implied. Exposure to absolute maximum rating conditions for

extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

Program and other relevant quality documents.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

TSTG Storage temperature (VCC off) –55 to 150 °C

TSLD(1)

1. Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.

Lead solder temperature for 10 seconds 260 °C

VIO Input or output voltage –0.3 to VCC +0.3 V

VCC Supply voltage –0.3 to 7.0 V

IOOutput current 20 mA

PDPower dissipation 320 mW

STM809/810/811/812 DC and AC parameters

Doc ID 9873 Rev 5 13/21

5 DC and AC parameters

This section summarizes the operating measurement conditions, and the DC and AC

characteristics of the device. The parameters in the DC and AC characteristics tables that

follow, are derived from tests performed under the measurement conditions summarized in

Table 4.. Designers should check that the operating conditions in their circuit match the

operating conditions when relying on the quoted parameters.

Table 4. Operating and AC measurement conditions

Figure 13. AC testing input/output waveforms

Figure 14. MR timing waveform

1. RST for STM810/812

Parameter STM809/810/811/812 Unit

VCC supply voltage 1.0 to 5.5 V

Ambient operating temperature (TA) –40 to 85 °C

Input rise and fall times ≤ 5ns

Input pulse voltages 0.2 to 0.8 VCC V

Input and output timing ref. voltages 0.3 to 0.7 VCC V

AI02568

0.8VCC

0.2VCC

0.7VCC

0.3VCC

AI07837a

RST (1)

tMLRL

trec

tMLMH

DC and AC parameters STM809/810/811/812

14/21 Doc ID 9873 Rev 5

Table 5. DC and AC characteristics

Sym Alter-

native Description Test condition(1) Min Typ Max Unit

VCC Operating voltage TA = –40 to +85 °C 1.2 5.5 V

TA = 0 to +70 °C 1.0 5.5 V

ICC VCC supply current VCC < 3.6 V 5.5 10 µA

VCC < 5.5 V 7 15 µA

VIH MR input high voltage VCC > VRST (max), STM8XXL/M 2.2 V

VCC > VRST (max), STM8XXR/S/T 0.7 VCC V

VIL MR input low voltage VCC > VRST (max), STM8XXL/M 0.8 V

VCC > VRST (max), STM8XXR/S/T 0.25 VCC V

VOL

RST output low voltage

(active high(2) or low)

STM8XXR/S/T only,

IOL = 1.2 mA

VCC = VRST (min)

0.3 V

STM8XXL/M only,

IOL = 3.2 mA

VCC = VRST (min)

0.4 V

VOL RST output low voltage IOL = 50 µA; VCC > 1.0 V 0.3 V

VOH

RST output high voltage

STM8XXR/S/T only,

IOH = 500 µA0.8 VCC V

STM8XXL/M only,

IOH = 800 µA0.8 VCC V

RST output high voltage IOH = 150 µA,

1.8 V < VCC < VRST (min) 0.8 VCC V

Reset thresholds

VRST Reset threshold

STM8XXL 25 °C 4.56 4.63 4.70 V

–40 to 85 °C 4.50 4.75 V

STM8XXM 25 °C 4.31 4.38 4.45 V

–40 to 85 °C 4.25 4.50 V

STM8XXT 25 °C 3.04 3.08 3.11 V

–40 to 85 °C 3.00 3.15 V

STM8XXS 25 °C 2.89 2.93 2.96 V

–40 to 85 °C 2.85 3.00 V

STM8XXR 25 °C 2.59 2.63 2.66 V

–40 to 85 °C 2.55 2.70 V

VRST temperature

coefficient VCC = 3.3 V 45 ppm/

°C

VCC to RST delay VCC = VRST to

(VRST – 100 mV)

STM8XXL/M 40 µs

STM8XXR/S/T 20 µs

STM809/810/811/812 DC and AC parameters

Doc ID 9873 Rev 5 15/21

Push-button reset input

tMLMH tMR MR pulse width 10 µs

tMLRL tMRD

MR to RST output

delay(3) 0.5 µs

MR glitch immunity(4) 100 ns

MR pull-up resistance 10 20 30 kΩ

trec RST pulse width 140 210 280 ms

1. Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 1.2 V to 5.5 V (except where noted).

2. For active high (RST); VCC = VRST (max)

3. RST output for STM810/812

4. “Glitches” of 100 ns or less typically will not generate a reset pulse.

Sym Alter-

native Description Test condition(1) Min Typ Max Unit

Package mechanical data STM809/810/811/812

16/21 Doc ID 9873 Rev 5

6 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

Figure 15. SOT23-3 – 3-lead small outline transistor package outline

Note: Drawing is not to scale.

Table 6. SOT23-3 – 3-lead small outline transistor package mechanical data

SOT23-3

0.10 C

e1 D

3X b

0.15 CAB

0.20 C A B

Symbol

mm inches

Typ Min Max Typ Min Max

A 0.89 1.12 0.035 0.044

A1 0.01 0.10 0.001 0.004

A2 0.88 1.02 0.035 0.042

b 0.30 0.50 0.012 0.020

C 0.08 0.20 0.003 0.008

D 2.80 3.04 0.110 0.120

E 2.10 2.64 0.083 0.104

E1 1.20 1.40 0.047 0.055

e 0.89 1.03 0.035 0.041

e1 1.78 2.05 0.070 0.081

L 0.54 0.021

L1 0.40 0.60 0.016 0.024

Θ0° 8° 0° 8°

N3 3

STM809/810/811/812 Package mechanical data

Doc ID 9873 Rev 5 17/21

Figure 16. SOT143-4 – 4-lead small outline transistor package outline

Note: Drawing is not to scale.

Table 7. SOT143-4 – 4-lead small outline transistor package mechanical data

SOT143-4

0.10C

CAB

0.15

e1 D

e/2

0.15 CAB

CAB

3X b

0.20

Symbol

mm inches

Typ Min Max Typ Min Max

A 0.89 1.12 0.035 0.044

A1 0.01 0.10 0.001 0.004

A2 0.88 1.02 0.035 0.042

b 0.37 0.51 0.015 0.020

b2 0.76 0.94 0.030 0.037

C 0.09 0.18 0.004 0.007

D 2.80 3.04 0.110 0.120

E 2.10 2.64 0.083 0.104

E1 1.20 1.40 0.047 0.055

e 1.92 0.076

e1 0.20 0.008

L 0.55 0.022

L1 0.40 0.60 0.016 0.024

Θ0° 10° 0° 10°

N4 4

Part numbering STM809/810/811/812

18/21 Doc ID 9873 Rev 5

7 Part numbering

Table 8. Ordering information scheme

For a list of available options (e.g., speed, package) or for further information on any aspect

of this device, please contact the ST sales office nearest to you.

Example: STM8XX L WX 6 F

Device type

STM8XX

Reset threshold voltage

L = VRST = 4.50 V to 4.75 V

M = VRST = 4.25 V to 4.50 V

T = VRST = 3.00 V to 3.15 V

S = VRST = 2.85 V to 3.00 V

R = VRST = 2.55 V to 2.70 V

Package

WX = SOT23-3 (STM809, STM810)

W1 = SOT143-4 (STM811, STM812)

Temperature range

6 = –40 to 85 °C

Shipping method

F = ECOPACK® package, tape & reel

STM809/810/811/812 Part numbering

Doc ID 9873 Rev 5 19/21

Table 9. Marking description

Part number Reset threshold Output Topside marking(1)

1. x = letter assigned to indicate assembly work week (i.e., A = WW01 and WW02, B = WW03 and WW04,

C = WW05 and WW06..., Z = WW51, WW52, and WW53).

STM809L 4.63 V Push-pull RST 8AAx

STM809M 4.38 V Push-pull RST 8ABx

STM809T 3.08 V Push-pull RST 8ACx

STM809S 2.93 V Push-pull RST 8ADx

STM809R 2.63 V Push-pull RST 8AEx

STM810L 4.63 V Push-pull RST 8AFx

STM810M 4.38 V Push-pull RST 8AGx

STM810T 3.08 V Push-pull RST 8AHx

STM810S 2.93 V Push-pull RST 8AJx

STM810R 2.63 V Push-pull RST 8AKx

STM811L 4.63 V Push-pull RST 8ALx

STM811M 4.38 V Push-pull RST 8AMx

STM811T 3.08 V Push-pull RST 8ANx

STM811S 2.93 V Push-pull RST 8APx

STM811R 2.63 V Push-pull RST 8AQx

STM812L 4.63 V Push-pull RST 8ARx

STM812M 4.38 V Push-pull RST 8ASx

STM812T 3.08 V Push-pull RST 8ATx

STM812S 2.93 V Push-pull RST 8AUx

STM812R 2.63 V Push-pull RST 8AVx

Revision history STM809/810/811/812
20/21 Doc ID 9873 Rev 5
8 Revision history
Table 10. Document revision history
Date Revision Changes
02-Sep-2003 1 First issue
03-Oct-2003 1.1 Update operating characteristics (Figure 7, Figure 8, Figure 9, 
Figure 10, Figure 11, Figure 12)
16-Oct-2003 1.2 Update characteristics (Table 5); modify illustration (Figure 12)
17-Nov-2003 1.3 Modified with JEDEC timing symbols (Figure 14;Table 5)
04-Dec-2003 2 Reformatted; promoted; updated (Figure 14; Table 5, 6)
09-Dec-2003 2.1 Correct timing label, combine characteristics (Figure 10; Table 5)
10-Feb-2004 3 Clarify package; update DC characteristics (Table 5, Table 8)
19-Nov-2004 4 Update dimensions (Table 6).
05-Jan-2010 5 Updated footnote in Table 3, added text to Section 6: Package 
mechanical data, added footnote to Table 9.

STM809/810/811/812

Doc ID 9873 Rev 5 21/21

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