7-62
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
CD4013BMS
CMOS Dual ‘D’-Type Flip-Flop
Pinout
Functional Diagram
Q1
Q1
CLOCK 1
RESET 1
D1
SET 1
VSS
VDD
Q2
Q2
CLOCK 2
RESET 2
D2
SET 2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
F/F1
F/F2
2Q1
Q1
12
13 Q2
Q2
VSS
7
RESET 2 10
11
CLOCK 2
D2 9
SET 2 8
RESET 1 4
CLOCK 1 3
D1 5
6
SET 1
VDD
14
1
Features
• High-Voltage Type (20V Rating)
• Set-Reset Capability
• Static Flip-Flop Operation - Retains State Indefinitely
With Clock Level Either “High” Or “Low”
• Medium-Speed Operation - 16 MHz (typ.) Clock Toggle
Rate at 10V
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full P ac ka ge Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Registers
• Counters
• Control Circuits
Description
CD4013BMS consists of two identical, independent data
type flip-flops. Each flip-flop has independent data, set,
reset, and clock inputs and Q and Q outputs. These devices
can be used for shift register applications, and, by
connecting Q output to the data input, for counter and toggle
applications. The logic level present at the D input is
transferred to the Q output during the positive going
transition of the clock pulse. Setting or resetting is
independent of the clock and is accomplished by a high level
on the set or reset line, respectively.
The CD4013BMS is supplied in these 14 lead outline pack-
ages:
Braze Seal DIP H4Q
Frit Seal DIP H1B
Ceramic Flatpack H3W
December 1992
File Number 3080
7-63
Specifications CD4013BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . . θja θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K). . . . . .Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-2µA
2 +125oC - 200 µA
VDD = 18V, VIN = VDD or GND 3 -55oC-2µA
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA
2 +125oC -1000 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
2 +125oC - 1000 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
(Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
Input Voltage High
(Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
Input Voltage Low
(Note 2) VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC- 4 V
Input Voltage High
(Note 2) VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC11 - V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
7-64
Specifications CD4013BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1, 2) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Propagation Delay
Clock to Q, Q TPHL1
TPLH1 VDD = 5V, VIN = VDD or GND 9 +25oC - 300 ns
10, 11 +125oC, -55oC - 405 ns
Propagation Delay
Set to Q, Reset to Q TPHL2 VDD = 5V, VIN = VDD or GND 9 +25oC - 400 ns
10, 11 +125oC, -55oC - 540 ns
Propagation Delay
Set to Q, Reset to Q TPLH2 VDD = 5V, VIN = VDD or GND 9 +25oC - 300 ns
10, 11 +125oC, -55oC - 405 ns
Transition Time
Clock to Q, Q TTHL
TTLH VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
10, 11 +125oC, -55oC - 270 ns
Maximum Clock Input
Frequency FCL VDD = 5V, VIN = VDD or GND 9 +25oC 3.5 - MHz
10, 11 +125oC, -55oC 3.5/1.35 - MHz
NOTES:
1. VDD = 5V, CL = 50pF, RL = 200K
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 1.0 µA
+125oC-30µA
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC - 2.0 µA
+125oC-60µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC - 2.0 µA
+125oC - 120 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC4.95 - V
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC9.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
-55oC 0.64 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
-55oC 1.6 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
-55oC 4.2 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
-55oC - -0.64 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
-55oC - -1.6 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
-55oC - -4.2 mA
7-65
Specifications CD4013BMS
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
-55oC - -4.2 mA
Input Voltage Low VIL VDD = 10V, VOH > 9V, V OL < 1V 1, 2 +25oC, +125oC,
-55oC-3V
Input Voltage High VIH VDD = 10V, V OH > 9V, V OL < 1V 1, 2 +25oC, +125oC,
-55oC+7 - V
Propagation Delay Clock
to Q, Q TPHL1
TPLH1 VDD = 10V 1, 2, 3 +25oC - 130 ns
VDD = 15V 1, 2, 3 +25oC - 90 ns
Propagation Delay
Set to Q Reset to Q TPHL2 VDD = 10V 1, 2, 3 +25oC - 170 ns
VDD = 15V 1, 2, 3 +25oC - 120 ns
Propagation Delay
Set to Q Reset to Q TPLH2 VDD = 10V 1, 2, 3 +25oC - 130 ns
VDD = 15V 1, 2, 3 +25oC - 90 ns
Transition Time
Clock to Q, Q TTHL
TTLH VDD = 10V 1, 2, 3 +25oC - 100 ns
VDD = 15V 1, 2, 3 +25oC - 80 ns
Maximum Clock Input
Frequency FCL VDD = 10V 1, 2, 3 +25oC 8 - MHz
VDD = 15V 1, 2, 3 +25oC 12 - MHz
Minimum Data Setup
Time TS VDD = 5V 1, 2, 3 +25oC - 40 ns
VDD = 10V 1, 2, 3 +25oC - 20 ns
VDD = 15V 1, 2, 3 +25oC - 15 ns
Minimum Clock Pulse
Width TW VDD = 5V 1, 2, 3 +25oC - 140 ns
VDD = 10V 1, 2, 3 +25oC - 60 ns
VDD = 15V 1, 2, 3 +25oC - 40 ns
Minimum Set or Reset
Pulse Width TW VDD = 5V 2, 3 +25oC - 180 ns
VDD = 10V 2, 3 +25oC - 80 ns
VDD = 15V 2, 3 +25oC - 50 ns
Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 7.5 µA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
7-66
Specifications CD4013BMS
N Threshold Voltage
Delta ∆VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V
P Threshold Voltage
Delta ∆VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL
TPLH VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x
+25oC
Limit
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER SYMBOL DELTA LIMIT
Supply Current - MSI-1 IDD ± 0.2µA
Output Current (Sink) IOL5 ± 20% x Pre-Test Reading
Output Current (Source) IOH5A ± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883
METHOD
TEST READ AND RECORD
PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
7-67
Specifications CD4013BMS
Logic Diagram
FIGURE 1. ONE OF TWO IDENTICAL FLIP-FLOPS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz 25kHz
Static Burn-In 1
(Note 1) 1, 2, 12, 13 3-11 14
Static Burn-In 2
(Note 1) 1, 2, 12, 13 7 3-6, 8-11, 14
Dynamic Burn-
In (Note 1) - 4, 6-8, 10 14 1, 2, 12, 13 3, 11 5, 9
Irradiation
(Note 2) 1, 2, 12, 13 7 3-6, 8-11, 14
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
TRUTH TABLE
CL* DRSQQ
00001
No
Change
10010
X00QQ
X X1001
X X0110
X X1111
Logic 0 = Low
Logic 1 = High * = Level change
X = Don’t care
N(N) = FF1/FF2 terminal assignments
p
n
TG
CL
CL p
n
TG
CL
CL
p
n
TG
CL
CL
p
n
TG
CL
CL
* All inputs are protected by CMOS protection network
*4(10)
*5(9)
RESET
DATA
*6(8)
SET
*3(11)CL
CL CL
VDD
VSS
14
7
MASTER SECTION SLAVE SECTION
BUFFERED OUTPUTS
2(12)
Q
1(13)
Q
7-68
CD4013BMS
Typical Performance Characteristics
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 6. TYPICAL PROPAGATION DELAY TIME vs LOAD
CAPACITANCE (CLOCK OR SET TO Q, CLOCK OR
RESET TO Q)
FIGURE 7. TYPICAL PROPAGATION DELAY TIME vs LOAD
CAPACITANCE (SET TO Q OR RESET TO Q)
10V
5V
AMBIENT TEMPERATURE (T A) = +25oC
GATE-TO-SOURCE V OLTAGE (VGS) = 15V
0 5 10 15
15
10
5
20
25
30
DRAIN-T O-SOURCE V OLTAGE (VDS) (V)
OUTPUT LO W (SINK) CURRENT (IOL) (mA)
10V
5V
AMBIENT TEMPERATURE (T A) = +25oC
GATE-TO-SOURCE V OLTAGE (VGS) = 15V
0 5 10 15
7.5
5.0
2.5
10.0
12.5
15.0
DRAIN-T O-SOURCE V OLTAGE (VDS) (V)
OUTPUT LO W (SINK) CURRENT (IOL) (mA)
-10V
-15V
AMBIENT TEMPERATURE (T A) = +25oC
GATE-TO-SOURCE V OLTAGE (VGS) = -5V
0
-5
-10
-15
DRAIN-T O-SOURCE V OLTAGE (VDS) (V)
-20
-25
-30
0-5-10-15
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-15V
AMBIENT TEMPERATURE (T A) = +25oC0
-5
-10
-15
DRAIN-T O-SOURCE V OLTAGE (VDS) (V) 0-5-10-15
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
GATE-TO-SOURCE V OLTAGE (VGS) = -5V
AMBIENT TEMPERATURE (T A) = +25oC
15V
10V
50
250
200
150
100
SUPPLY VOLTAGE (VDD) = 5V
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
020406080100
LOAD CAPACITANCE (CL) (pF)
AMBIENT TEMPERATURE (T A) = +25oC
50
250
200
150
100
SUPPLY VOLTAGE (VDD) = 5V
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
0 20406080100
LOAD CAPACITANCE (CL) (pF)
15V
10V
7-69
CD4013BMS
Chip Dimensions and Pad Layout
Dimension in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
FIGURE 8. TYPICAL MAXIMUM CLOCK FREQUENCY vs
SUPPLY VOLTAGE FIGURE 9. TYPICAL POWER DISSIPATION vs FREQUENCY
Typical Performance Characteristics (Continued)
AMBIENT TEMPERATURE (T A) = +25oC
CLOCK FREQUENCY (fCL) (MHz)
tr, tf = 5ns
CL = 50pF
30
25
20
15
10
5
0 5 10 15 20
SUPPLY VOLTAGE (VDD) (V)
SUPPLY VOLTAGE
(VDD) = 15V
10V
10V
5V
AMBIENT TEMPERATURE (T A) = +25oC
INPUT tr = tf = 20ns
1
2
4
6
8
10
2
4
6
8
102
2
4
6
8
103
2
4
6
8
104
DISSIPATION PER DEVICE (PD) (µW)
1022468
1032468
1042468
1052468
1062468
INPUT FREQUENCY (ft) (HZ)
CL = 50pF
CL = 15pF
CONTACT YOUR LOCAL SALES OFFICE FOR
METALLIZATION: Thickness: 11kÅ−14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
70
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable . However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use . No license is g r anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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P. O. Box 883, Mail Stop 53-204
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TEL: (321) 724-7000
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FAX: (886) 2 2715 3029
CD4013BMS
File Number
