SN54AHCT541, SN74AHCT541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS269O – DECEMBER 1995 – REVISED JULY 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Inputs Are TTL-Voltage Compatible
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description/ordering information
The ’AHCT541 octal buffers/drivers are ideal for
driving bus lines or buffer memory address
registers. These devices feature inputs and
outputs on opposite sides of the package to
facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all corresponding
outputs are in the high-impedance state. The
outputs provide noninverted data when they are
not in the high-impedance state.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP – N Tube SN74AHCT541N SN74AHCT541N
SOIC DW
Tube SN74AHCT541DW
AHCT541
SOIC
–
DW
Tape and reel SN74AHCT541DWR
AHCT541
40°Cto85°C
SOP – NS Tape and reel SN74AHCT541NSR AHCT541
–
40°C
to
85°C
SSOP – DB Tape and reel SN74AHCT541DBR HB541
TSSOP PW
Tube SN74AHCT541PW
HB541
TSSOP
–
PW
Tape and reel SN74AHCT541PWR
HB541
TVSOP – DGV Tape and reel SN74AHCT541DGVR HB541
CDIP – J Tube SNJ54AHCT541J SNJ54AHCT541J
–55°C to 125°CCFP – W Tube SNJ54AHCT541W SNJ54AHCT541W
LCCC – FK Tube SNJ54AHCT541FK SNJ54AHCT541FK
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
SN54AHCT541 ...J OR W PACKAGE
SN74AHCT541 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
Y1
Y2
Y3
Y4
Y5
A3
A4
A5
A6
A7
SN54AHCT541 . . . FK PACKAGE
(TOP VIEW)
A2
A1
OE1
Y7
Y6 OE2
A8
GND
Y8 VCC
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AHCT541, SN74AHCT541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS269O – DECEMBER 1995 – REVISED JULY 2003
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
(each buffer/driver)
INPUTS OUTPUT
OE1 OE2 A Y
L L L L
LLH H
HXX Z
X H X Z
logic diagram (positive logic)
OE1
OE2
To Seven Other Channels
A1 Y1
1
19
218
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN54AHCT541, SN74AHCT541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS269O – DECEMBER 1995 – REVISED JULY 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54AHCT541 SN74AHCT541
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 4.5 5.5 4.5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VIInput voltage 0 5.5 0 5.5 V
VOOutput voltage 0 VCC 0 VCC V
IOH High-level output current –8–8 mA
IOL Low-level output current 8 8 mA
∆t/∆vInput transition rise or fall rate 20 20 ns/V
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C SN54AHCT541 SN74AHCT541
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
VOH
IOH = –50
m
A
45V
4.4 4.5 4.4 4.4
V
V
OH IOH = –8 mA
4
.
5
V
3.94 3.8 3.8
V
VOL
IOL = 50
m
A
45V
0.1 0.1 0.1
V
V
OL IOL = 8 mA
4
.
5
V
0.36 0.44 0.44
V
IIVI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1
m
A
IOZ VO = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5
m
A
ICC VI = VCC or GND, IO = 0 5.5 V 4 40 40
m
A
∆ICC†One input at 3.4 V,
Other inputs at VCC or GND 5.5 V 1.35 1.5 1.5 mA
CiVI = VCC or GND 5 V 2 10 10 pF
CoVO = VCC or GND 5 V 4 pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
†This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
SN54AHCT541, SN74AHCT541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS269O – DECEMBER 1995 – REVISED JULY 2003
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C SN54AHCT541 SN74AHCT541
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
CL=15
p
F
4.1* 6* 1* 6.5* 1 6.5
ns
tPHL
C
L =
15
pF
3.7* 5.5* 1* 6.5* 1 6.5
ns
tPZH
CL=15
p
F
5* 7* 1* 8* 1 8
ns
tPZL
C
L =
15
pF
5* 7* 1* 8* 1 8
ns
tPHZ
CL=15
p
F
4.5* 7* 1* 8* 1 8
ns
tPLZ
C
L =
15
pF
4.5* 7* 1* 8* 1 8
ns
tPLH
CL=50
p
F
6.2 8.5 1 9.5 1 9.5
ns
tPHL
C
L =
50
pF
6 8.5 1 9.5 1 9.5
ns
tPZH
CL=50
p
F
7.5 10 1 12 1 12
ns
tPZL
C
L =
50
pF
7.5 10 1 12 1 12
ns
tPHZ
CL=50
p
F
7 10 1 12 1 12
ns
tPLZ
C
L =
50
pF
7 10 1 12 1 12
ns
tsk(o) CL = 50 pF 1** 1 ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
** On products compliant to MIL-PRF-38535, this parameter does not apply.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load, f = 1 MHz 12 pF
SN54AHCT541, SN74AHCT541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS269O – DECEMBER 1995 – REVISED JULY 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
3 V
0 V
50% VCC
50% VCC
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
W aveform 1
S1 at VCC
(see Note B)
Output
W aveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈VCC
0 V
50% VCC VOL + 0.3 V
50% VCC ≈0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
TEST S1
3 V
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
From Output
Under Test CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
S1 VCC
RL = 1 kΩGND
From Output
Under Test CL
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
VOH – 0.3 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V1.5 V 1.5 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 5-Sep-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9685801Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-9685801QRA ACTIVE CDIP J 20 1 TBD Call TI Call TI
5962-9685801QSA ACTIVE CFP W 20 1 TBD Call TI Call TI
SN74AHCT541DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI
SN74AHCT541DBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74AHCT541NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74AHCT541NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541PW ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 5-Sep-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74AHCT541PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541PWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI
SN74AHCT541PWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AHCT541PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SNJ54AHCT541FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54AHCT541J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SNJ54AHCT541W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 5-Sep-2011
Addendum-Page 3
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54AHCT541, SN74AHCT541 :
•Catalog: SN74AHCT541
•Enhanced Product: SN74AHCT541-EP, SN74AHCT541-EP
•Military: SN54AHCT541
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74AHCT541DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74AHCT541DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74AHCT541NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74AHCT541PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74AHCT541PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74AHCT541PWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74AHCT541DBR SSOP DB 20 2000 367.0 367.0 38.0
SN74AHCT541DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74AHCT541NSR SO NS 20 2000 367.0 367.0 45.0
SN74AHCT541PWR TSSOP PW 20 2000 364.0 364.0 27.0
SN74AHCT541PWR TSSOP PW 20 2000 367.0 367.0 38.0
SN74AHCT541PWRG4 TSSOP PW 20 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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