LM25011MY/NOPB - NATIONAL SEMICONDUCTOR

RFB2

LM25011

BST CBST

VIN

6V to 42V

Input

CIN

CSS

SGND

PGD CSG

RPGD

VPGD COUT

RFB1

VOUT

Power

Good

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

LM25011, LM25011-Q1, LM25011A, LM25011A-Q1 42-V 2-A Constant On-Time Switching

Regulator With Adjustable Current Limit

1 Features

1• LM25011-Q1 is an Automotive Grade Product that

is AEC-Q100 Grade 1 Qualified (–40°C to +125°C

Operating Junction Temperature)

• LM25011A Allows Low-Dropout Operation at High

Switching Frequency

• Input Operating Voltage Range: 6 V to 42 V

• Absolute Maximum Input Rating: 45 V

• Integrated 2-A N-Channel Buck Switch

• Adjustable Current Limit Allows for Smaller

Inductor

• Adjustable Output Voltage from 2.51 V

• Minimum Ripple Voltage at VOUT

• Power Good Output

• Switching Frequency Adjustable to 2 MHz

• COT Topology Features:

– Switching Frequency Remains Nearly

Constant with Load Current and Input Voltage

Variations

– Ultra-Fast Transient Response

– No Loop Compensation Required

– Stable Operation with Ceramic Output

Capacitors

– Allows for Smaller Output Capacitor and

Current Sense Resistor

• Adjustable Soft-Start Timing

• Thermal Shutdown

• Precision 2% Feedback Reference

• Package: 10-Pin, HVSSOP

• Create a Custom Design Using the LM25011

Family with the WEBENCH Power Designer

2 Applications

• Automotive Safety

• Infotainment

• Telecommunication

• Front Camera

3 Description

The LM25011 constant on-time step-down switching

regulator features all the functions needed to

implement a low-cost, efficient, buck bias regulator

capable of supplying up to 2 A of load current. This

high-voltage regulator contains an N-Channel Buck

switch, a startup regulator, current limit detection, and

internal ripple control. The constant on-time

regulation principle requires no loop compensation,

results in fast load transient response, and simplifies

circuit implementation. The operating frequency

remains constant with line and load. The adjustable

valley current limit detection results in a smooth

transition from constant voltage to constant current

mode when current limit is reached, without the use

of current limit foldback. The PGD output indicates

the output voltage has increased to within 5% of the

expected regulation value. Additional features

include: Low output ripple, VIN under-voltage lock-

out, adjustable soft-start timing, thermal shutdown,

gate drive pre-charge, gate drive under-voltage lock-

out, and maximum duty cycle limit.

The LM25011A has a shorter minimum off-time than

the LM25011, which allows for higher frequency

operation at low input voltages.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

LM25011 / -Q1 HVSSOP (10) 3.00 mm × 3.00 mm

LM25011A / -Q1

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Typical Application

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ..................................... 4

6.2 Handling Ratings: LM25011...................................... 4

6.3 Handling Ratings: LM25011-Q1................................ 4

6.4 Recommended Operating Conditions....................... 4

6.5 Thermal Information.................................................. 5

6.6 Electrical Characteristics........................................... 6

6.7 Typical Characteristics.............................................. 7

7 Detailed Description............................................ 10

7.1 Overview................................................................. 10

7.2 Functional Block Diagram....................................... 10

7.3 Feature Description................................................. 10

7.4 Device Functional Modes........................................ 15

8 Application and Implementation ........................ 16

8.1 Application Information............................................ 16

8.2 Typical Application.................................................. 16

9 Power Supply Recommendations...................... 23

10 Layout................................................................... 23

10.1 Layout Guidelines ................................................. 23

10.2 Layout Example .................................................... 23

10.3 Power Dissipation ................................................. 23

11 Device and Documentation Support................. 24

11.1 Custom Design with WEBENCH Tools................. 24

11.2 Receiving Notification of Documentation Updates 24

11.3 Related Links ........................................................ 24

11.4 Trademarks........................................................... 24

11.5 Electrostatic Discharge Caution............................ 24

11.6 Glossary................................................................ 24

12 Mechanical, Packaging, and Orderable

Information........................................................... 24

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (February 2013) to Revision H Page

• Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device

Functional Modes,Application and Implementation section, Power Supply Recommendations section, Layout

section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information

section ................................................................................................................................................................................... 1

Changes from Revision F (February 2013) to Revision G Page

• Changed layout of National Semiconductor Data Sheet to TI format .................................................................................. 23

BST

CSG

VIN

PGD

SGND

Exposed Pad on Bottom

Connect to Ground

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

www.ti.com

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

5 Pin Configuration and Functions

10-Pin

HVSSOP Package

Top View

Pin Functions

PIN I/O DESCRIPTION APPLICATION INFORMATION

NUMBER NAME

1 VIN I Input supply voltage Operating input range is 6 V to 42 V. Transient capability is 45 V.

A low ESR capacitor must be placed as close as possible to the

VIN and SGND pins.

2 RT I On-time Control An external resistor from VIN to this pin sets the buck switch on-

time and the switching frequency.

3 PGD – Power Good Logic output indicates when the voltage at the FB pin has

increased to above 95% of the internal reference voltage.

Hysteresis is provided. An external pull-up resistor to a voltage

less than 7 V is required.

4 SS I Soft-Start An internal current source charges an external capacitor to

provide the soft-start function.

5 SGND Signal Ground Ground for all internal circuitry other than the current limit sense

circuit.

6 FB I Feedback Internally connected to the regulation comparator. The regulation

level is 2.51 V.

7 CSG – Current Sense Ground Ground connection for the current limit sensing circuit. Connect to

ground and to the current sense resistor.

8 CS I Current sense Connect to the current sense resistor and the anode of the free-

wheeling diode.

9 SW O Switching Node Internally connected to the buck switch source. Connect to the

external inductor, cathode of the free-wheeling diode, and

bootstrap capacitor.

10 BST I Bootstrap capacitor connection of

the buck switch gate driver. Connect a 0.1-µF capacitor from SW to this pin. The capacitor is

charged during the buck switch off-time via an internal diode.

- EP – Exposed Pad Exposed pad on the underside of the package. This pad should

be soldered to the PC board ground plane to aid in heat

dissipation.

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

(1) Absolute Maximum Ratings(1) are limits beyond which damage to the device may occur. Recommended Operating Conditions are

conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical

Characteristics .

6 Specifications

6.1 Absolute Maximum Ratings(1)

MIN MAX UNIT

VIN to SGND (TJ= 25°C) 45 V

BST to SGND 52 V

SW to SGND (Steady State) –1.5 45 V

BST to SW –0.3 7 V

CS to CSG –0.3 0.3 V

CSG to SGND –0.3 0.3 V

PGD to SGND –0.3 7 V

SS to SGND –0.3 3 V

RT to SGND –0.3 1 V

FB to SGND –0.3 7 V

For soldering specs, see www.ti.com/packaging.

Junction Temperature 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 Handling Ratings: LM25011 MIN MAX UNIT

Tstg Storage temperature range –65 150 °C

V(ESD) Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001,

all pins(1) 2000

Charged device model (CDM), per JEDEC specification

JESD22-C101, all pins(2) 750

(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Handling Ratings: LM25011-Q1 MIN MAX UNIT

Tstg Storage temperature range –65 150 °C

V(ESD) Electrostatic discharge

Human body model (HBM), per AEC Q100-002(1) 2000

Charged device model (CDM), per

AEC Q100-011

Corner pins (1, 5, 6,

and 10) 750

Other pins 750

(1) Absolute Maximum Ratings(1) are limits beyond which damage to the device may occur. Recommended Operating Conditions are

conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical

Characteristics .

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

MIN MAX UNIT

VIN Voltage 6.0 42 V

Junction Temperature –40 125 °C

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

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SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

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(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Thermal Information

THERMAL METRIC(1) HVSSOP (DGQ) UNIT

10 PINS

RθJA Junction-to-ambient thermal resistance 48

°C/W

RθJC(top) Junction-to-case (top) thermal resistance 54.3

RθJB Junction-to-board thermal resistance 34.2

ψJT Junction-to-top characterization parameter 4.0

ψJB Junction-to-board characterization parameter 33.9

RθJC(bot) Junction-to-case (bottom) thermal resistance 10

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

(1) Current flow out of a pin is indicated as a negative number.

(2) All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying

statistical process control.

(3) The junction temperature (TJin °C) is calculated from the ambient temperature (TAin °C) and power dissipation (PDin watts) as follows:

TJ= TA+ (PD× RθJA ) where RθJA (in °C/W) is the package thermal impedance provided in the Thermal Information section.

6.6 Electrical Characteristics

Typical values correspond to TJ= 25°C. Minimum and maximum limits apply over –40°C to 125°C junction temperature range

unless otherwise stated. Unless otherwise stated, the following conditions apply: VIN = 12 V, RT= 50 kΩ.(1) (2) (3)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

INPUT (VIN PIN)

IIN Input operating current Non-switching, FB = 3 V 1200 1600 µA

UVLOVIN VIN undervoltage lock-out threshold VIN increasing 4.6 5.3 5.9 V

VIN undervoltage lock-out threshold hysteresis 200 mV

SWITCH CHARACTERISTICS

RDS(ON) Buck Switch RDS(ON) ITEST = 200 mA 0.3 0.6 Ω

UVLOGD Gate Drive UVLO BST-SW 2.4 3.4 4.4 V

UVLOGD Hysteresis 350 mV

Pre-charge switch voltage ITEST = 10 mA into SW pin 1.4 V

Pre-charge switch on-time 120 ns

SOFT-START PIN

VSS Pullup voltage 2.51 V

ISS Internal current source 10 µA

VSS-SH Shutdown threshold 70 140 mV

CURRENT LIMIT

VILIM Threshold voltage at CS –146 –130 –115 mV

CS bias current FB = 3 V –120 µA

CSG bias current FB = 3 V –35 µA

ON TIMER, RT PIN

tON - 1 On-time VIN = 12 V, RT= 50 kΩ150 200 250 ns

tON - 2 On-time VIN = 32 V, RT= 50 kΩ75 ns

tON - 3 On-time (current limit) LM25011 VIN = 12 V, RT= 50 kΩ100 ns

tON - 3 On-time (current limit) LM25011A VIN = 12 V, RT= 50 kΩ200 ns

tON - 4 On-time VIN = 12 V, RT= 301 kΩ1020 ns

tON - 5 On-time VIN = 9 V, RT= 30.9 kΩ130 171 215 ns

tON - 6 On-time VIN = 12 V, RT= 30.9 kΩ105 137 170 ns

tON - 7 On-time VIN = 16 V, RT= 30.9 kΩ79 109 142 ns

OFF TIMER

tOFF Minimum off-time (LM25011) 90 150 208 ns

Minimum off-time (LM25011A) 52 75 93

REGULATION COMPARATOR (FB PIN)

VREF FB regulation threshold SS pin = steady state 2.46 2.51 2.56 V

FB bias current FB = 3 V 100 nA

POWER GOOD (PGD PIN)

Threshold at FB, with respect to VREF FB increasing 91% 95%

Threshold hysteresis 3.3%

PGDVOL Low state voltage IPGD = 1 mA, FB = 0 V 125 180 mV

PGDLKG Off state leakage VPGD = 7 V, FB = 3 V 0.1 µA

THERMAL SHUTDOWN

TSD Thermal shutdown Junction temperature increasing 155 °C

Thermal shutdown hysteresis 20 °C

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

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SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

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6.7 Typical Characteristics

Figure 1. Efficiency (Circuit of Figure 19) Figure 2. Efficiency at 2 MHz

Figure 3. On-Time vs VIN and RTFigure 4. Voltage at the RT Pin

Figure 5. Shutdown Current into VIN Figure 6. Operating Current into VIN

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

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Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

Typical Characteristics (continued)

Figure 7. PGD Low Voltage vs Sink Current Figure 8. Reference Voltage vs Temperature

Figure 9. Current Limit Threshold vs Temperature Figure 10. Operating Current vs Temperature

Figure 11. VIN UVLO vs Temperature Figure 12. SS Pin Shutdown Threshold vs Temperature

-40 -20 0 20 40 60 80 100 120

110

130

150

170

190

MINIMUM OFF-TIME (ns)

JUNCTION TEMPERATURE (°C)

LM25011A

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

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SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

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Typical Characteristics (continued)

Figure 13. On-Time vs Temperature Figure 14. Minimum Off-Time vs Temperature

VIN

BST

CBST

LEVEL

SHIFT

ON TIMER

FINISH START

LOGIC

Gate Drive

UVLO

5V REGULATOR

Input CL

2.5V

REGULATION

COMPARATOR

LM25011(A)

CURRENT

LIMIT COMPARATOR

FINISH

START

OFF TIMER THERMAL

SHUTDOWN

FCIC

CONTROL

PGD

2.375V

0.8V

RPGD

CSG

Power

Good 125 mV

UVLO

SGND

CURRENT LIMIT

THRESHOLD

6V to 42V

CBYP

CIN

CSS

COUT

VOUT

RFB2

Pre-Chg

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

7 Detailed Description

7.1 Overview

The LM25011 constant on-time step-down switching regulator features all the functions needed to implement a

low-cost, efficient buck bias power converter capable of supplying up to 2.0 A to the load. This high-voltage

regulator contains an N-Channel buck switch, is easy to implement, and is available in a 10-pin VSSOP,

PowerPAD power enhanced package. The operation of the regulator is based on a constant on-time control

principle with the on-time inversely proportional to the input voltage. This feature results in the operating

frequency remaining relatively constant with load and input voltage variations. The constant on-time feedback

control principle requires no loop compensation resulting in very fast load transient response. The adjustable

valley current limit detection results in a smooth transition from constant voltage to constant current when current

limit is reached. To aid in controlling excessive switch current due to a possible saturating inductor, the on-time is

reduced by approximately 40% when the current limit is detected. The Power Good output (PGD pin) indicates

when the output voltage is within 5% of the expected regulation voltage.

The LM25011 can be implemented to efficiently step-down higher voltages in non-isolated applications.

Additional features include: low output ripple, VIN under-voltage lock-out, adjustable soft-start timing, thermal

shutdown, gate drive pre-charge, gate drive under-voltage lock-out, and maximum duty-cycle limit.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Control Circuit Overview

The LM25011 buck regulator employs a control principle based on a comparator and a one-shot on-timer, with

the output voltage feedback (FB) compared to an internal reference (2.51 V). If the FB voltage is below the

reference, the internal buck switch is switched on for the one-shot timer period which is a function of the input

voltage and the programming resistor (RT). Following the on-time, the switch remains off until the FB voltage falls

below the reference, but never less than the minimum off-time forced by the off-time one-shot timer. When the

FB pin voltage falls below the reference and the off-time one-shot period expires, the buck switch is then turned

on for another on-time one-shot period.

RT = VOUT - (VIN x FS x 15 ns)

FS x 4.1 x 10-11 - 500:

tON = (VIN)

4.1 x 10-11 x (RT + 500:) + 15 ns

FS = VOUT2 x L1 x 1.19 x 1021

RL x RT2

DC = tON

tON + tOFF =

= tON x FSVOUT

VIN

FS = VOUT

(4.1 x 10-11 x (RT + 0.5k)) + (VIN x 15 ns)

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

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SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

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Feature Description (continued)

When in regulation, the LM25011 operates in continuous conduction mode at heavy load currents and

discontinuous conduction mode at light load currents. In continuous conduction mode, the inductor current is

always greater than zero and the operating frequency remains relatively constant with load and line variations.

The minimum load current for continuous conduction mode is one-half of the ripple current amplitude of the

inductor. The approximate operating frequency is calculated as follows:

(1)

The buck switch duty cycle is approximately equal to:

(2)

When the load current is less than one-half of the ripple current amplitude of the inductor, the circuit operates in

discontinuous conduction mode. The off-time is longer than in continuous conduction mode while the inductor

current is zero, causing the switching frequency to reduce as the load current is reduced. Conversion efficiency is

maintained at light loads because the switching losses are reduced with the reduction in load and frequency. The

approximate discontinuous operating frequency can be calculated as follows:

(3)

where RL= the load resistance, and L1 is the inductor in the circuit.

The output voltage is set by the two feedback resistors (RFB1, RFB2 in the Functional Block Diagram ). The

regulated output voltage is calculated as follows:

VOUT = 2.51 V × (RFB1 + RFB2) / RFB1 (4)

Ripple voltage, which is required at the input of the regulation comparator for proper output regulation, is

generated internally in the LM25011, and externally when the LM25011A is used. In the LM25011 the ERM

(emulated ripple mode) control circuit generates the required internal ripple voltage from the ripple waveform at

the CS pin. The LM25011A, which is designed for higher frequency operation, requires additional ripple voltage

which must be generated externally and provided to the FB pin. This is described in the Application and

Implementation section.

7.3.2 On-Time Timer

The on-time for the LM25011/LM25011A is determined by the RTresistor and the input voltage (VIN), calculated

from:

(5)

The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific

continuous conduction mode switching frequency (FS), the RTresistor is determined from the following:

(6)

The on-time must be chosen greater than 90 ns for proper operation. Equation 1,Equation 5, and Equation 6 are

valid only during normal operation; that is, the circuit is not in current limit. When the LM25011 operates in

current limit, the on-time is reduced by approximately 40% (this feature is not present in LM25011A). This feature

reduces the peak inductor current which may be excessively high if the load current and the input voltage are

simultaneously high. This feature operates on a cycle-by-cycle basis until the load current is reduced and the

Current

LimitThreshold

Normal

Operation

Load

Current

Increases Current

Limited

Inductor

Current

Decreases

Load Current Normal

Operation

Voltage at the FB Pin

2.51V

Voltage at the CS Pin

IPK

IO1

IO2

IOCL

LM25011

LM25011-Q1

LM25011A

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Feature Description (continued)

output voltage resumes its normal regulated value. The maximum continuous current into the RT pin must be

less than 2 mA. For high-frequency applications, the maximum switching frequency is limited at the maximum

input voltage by the minimum on-time one-shot period (90 ns). At minimum input voltage the maximum switching

frequency is limited by the minimum off-time one-shot period which, if reached, prevents achievement of the

proper duty cycle.

7.3.3 Current Limit

Current limit detection occurs during the off-time by monitoring the voltage across the external current sense

resistor RS. Referring to the Functional Block Diagram , during the off-time the recirculating current flows through

the inductor, through the load, through the sense resistor, and through D1 to the inductor. If the voltage across

the sense resistor exceeds the threshold (VILIM), the current limit comparator output switches to delay the start of

the next on-time period. The next on-time starts when the recirculating current decreases such that the voltage

across RSreduces to the threshold and the voltage at FB is below 2.51 V. The operating frequency is typically

lower due to longer-than-normal off-times. When current limit is detected, the on-time is reduced by

approximately 40% (only in LM25011) if the voltage at the FB pin is below its threshold when the voltage across

RSreduces to its threshold (VOUT is low due to current limiting).

Figure 15 illustrates the inductor current waveform during normal operation and in current limit. During the first

normal operation, the load current is I01, the average of the inductor current waveform. As the load resistance is

reduced, the inductor current increases until the lower peak of the inductor ripple current exceeds the threshold.

During the current limited portion of Figure 15, each on-time is reduced by approximately 40%, resulting in lower

ripple amplitude for the inductor current. During this time the LM25011 is in a constant-current mode with an

average load current equal to the current limit threshold plus half the ripple amplitude (IOCL), and the output

voltage is below the normal regulated value. Normal operation resumes when the load current is reduced (to IO2),

allowing VOUT and the on-time to return to their normal values. Note that in the second period of normal

operation, even though the peak current of the inductor exceeds the current limit threshold during part of each

cycle, the circuit is not in current limit because the inductor current falls below the current limit threshold during

each off-time. The peak current allowed through the buck switch is 3.5 A and the maximum allowed average

current is 2.0 A.

Figure 15. Normal and Current Limit Operation

Voltage

at CS

VRIPPLE

tOFF tON

Inductor

Current 'I

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LM25011-Q1

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Feature Description (continued)

7.3.4 Ripple Requirements

The LM25011 requires about 25 mVP-P of ripple voltage at the CS pin. Higher switching frequencies may require

more ripple. That ripple voltage is generated by the decreasing recirculating current (the inductor ripple current)

through RSduring the off-time. See Figure 16.

Figure 16. CS Pin Waveform

The ripple voltage is equal to:

VRIPPLE =ΔI × RS(7)

where ΔI is the inductor current ripple amplitude, and RSis the current-sense resistor at the CS pin.

More ripple can be achieved by decreasing the inductor value.

The LM25011A, with its shorter minimum off-time, typically will require more ripple than the LM25011. An

external circuit to increase the effective ripple voltage may be needed. Different methods of generating this ripple

are explained in the External Components section.

7.3.5 N-Channel Buck Switch and Driver

The LM25011 integrates an N-Channel buck switch and associated floating high-voltage gate driver. The gate

driver circuit works in conjunction with an external bootstrap capacitor (CBST) and an internal high-voltage diode.

A 0.1-µF capacitor connected between BST and SW provides the supply voltage for the driver during the on-

time. During each off-time, the SW pin is at approximately –1 V, and CBST is recharged from the internal 5-V

regulator for the next on-time. The minimum off-time ensures a sufficient time each cycle to recharge the

bootstrap capacitor.

In applications with relatively high output voltage and low minimum load current, the internal pre-charge device of

the LM25011 may not pull the SW pin sufficiently low during the off-time to maintain the voltage on the bootstrap

capacitor. If the bootstrap capacitor (CBST) discharges during the long off-times, and the regulator will cycle on

and off at a low frequency. Decreasing the values of the feedback resistors RFB1 and RFB2 to provide a minimum

load of typically 1mA at nominal VOUT will increase the minimum switching frequency and maintain sufficient

bootstrap capacitor voltage.

7.3.6 Soft-Start

The soft-start feature allows the converter to gradually reach a steady-state operating point, thereby reducing

startup stresses and current surges. Upon turn-on, when VIN reaches its undervoltage lock-out threshold an

internal 10-µA current source charges the external capacitor at the SS pin to 2.51 V (t1 in Figure 17). The

ramping voltage at SS ramps the non-inverting input of the regulation comparator and the output voltage, in a

controlled manner. For proper operation, the soft-start capacitor should be no smaller than 1000 pF.

UVLO

VIN

SW Pin

Inductor

Current

SS Pin

PGD

VOUT

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LM25011-Q1

LM25011A

LM25011A-Q1

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Feature Description (continued)

The LM25011 can be employed as a tracking regulator by applying the controlling voltage to the SS pin. The

output voltage of the regulator tracks the applied voltage, gained up by the ratio of the feedback resistors. The

applied voltage at the SS pin must be within the range of 0.5 V to 2.6 V. The absolute maximum rating for the SS

pin is 3.0 V. If the tracking function causes the voltage at the FB pin to go below the thresholds for the PGD pin,

the PGD pin will switch low (see the Power Good Output (PGD) section). An internal switch grounds the SS pin if

the input voltage at VIN is below its undervoltage lock-out threshold or if the thermal shutdown activates. If the

tracking function (described above) is used, the tracking voltage applied to the SS pin must be current limited to

a maximum of 1 mA.

Figure 17. Startup Sequence

7.3.7 Power Good Output (PGD)

The Power Good output (PGD) indicates when the voltage at the FB pin is close to the internal 2.51-V reference

voltage. The rising threshold at the FB pin for the PGD output to switch high is 95% of the internal reference. The

falling threshold for the PGD output to switch low is approximately 3.3% below the rising threshold.

The PGD pin is internally connected to the drain of an N-channel MOSFET switch. An external pull-up resistor

(RPGD), connected to an appropriate voltage not exceeding 7 V, is required at PGD to indicate the LM25011

status to other circuitry. When PGD is low, the pin voltage is determined by the current into the pin. See Figure 7,

PGD Low Voltage vs Sink Current.

RUN

LM25011

CSS

STOP

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

www.ti.com

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

Feature Description (continued)

Upon powering up the LM25011, the PGD pin is high until the voltage at VIN reaches 2 V, at which time PGD

switches low. As VIN is increased, PGD stays low until the output voltage takes the voltage at the FB pin above

95% of the internal reference voltage, at which time PGD switches high. As VIN is decreased (during shutdown),

PGD remains high until either the voltage at the FB pin falls below approximately 92% of the internal reference or

when VIN falls below its lower UVLO threshold, whichever occurs first. PGD then switches low, and remains low

until VIN falls below 2 V, at which time PGD switches high. If the LM25011 is used as a tracking regulator (see

the Soft-Start section), the PGD output is high as long as the voltage at the FB pin is above the thresholds

mentioned above.

7.3.8 Thermal Shutdown

The LM25011 should be operated so the junction temperature does not exceed 125°C. If the junction

temperature increases above that, an internal thermal shutdown circuit activates (typically) at 155°C, taking the

controller to a low-power reset state by disabling the buck switch and taking the SS pin to ground. This feature

helps prevent catastrophic failures from accidental device overheating. When the junction temperature decreases

below 135°C (typical hysteresis = 20°C), normal operation resumes.

7.4 Device Functional Modes

7.4.1 Shutdown Function

The SS pin can be used to shutdown the LM25011 by grounding the SS pin as shown in Figure 18. Releasing

the pin allows normal operation to resume.

Figure 18. Shutdown Implementation

L1 10 PH

CSS

CIN CBYP

118 k:

10 k:

0.022 PF

80 m:

LM25011

BST

VIN

SGND

PGD CSG

8V to 36V

Input

4.7 PF0.1 PF

RPGD

VPGD

Power

Good

4.99 k:

RFB2

CBST

COUT

RFB1

VOUT

4.99 k:

0.1 PF

10 PF

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LM25011/LM25011-Q1 is a non-synchronous buck regulator designed to operate over a wide input voltage

range and output current. Spreadsheet-based quick-start calculation tools and the on-line WEBENCH®software

can be used to create a buck design with the bill of materials, estimated efficiency, and the complete solution

cost.

8.2 Typical Application

8.2.1 LM25011 Example Circuit

The final circuit is shown in Figure 19, and its performance is shown in Figure 20 and Figure 21. The current limit

measures approximately 1.62 A at VIN = 8 V, and 1.69 A at VIN = 36 V.

Figure 19. Example Circuit

8.2.1.1 Design Requirements

Table 1 shows the design parameters.

Table 1. Design Parameters

DESIGN PARAMETER VALUE

Input voltage range 8 V to 36 V

Output voltage 5 V

Maximum load current (IOUT(max)) 1.5 A

Minimum load current (IOUT(min)) 300 mA

Switching frequency (FSW) 1 MHz

Soft-start time 5 ms

RT = 5 - (8V x 1MHz x 15 ns)

1MHz x 4.1 x 10-11 - 500:= 118.5 k:

tOFF(min) = VIN(min) - VOUT

VIN(min) x FS= 375 ns

8V - 5V

8V x 1 MHz

tON(min) = VOUT

VIN(max) x FS= 139 ns

36V x 1 MHz

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

www.ti.com

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Custom Design with WEBENCH Tools

Click here to create a custom design using the LM25011 device with the WEBENCH®Power Designer.

1. Start by entering your VIN, VOUT and IOUT requirements.

2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and

compare this design with other possible solutions from Texas Instruments.

3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real

time pricing and component availability.

4. In most cases, you will also be able to:

– Run electrical simulations to see important waveforms and circuit performance,

– Run thermal simulations to understand the thermal performance of your board,

– Export your customized schematic and layout into popular CAD formats,

– Print PDF reports for the design, and share your design with colleagues.

5. Get more information about WEBENCH tools at www.ti.com/webench.

8.2.1.2.2 External Components

The procedure for calculating the external components is illustrated with a design example using the LM25011.

Referring to the Functional Block Diagram , the circuit is to be configured for the following specifications:

• VOUT =5V

• VIN =8Vto36V

• Minimum load current for continuous conduction mode IOUT(min) = 300 mA

• Maximum load current IOUT(max) = 1.5 A

• Switching frequency (FSW) = 1.0 MHz

• Soft-start time = 5 ms

RFB2 and RFB1:These resistors set the output voltage, and their ratio is calculated from:

RFB2/RFB1 = (VOUT / 2.51 V) – 1 (8)

For this example, RFB2/RFB1 = 0.992. RFB1 and RFB2 should be chosen from standard value resistors in the range

of 1.0 kΩto 10 kΩwhich satisfy the above ratio. For this example, 4.99 kΩis chosen for both resistors, providing

a 5.02-V output.

RT:This resistor sets the on-time and (by default) the switching frequency. First check that the desired frequency

does not require an on-time or off-time shorter than the minimum allowed values (90 ns and 150, respectively).

The minimum on-time occurs at the maximum input voltage. For this example:

(9)

The minimum off-time occurs at the minimum input voltage. For this example:

(10)

Both the on-time and off-time are acceptable because they are significantly greater than the minimum value for

each. The RTresistor is calculated from Equation 6 using the minimum input voltage:

(11)

A standard value 118-kΩresistor is selected. The minimum on-time calculates to 152 ns at VIN = 36 V, and the

maximum on-time calculates to 672 ns at VIN = 8 V.

Duty Cycle = D = == 13.9%

VOUT

VIN

36V

L1(min) = tON(min) x (VIN(max) - VOUT)

IOR(max) = 7.85 PH

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

L1: The parameters controlled by the inductor are the inductor current ripple amplitude (IOR), and the ripple

voltage amplitude across the current sense resistor RS. The minimum load current is used to determine the

maximum allowable ripple to maintain continuous conduction mode (the lower peak does not reach 0 mA). This

is not a requirement of the LM25011, but serves as a guideline for selecting L1. For this example, the maximum

ripple current should be less than:

IOR(max) = 2 × IOUT(min) = 600 mAP-P (12)

For applications where the minimum load current is zero, a good starting point for allowable ripple is 20% of the

maximum load current. In this case substitute 20% of IOUT(max) for IOUT(min) in Equation 12. The ripple amplitude

calculated in Equation 12 is then used in Equation 13:

(13)

A standard value 10-µH inductor is chosen. Using this inductor value, the maximum ripple current amplitude,

which occurs at maximum VIN, calculates to 472 mAP-P, and the peak current is 1736 mA at maximum load

current. Ensure the selected inductor is rated for this peak current. The minimum ripple current, which occurs at

minimum VIN, calculates to 200 mAP-P.

RS:The minimum current limit threshold is calculated at maximum load current using the minimum ripple current

calculated above. The current limit threshold is the lower peak of the inductor current waveform when in current

limit (see Figure 15).

ILIM = 1.5 A – (0.2 A / 2) = 1.4 A (14)

Current limit detection occurs when the voltage across the sense resistor (RS) reaches the current limit threshold.

To allow for tolerances, the sense resistor value is calculated using the minimum threshold specification:

RS= 115 mV / 1.4 A = 82 mΩ(15)

The next smaller standard value, 80 mΩ, is selected. The next step is to ensure that sufficient ripple voltage

occurs across RSwith this value sense resistor. As mentioned in the Ripple Requirements section, a minimum of

15-mVP-P voltage ripple is required across the RSsense resistor during the off-time to ensure the regulation

circuit operates properly. The ripple voltage is the product of the inductor ripple current amplitude and the sense

resistor value. In this case, the minimum ripple voltage calculates to:

VRIPPLE =ΔI × RS= 200 mA × 0.080 Ω= 16 mV (16)

If the ripple voltage had calculated to less than 15 mVP-P, the inductor value would have to be reduced to

increase the ripple current amplitude. This would have required a recalculation of ILIM and RSin the above

equations. Because the minimum requirement is satisfied in this case, no change is necessary.

The nominal current limit threshold calculates to 1.63 A. The minimum and maximum thresholds calculate to 1.44

A and 1.83 A, respectively, using the minimum and maximum limits for the current limit threshold specification.

The load current is equal to the threshold current plus one-half of the ripple current. Under normal load

conditions, the maximum power dissipation in RSoccurs at maximum load current, and at maximum input voltage

where the on-time duty cycle is minimum. In this design example, the minimum on-time duty cycle is:

(17)

At maximum load current, the power dissipation in RSis equal to:

P(RS) = (1.5 A)2× 0.080 Ω× (1 – 0.139) = 155 mW (18)

When in current limit the maximum power dissipation in RScalculates to

P(RS) = (1.83 A + 0.472 A / 4)2× 0.080 Ω= 304 mW (19)

Duty cycle is not included in this power calculation because the on-time duty cycle is typically <5% when in

current limit.

COUT:The output capacitor should typically be no smaller than 3.3 µF, although that is dependent on the

frequency and the desired output characteristics. COUT should be a low ESR good-quality ceramic capacitor.

Experimentation is usually necessary to determine the minimum value for COUT, as the nature of the load may

require a larger value. A load which creates significant transients requires a larger value for COUT than a non-

varying load.

CSS = 2.51V

5 ms x 10 PA= 0.02 PF

CIN = IOUT(max) x tON(max)

'V= 2.02 PF

1.5A x 672 ns

0.5V

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

www.ti.com

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

CIN and CBYP:The purpose of CIN is to supply most of the switch current during the on-time, and limit the voltage

ripple at VIN, because it is assumed the voltage source feeding VIN has some amount of source impedance.

When the buck switch turns on, the current into VIN suddenly increases to the lower peak of the inductor ripple

current, then ramps up to the upper peak, and finally drops to zero at turn-off. The average current during the on-

time is the average load current. For a worst case calculation, CIN must supply this average load current during

the maximum on-time, without letting the voltage at the VIN pin drop below a minimum operating level of 5.5 V.

For this exercise 0.5 V is chosen as the maximum allowed input ripple voltage. Using the maximum load current,

the minimum value for CIN is calculated from:

(20)

where tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN. The purpose of CBYP is to

minimize transients and ringing due to long lead inductance leading to the VIN pin. A low ESR 0.1-µF ceramic

chip capacitor is recommended, and CBYP must be located close to the VIN and SGND pins.

CBST:The recommended value for CBST is 0.1 µF. A high-quality ceramic capacitor with low ESR is

recommended as CBST supplies a surge current to charge the buck switch gate at each turn-on. A low ESR also

helps ensure a complete recharge during each off-time.

CSS:The capacitor at the SS pin determines the soft-start time, that is, the time for the output voltage to reach its

final value (t1 in Figure 17). For a soft-start time of 5 ms, the capacitor value is determined from the following:

(21)

D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high-speed

transitions at the SW pin may affect the regulator operation due to the reverse recovery transients of the diode.

The diode must be rated for the maximum input voltage, the maximum load current, and the peak current which

occurs when the current limit and maximum ripple current are reached simultaneously. The average power

dissipation of the diode is calculated from:

PD1 = VF× IOUT × (1 – D) (22)

where VFis the forward voltage drop of the diode, and D is the on-time duty cycle.

8.2.1.3 Application Curves

Figure 20. Efficiency (Circuit of Figure 19) Figure 21. Frequency vs VIN (Circuit of Figure 19)

Cff > 3 x tON(max)

RFB1//RFB2

R1 = VRIPPLE

COUT

RFB2

RFB1

LM25011A

BST CBST

VOUT

SGND

CSG

R1 = VRIPPLE x (RFB2 + RFB1)

'I x RFB1

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

8.2.2 Output Ripple Control

High frequency applications of the LM25011 or LM25011A are likely to require more ripple voltage than is

internally generated across the RSresistor. Additional ripple can be supplied to the FB pin, in phase with the

switching waveform at the SW pin, for proper operation. The required ripple can be supplied from ripple

generated at VOUT, through the feedback resistors, as described in Option A: Lowest Cost Configuration .Option

B: Intermediate VOUT Ripple Configuration and Option C: Minimum VOUT Ripple Configuration use one or two

additional components to provide ripple at the FB pin with lower output ripple at VOUT.

The amount of additional ripple voltage needed at the FB pin is typically in the range of 30 mV to 150 mV. Higher

switching frequencies or higher inductor values (less ripple current) require more external ripple voltage injected

at the FB pin. Insufficient ripple voltage will result in frequency jitter. For a particular application, add only as

much ripple as needed to stabilize the switching frequency over the required input voltage.

8.2.2.1 Option A: Lowest Cost Configuration

In this configuration R1 is installed in series with the output capacitor (COUT) as shown in Figure 22. The ripple

current of the inductor passes through R1, generating a ripple voltage at VOUT. The minimum value for R1 is:

(23)

where ΔI is the minimum ripple current amplitude, which occurs at minimum VIN, and VRIPPLE is the peak to peak

ripple voltage injected at the FB pin.

Figure 22. Option A – Lowest Cost Ripple Configuration

8.2.2.2 Option B: Intermediate VOUT Ripple Configuration

This configuration generates less ripple at VOUT than Option A by the addition of capacitor (Cff) as shown in

Figure 23.

Because the output ripple is passed by Cff to the FB pin with little or no attenuation, the R1 value and VOUT ripple

can be smaller than in Option A. The minimum value for R1 is calculated from:

(24)

where ΔI is the minimum ripple current amplitude, which occurs at minimum VIN, and VRIPPLE is the peak-to-peak

ripple voltage injected at the FB pin. The minimum value for Cff is calculated from:

(25)

where tON(max) is the maximum on-time (at minimum VIN), and RFB1//RFB2 is the parallel equivalent of the feedback

resistors.

COUT

RFB2

RFB1

LM25011A

BST CBST

VOUT

SGND

CSG

Cff

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

www.ti.com

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

Figure 23. Option B – Intermediate Ripple Configuration

COUT

LM25011A

BST CBST

VOUT

SGND

CSG

Cac

RFB1

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

8.2.2.3 Option C: Minimum VOUT Ripple Configuration

In some applications, the VOUT ripple induced by series resistor R1 may not be acceptable. When low VOUT ripple

is required, an external ripple circuit, as shown in Figure 24, can be used to provide the required ripple at the FB

pin.

1. The time constant Rr × Cr should be more than 8 to 10 times the switching period to generate a triangular

waveform at the junction of Rr, Cr and Cac.

2. The minimum ripple at FB (at minimum VIN) is equal to: VRIPPLE = (VIN(min) – VOUT) × TON(max) / (Rr x Cr).

3. The ripple capacitor Cr should much smaller than the ac coupling capacitor Cac. Typically Cac = 100 nF, Cr

= 1 nF, and Rr is chosen to satisfy conditions 1 and 2 above.

Figure 24. Option C: Minimum Output Ripple Configuration

LIND

CBST

CIN

RFB1

RFB2

CSS

CIN

GND

COUT

OUT

Power Trace

Signal Trace

GND

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

www.ti.com

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

9 Power Supply Recommendations

The LM25011 is designed to operate with an input power supply capable of supplying a voltage range between 6

V and 42 V. The power supply should be well regulated and capable of supplying sufficient current to the

regulator during peak load operation. Also, like in all applications, the power supply source impedance must be

small compared to the module input impedance to maintain the stability of the converter.

10 Layout

10.1 Layout Guidelines

The LM25011 regulation and current limit comparators are very fast, and respond to short-duration noise pulses.

Layout considerations are therefore critical for optimum performance. The layout must be as neat and compact

as possible, and all of the components must be as close as possible to their associated pins. The two major

current loops conduct currents which switch very fast, and therefore those loops must be as small as possible to

minimize conducted and radiated EMI. The first loop is formed by CIN, through the VIN to SW pins, LIND, COUT,

and back to CIN. The second current loop is formed by RS, D1, LIND, COUT, and back to RS. The ground

connection from CSG to the ground end of CIN should be as short and direct as possible.

10.2 Layout Example

Figure 25. Typical Layout

10.3 Power Dissipation

The power dissipation within the LM25011 can be approximated by determining the total conversion loss (PIN –

POUT) of the circuit, and then subtracting the power losses in the free-wheeling diode, the sense resistor, and the

inductor. The power loss in the diode is approximately:

PD1 = IOUT × VF× (1 – D) (26)

where IOUT is the load current, VFis the forward voltage drop of the diode, and D is the on-time duty cycle. The

power loss in the sense resistor is:

PRS = (IOUT)2× RS× (1 – D) (27)

The power loss in the inductor is approximately:

PL1 = IOUT 2× RL× 1.1 (28)

where RLis the dc resistance of the inductor, and the 1.1 factor is an approximation for the ac losses. If it is

expected that the internal dissipation of the LM25011 will produce excessive junction temperatures during normal

operation, good use of the ground plane of the PC board can help to dissipate heat. Additionally the use of wide

PC board traces, where possible, can help conduct heat away from the IC pins. Judicious positioning of the PC

board within the end product, along with the use of any available air flow (forced or natural convection) can help

reduce the junction temperature.

LM25011

LM25011-Q1

LM25011A

LM25011A-Q1

SNVS617H –APRIL 2009–REVISED NOVEMBER 2014

www.ti.com

Product Folder Links: LM25011 LM25011-Q1 LM25011A LM25011A-Q1

11 Device and Documentation Support

11.1 Custom Design with WEBENCH Tools

Click here to create a custom design using the LM25011 device with the WEBENCH®Power Designer.

1. Start by entering your VIN, VOUT and IOUT requirements.

2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and

compare this design with other possible solutions from Texas Instruments.

3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real

time pricing and component availability.

4. In most cases, you will also be able to:

– Run electrical simulations to see important waveforms and circuit performance,

– Run thermal simulations to understand the thermal performance of your board,

– Export your customized schematic and layout into popular CAD formats,

– Print PDF reports for the design, and share your design with colleagues.

5. Get more information about WEBENCH tools at www.ti.com/webench.

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

11.3 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 2. Related Links

PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL

DOCUMENTS TOOLS &

SOFTWARE SUPPORT &

COMMUNITY

LM25011 Click here Click here Click here Click here Click here

LM25011-Q1 Click here Click here Click here Click here Click here

11.4 Trademarks

WEBENCH is a registered trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM25011AMY ACTIVE HVSSOP DGQ 10 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SN9B

LM25011AMYE ACTIVE HVSSOP DGQ 10 250 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SN9B

LM25011AMYX ACTIVE HVSSOP DGQ 10 3500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SN9B

LM25011AQ1MY/NOPB ACTIVE HVSSOP DGQ 10 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SZZA

LM25011AQ1MYX/NOPB ACTIVE HVSSOP DGQ 10 3500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SZZA

LM25011MY/NOPB ACTIVE HVSSOP DGQ 10 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SVUB

LM25011MYX/NOPB ACTIVE HVSSOP DGQ 10 3500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SVUB

LM25011Q1MY/NOPB ACTIVE HVSSOP DGQ 10 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SZFB

LM25011Q1MYX/NOPB ACTIVE HVSSOP DGQ 10 3500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 SZFB

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LM25011, LM25011-Q1 :

•Catalog: LM25011

•Automotive: LM25011-Q1

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM25011AMY HVSSOP DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011AMYE HVSSOP DGQ 10 250 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011AMYX HVSSOP DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011AQ1MY/NOPB HVSSOP DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011AQ1MYX/NOPB HVSSOP DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011MY/NOPB HVSSOP DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011MYX/NOPB HVSSOP DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011Q1MY/NOPB HVSSOP DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM25011Q1MYX/NOPB HVSSOP DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 6-Sep-2019

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM25011AMY HVSSOP DGQ 10 1000 210.0 185.0 35.0

LM25011AMYE HVSSOP DGQ 10 250 210.0 185.0 35.0

LM25011AMYX HVSSOP DGQ 10 3500 367.0 367.0 35.0

LM25011AQ1MY/NOPB HVSSOP DGQ 10 1000 210.0 185.0 35.0

LM25011AQ1MYX/NOPB HVSSOP DGQ 10 3500 367.0 367.0 35.0

LM25011MY/NOPB HVSSOP DGQ 10 1000 210.0 185.0 35.0

LM25011MYX/NOPB HVSSOP DGQ 10 3500 367.0 367.0 35.0

LM25011Q1MY/NOPB HVSSOP DGQ 10 1000 210.0 185.0 35.0

LM25011Q1MYX/NOPB HVSSOP DGQ 10 3500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 6-Sep-2019

Pack Materials-Page 2

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PACKAGE OUTLINE

5.05

4.75 TYP

1.1 MAX

8X 0.5

10X 0.27

0.17

0.23

0.13 TYP

0 - 8 0.15

0.05

1.88

1.58

2.05

1.75

0.25

GAGE PLANE

0.7

0.4

3.1

2.9

NOTE 3

B3.1

2.9

4214864/A 05/2020

PowerPAD - 1.1 mm max heightDGQ0010A

PLASTIC SMALL OUTLINE

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.15 mm per side.

4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.

5. Reference JEDEC registration MO-187, variation BA-T.

PowerPAD is a trademark of Texas Instruments.

110

0.08 C A B

PIN 1 ID

AREA

NOTE 4

SEATING PLANE

0.1 C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 3.700

EXPOSED

THERMAL PAD

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EXAMPLE BOARD LAYOUT

(4.4)

0.05 MAX

ALL AROUND 0.05 MIN

ALL AROUND

10X (1.45)

10X (0.3)

8X (0.5)

(2.2)

NOTE 9

(3.1)

NOTE 9

(1.88)

(2.05)

SOLDER MASK

OPENING

( 0.2) TYP

VIA (1.3) TYP

(1.3)

TYP

(R0.05) TYP

4214864/A 05/2020

PowerPAD - 1.1 mm max heightDGQ0010A

PLASTIC SMALL OUTLINE

SYMM

SEE DETAILS

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

SOLDER MASK

OPENING

METAL COVERED

BY SOLDER MASK

SOLDER MASK

DEFINED PAD

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).

9. Size of metal pad may vary due to creepage requirement.

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

EXPOSED

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL

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EXAMPLE STENCIL DESIGN

10X (1.45)

10X (0.3)

8X (0.5)

(4.4)

(1.88)

(2.05)

BASED ON

0.125 THICK

STENCIL

(R0.05) TYP

4214864/A 05/2020

PowerPAD - 1.1 mm max heightDGQ0010A

PLASTIC SMALL OUTLINE

1.59 X 1.730.175 1.72 X 1.870.150 1.88 X 2.05 (SHOWN)0.125 2.10 X 2.290.1

SOLDER STENCIL

OPENING

STENCIL

THICKNESS

NOTES: (continued)

10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

11. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

EXPOSED PAD

100% PRINTED SOLDER COVERAGE BY AREA

SCALE:15X

SYMM

BASED ON

0.125 THICK

STENCIL

BY SOLDER MASK

METAL COVERED

SEE TABLE FOR

DIFFERENT OPENINGS

FOR OTHER STENCIL

THICKNESSES

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