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FEATURES DESCRIPTION
APPLICATIONS
3
2
4
5
DBV PACKAGE
(TOP VIEW)
1
IN
GND
EN
OUT
NC/FB
TPS72115
0.1 µF 0.1 µF
1.8 V 1.5 V
GND OUTIN
EN
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
LOW INPUT VOLTAGE, CAP FREE 150-mALOW-DROPOUT LINEAR REGULATORS
150-mA LDO
The TPS721xx family of LDO regulators is availablein fixed voltage options that are commonly used toAvailable in 1.5-V, 1.6-V, 1.8-V Fixed-Output
power the latest DSPs and microcontrollers with anand Adjustable (1.2-V to 2.5-V) Versions
adjustable option ranging from 1.22 V to 2.5 V. TheseLow Input Voltage Requirement (Down to
regulators can be used in a wide variety of1.8 V)
applications ranging from portable, battery-poweredSmall Output Capacitor, 0.1-µF
equipment to PC peripherals. The family featuresoperation over a wide range of input voltages (1.8 VDropout Voltage Typically 200 mV at 150 mA
to 5.5 V) and low dropout voltage (150 mV at fullLess Than 1 µA Quiescent Current in
load). Therefore, compared to many other regulatorsShutdown Mode
that require 2.5-V or higher input voltages forThermal Protection
operation, these regulators can be operated directlyfrom two AAA batteries. Also, the typical quiescentOver Current Limitation
current (ground pin current) is low, starting at 85 µA5-Pin SOT-23 (DBV) Package
during normal operation and 1 µA in shutdown mode.These regulators can be operated very efficiently and,in a battery-powered application, help extend thePortable Communication Devices
longevity of the device.Battery Powered Equipment
Similar LDO regulators require 1-µF or larger outputPCMCIA Cards
capacitors for stability. However, this regulator usesan internal compensation scheme that stabilizes thePersonal Digital Assistants
feedback loop over the full range of input voltagesModems
and load currents with output capacitances as low asBar Code Scanners
0.1-µF. Ceramic capacitors of this size are relativelyBackup Power Supplies
inexpensive and available in small footprints.SMPS Post Regulation
This family of regulators is particularly suited as aInternet Audio
portable power supply solution due to its minimalboard space requirement and 1.8-V minimum inputvoltage. Being able to use two off-the-shelf AAAbatteries makes system design easier and alsoreduces component cost. Moreover, the solution willbe more efficient than if a regulator with a higherinput voltage is used.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001–2006, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
PACKAGE DISSIPATION RATING
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
T
J
VOLTAGE PACKAGE PART NUMBER SYMBOL
Adjustable TPS72101DBVT
(1)
TPS72101DBVR
(2)
PEKI1.5 V TPS72115DBVT
(1)
TPS72115DBVR
(2)
PEIISOT-23-40°C to 125°C
(DBV)1.6 V TPS72116DBVT
(1)
TPS72116DBVR
(2)
PHFI1.8 V TPS72118DBVT
(1)
TPS72118DBVR
(2)
PEJI
(1) The DBVT indicates tape and reel of 250 parts.(2) The DBVR indicates tape and reel of 3000 parts.
over operating free-air temperature range unless otherwise noted
(1) (2)
TPS72101, TPS72115,TPS72116, TPS72118
Voltage range at IN -0.3 V to 7 VVoltage range at EN -0.3 V to 7 VVoltage on OUT, FB, NC -0.3 V to V
I
+ 0.3 VPeak output current Internally limitedESD rating, HBM 3 kVContinuous total power dissipation See Dissipation Rating TableOperating junction temperature range, T
J
-40°C to 150°CStorage temperature range, T
stg
-65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.All voltagevalues are with respect to network ground terminal.(2) All voltage values are with respect to network ground terminal.
DERATING FACTOR T
A
25°C T
A
= 70°C T
A
= 85°CBOARD PACKAGE R
ΘJC
R
ΘJA
ABOVE T
A
= 25°C POWER RATING POWER RATING POWER RATING
Low-K
(1)
DBV 65.8 °C/W 259 °C/W 3.9 mW/°C 386 mW 212 mW 154 mWHigh-K
(2)
DBV 65.8 °C/W 180 °C/W 5.6 mW/°C 555 mW 305 mW 222 mW
(1) The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2 ounce copper traces on topof the board.(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power andground planes and 2 ounce copper traces on top and bottom of the board.
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ELECTRICAL CHARACTERISTICS
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
over recommended operating junction temperature range V
IN
= V
OUT(Nom)
+ 1 V, I
OUT
= 1 mA, EN = V
IN
, C
OUT
= 1 µF (unlessotherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage
(1)
1.8 5.5 VV
OUT
Output voltage range TPS72101 1.225 2.5 VI
OUT
Continuous output current 0 150 mAT
J
Operating junction temperature -40 125 °CTPS72101 0 µA < I
OUT
< 150 mA
(1)
1.8 V V
OUT
2.5 V 0.97 V
O
1.03 V
O
T
J
= 25°C 1.5TPS72115
0 µA < I
OUT
< 150 mA 2.5 V V
IN
5.5 V 1.455 1.545V
OUT
Output voltage T
J
= 25°C 1.6 VTPS72116
0 µA < I
OUT
< 150 mA 2.6 V V
IN
5.5 V 1.552 1.648T
J
= 25°C 1.8TPS72118
0 µA < I
OUT
< 150 mA 2.8 V V
IN
5.5 V 1.746 1.854T
J
= 25°C 85
120I
(Q)
Quiescent current (GND current) µAI
OUT
= 150 mA T
J
= 25°C 570I
OUT
= 150 mA 850EN < 0.5 V T
J
= 25°C 0.01Standby current µAEN < 0.5 V 1BW = 200 Hz to 100 kHz, T
JV
n
Output noise voltage TPS72115 C
o
= 1 µF 90 µV= 25°CV
ref
Reference voltage T
J
= 25°C 1.225 Vf = 100 Hz, C
o
= 10 µF, I
OUTPSRR
Ripple rejection T
J
= 25°C; See
(1)
48 dB= 150 mACurrent limit See
(2)
175 525 mAT
J
= 25°C 0.03 0.09Output voltage line regulation
V
O
+ 1 V < V
IN
2.5 V %/V(V
OUT
/V
OUT
)
(1)
0.1Output voltage load
TPS72118 0 < I
OUT
< 150 mA T
J
= 25°C 0.5 mVregulation
V
IH
EN high level input 1.4
VV
IL
EN low level input -0.2 0.4EN = 0 V -0.01I
I
EN input current µAEN = IN -0.01TPS72118 I
OUT
= 150 mA T
J
= 25°C 150V
DO
Dropout voltage
(3)
mVTPS72101 I
OUT
= 150 mA 1.2 V V
O
5.2 V 240I
n
Feedback input current TPS72101 1 µAThermal shutdown temperature 170 °CThermal shutdown hysteresis 20 °C
(1) Minimum IN operating voltage is 1.8 V or V
OUT
+ V
DO
, whichever is greater.(2) Test condition includes output voltage V
O
= 1 V and pulse duration = 10 mS.(3) Dropout voltage is defined as the differential voltage between V
O
and V
I
when V
O
drops 100 mV below the value measured with V
IN
=V
OUT
+ V
DO
.
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TPS72101
OUT
IN
FB
GND
EN Current Limit /
Thermal
Protection
VREF
1.225V
TPS72115/16/18
OUT
IN
GND
EN Current Limit /
Thermal
Protection
NC(A)
VREF
1.225V
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
Figure 1. FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
A. This pin must be left floating and not connected to GND.
Figure 2. FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
Terminal Functions
TERMINAL
DESCRIPTIONNAME NO.
GND 2 GroundEN 3 Enable inputIN 1 Input supply voltageNC/FB 4 NC = Not connected (see
(A)
); FB = Feedback (adjustable option TPS72101)OUT 5 Regulated output voltage
4
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TYPICAL CHARACTERISTICS
1.7995
1.7996
1.7997
1.7998
1.7999
1.8000
1.8001
1.8002
0 30 60 90 120 150
IO − Output Current − mA
− Output Voltage − V
VO
VI = 2.8 V
Co = 1 µF
TJ = 25° C
TJ − Junction Temperature − °C
− Output Voltage − V
VO
IO = 150 mA
IO = 1 mA
VI = 2.8 V
Co = 1 µF
1.7900
1.7920
1.7940
1.7960
1.7980
1.8000
1.8020
1.8040
−40−25−10 5 20 35 50 65 80 95 110 125
f − Frequency − Hz
IO = 1 mA
VI = 2.8 V
Co = 1 µF
IO = 150 mA
Output Impedance −
1
0.1
0.01
1 10 100 1 k 10 k
10
100 k 1 M 10 M
0.001
100
1 k
0
100
300
400
500
600
700
IO − Output Current − mA
Ground Current − Aµ
TJ = 25° C
TJ = 125° C
060 90 120 150
TJ = −40° C
VI = 2.8 V
Co = 1 µF
30
200
0
0.5
1
1.5
2
2.5
100 1 k 10 k 100 k
f − Frequency − Hz
IO = 1 mA
VI = 2.8 V
Co = 1 µF
IO = 150 mA
V/ HzOutput Spectral Noise Density − µ
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
TPS72118 TPS72118 TPS72118OUTPUT VOLTAGE OUTPUT VOLTAGE GROUND CURRENTvs vs vsOUTPUT CURRENT JUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 3. Figure 4. Figure 5.
TPS72118 TPS72118 TPS72118GROUND CURRENT OUTPUT SPECTRAL NOISE OUTPUT IMPEDANCEvs DENSITY vsOUTPUT CURRENT vs FREQUENCYFREQUENCY
Figure 6. Figure 7. Figure 8.
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VO
t − Time − µs
015010050 200 200 350300 400 450 500
− Output Voltage − V
VI = 2.8 V
VO = 1.8 V
IO = 150 mA
Co = 1 µF
Enable Voltage − V
1
2
1
0
2
3VEN
VO
0
0
10
20
30
40
50
60
70
1 10 100 1 k 10 k 100 k 1 M
Power Supply Ripple Rejection − dB
f − Frequency − Hz
VI = 2.8 V
Co = 1 µF
IO = 150 mA
Power Up / Power Down − V
VI
VO
Co = 1 µF
Ci = 1 µF
RL = 12
0
1
2
3
4
5
6
t − Time − ms
0302010 40 50 7060 80 90 100
VI
t − Time − ms
00.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1
− Input Voltage − VVO − Output Voltage −V
0
-1
2.8
1
3.8
IO = 150 mA
Co = 1 µF
dVI
dt 0.4 V
µs
VI
VO
0.2
t − Time − ms
0
0 0.30.1 0.4 0.5 0.70.6 0.8 0.9
100
0
−100
VO
Output Voltage − mV
− Change In
50
1
− Output Current − mA
IO
VI = 2.8 V
Co = 1 µF
100
150
dIO
dt 0.1A
µs
0
50
100
150
200
250
1.8 2.5 3.3 4 4.8 5.5
VI − Input Voltage − V
− Dropout Voltage − mV
VDO
TJ = 25°C
TJ = −40°C
TJ = 125°C
IO = 150 mA
DC Dropout Voltage − mV
IO − Output Current − mA
TJ = 125°C
TJ = 25°C
TJ = −40°C
0
50
100
150
200
250
015 30 45 60 75 90 105 120 135 150
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
TJ = 25°C
IO = 150 mA
− Minimum Required Input Voltage − V
VO − Output Voltage − V
VI
TJ = 125°C
TJ = −40°C
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
TYPICAL CHARACTERISTICS (continued)
TPS72118 TPS72118 TPS72118DROPOUT VOLTAGE POWER SUPPLY RIPPLE OUTPUT VOLTAGE, ENABLEvs REJECTION VOLTAGEJUNCTION TEMPERATURE vs vsFREQUENCY TIME (START-UP)
Figure 9. Figure 10. Figure 11.
TPS72118 TPS72118 POWER UP / POWER DOWNLINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 12. Figure 13. Figure 14.
DC DROPOUT VOLTAGE TPS72101 MINIMUM REQUIRED INPUTvs DROPOUT VOLTAGE VOLTAGEOUTPUT CURRENT vs vsINPUT VOLTAGE OUTPUT VOLTAGE
Figure 15. Figure 16. Figure 17.
6
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APPLICATION INFORMATION
DEVICE OPERATION
NC
OUT
1
3
IN
EN
GND
2
4
5
VIVO
0.1 µF
TPS721xx
0.1 µF
DUAL SUPPLY APPLICATION
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
The TPS721xx family of low-dropout (LDO) regulators functions with a very low input voltage (>1.8 V). Thedropout voltage is typically 150 mV at full load. Typical quiescent current (ground pin current) is only 85 µA anddrops to 1 µA in the shutdown mode.
The TPS721xx family can be operated at low input voltages due to low voltage circuit design techniques and aPMOS pass element that exhibits low dropout.
A logic low on the enable input, EN, shuts off the output and reduces the supply current to less than 1 µA. ENmay be tied to V
IN
in applications where the shutdown feature is not used.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation.The device switches into a constant-current mode at approximately 350 mA; further load reduces the outputvoltage instead of increasing the output current. The thermal protection shuts the regulator off if the junctiontemperature rises above 170°C. Recovery is automatic when the junction temperature drops approximately 20°Cbelow the high temperature trip point. The PMOS pass element includes a back diode that safely conductsreverse current when the input voltage level drops below the output voltage level.
A typical application circuit is shown in Figure 18 .
Figure 18. Typical Application Circuit
In portable, battery-powered electronics, separate power rails for the DSP or microcontroller core voltage,V
(CORE)
, and I/O peripherals (V
IO
) are usually necessary. The TPS721xx family of LDO linear regulators is idealfor providing V
(CORE)
for the DSP or microcontroller. As shown in Figure 19 , two AAA batteries provide an inputvoltage to a boost converter and the TPS72115 LDO linear regulator. The batteries combine input voltage rangesfrom 3.0 V down to 1.8 V near the end of their useful lives. Therefore, a boost converter is necessary to providethe typical 3.3 V needed for V
IO
, and the TPS72115 linear regulator provides a regulated V
(CORE)
voltage, whichin this example is 1.5 V. Although there is no explicit circuitry to perform power-up sequencing of first V
(CORE)then V
IO
, the output of the linear regulator reaches its regulated voltage much faster (< 400 µs) than the output ofany switching type boost converter due to the inherent slow start up of those types of converters. Assuming aboost converter with minimum V
I
of 1.8 V is appropriately chosen, this power supply solution can be used overthe entire life of the two off-the-shelf AAA batteries. Thus, this solution is very efficient and the design time andoverall cost of the solution is minimized.
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TPS72115
1.8 V 1.5 V
Boost Converter 3.3 V
1.8 V – 3 V VIO
VCORE
DSP or
Controller
Two AAA
Batteries
EXTERNAL CAPACITOR REQUIREMENTS
POWER DISSIPATION AND JUNCTION TEMPERATURE
PD(max)
TJmax TA
RJA
(1)
PDVIVOIO
(2)
PROGRAMMING THE TPS72101 ADJUSTABLE LDO REGULATOR
VOVref 1R1
R2
(3)
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
APPLICATION INFORMATION (continued)
Figure 19. Dual Supply Application Circuit
A 0.1-µF ceramic bypass capacitor is required on both the input and output for stability. Larger capacitorsimprove transient response, noise rejection, and ripple rejection. A higher value electrolytic input capacitor maybe necessary if large, fast rise time load transient are anticipated, and/or there is significant input resistance fromthe device to the input power supply.
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperatureallowable without damaging the device is 150°C. This restriction limits the power dissipation the regulator canhandle in any given application. To ensure the junction temperature is within acceptable limits, calculate themaximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than or equal toP
D(max)
.
The maximum-power-dissipation limit is determined using Equation 1 :
Where:
T
J
max is the maximum allowable junction temperature.R
θJA
is the thermal resistance junction-to-ambient for the package; see the package dissipation rating table.T
A
is the ambient temperature.
The regulator dissipation is calculated using Equation 2 :
Power dissipation resulting from quiescent current is negligible.
The output voltage of the TPS72101 adjustable regulator is programmed using an external resistor divider asshown in Figure 20 . The output voltage is calculated using Equation 3 :
Where:
V
ref
= 1.225 V typ (the internal reference voltage)
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R1 VO
Vref 1R2
(4)
VO
VI
OUT
FB
R2
GND
EN
IN
0.9 V
1.7 V
TPS72101
OUTPUT
VOLTAGE
(V) R1 R2
2.5 127 121
OUTPUT VOLTAGE
PROGRAMMING GUIDE
DIVIDER RESISTANCE
(k)1
Note (1): 1% values shown.
3
1
4
2
R1
5
0.1 µF
0.1 µF
REGULATOR PROTECTION
TPS72101 , , TPS72115TPS72116 , TPS72118
SLVS352C DECEMBER 2001 REVISED MARCH 2006
APPLICATION INFORMATION (continued)Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can beused but offer no inherent advantage and waste more power. Higher values should be avoided, as leakagecurrents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 k to set the divider current at 10 µA and then calculate R1 using Equation 4 :
Where:
V
ref
= 1.225 V.
Figure 20. TPS72101 Adjustable LDO Regulator Programming
The TPS721xx pass element has a built-in back diode that safely conducts reverse current when the inputvoltage drops below the output voltage (for example, during power down). Current is conducted from the outputto the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might beappropriate.
The TPS721xx also features internal current limiting and thermal protection. During normal operation, theTPS721xx limits output current to approximately 350 mA. When current limiting engages, the output voltagescales back linearly until the overcurrent condition ends. While current limiting is designed to prevent grossdevice failure, care should be taken not to exceed the power dissipation ratings of the package. If thetemperature of the device exceeds 170°C, thermal-protection circuitry shuts it down. Once the device has cooleddown to below 150°C, regulator operation resumes.
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PACKAGE OPTION ADDENDUM
www.ti.com 13-May-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS72101DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72101DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72101DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72101DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72115DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72115DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72115DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72115DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72116DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72116DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72116DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72116DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72118DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72118DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72118DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72118DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
PACKAGE OPTION ADDENDUM
www.ti.com 13-May-2011
Addendum-Page 2
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS72118 :
Enhanced Product: TPS72118-EP
NOTE: Qualified Version Definitions:
Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS72101DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS72101DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS72115DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS72115DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS72116DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS72116DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS72118DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS72118DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 28-Jun-2011
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS72101DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TPS72101DBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TPS72115DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS72115DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS72116DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TPS72116DBVT SOT-23 DBV 5 250 203.0 203.0 35.0
TPS72118DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS72118DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
PACKAGE MATERIALS INFORMATION
www.ti.com 28-Jun-2011
Pack Materials-Page 2
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