1. Product profile
1.1 General description
The LD6806 series is a small-size Low-DropOut regulator (LDO) family with a typical
voltage drop of 60 mV at 200 mA current rating.
The device is available in three different surface-mounted packages, one 0.4 mm pitch
CSP, one leadless plastic package SOT886 and one gull wing package SOT753.
The operating voltage ranges from 2.3 V to 5.5 V and the output voltage ranges from
1.2 V to 3.6 V.
LD6806x/xxH devices show a high-ohmic state at the output pin, while the LD6806x/xxP
contains a pull-down switching transistor, to provide a low-ohmic output stage when the
device is disabled. All devices use the same regulator design and are manufactured in
monolithic silicon technology.
These features make the LD6806 ser ies ideal for u se in applica tions requiring co mponent
miniaturization, such as mob ile phone han dsets, cordle ss telephones and pe rsonal digit al
devices.
1.2 Features and benefits
Input voltage range 2.3 V to 5.5 V
Output voltage range 1.2 V to 3.6 V
Dropout voltage 60 mV at 200 mA outpu t ra ting
Low quiescent current in shutdown mode (typical 1.0 A)
30 V RMS output noise voltage (typical value) at 10 Hz to 100 kHz
Turn-on time just 200 s
55 dB Power Supply Rejection Ratio (PSRR) at 1 kHz
Temperature watchdog
Current limiter
LD6806xxxH: high-ohmic (3-state) output state when disabled
LD6806xxxP: low-ohmic output state when disabled
Integrated ESD protection of 10 kV Human Body Model
WLCSP with 0.4 mm pitch and package size of 0.76 mm 0.76 mm 0.47 mm
SOT886 leadless package 1.0 mm 1.45 mm 0.5 mm
SOT753 plastic surface-mounted device
Pb-free, RoHS compliant and free of Halogen and Antimony (dark green compliant)
LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
Rev. 3 — 9 December 2011 Product data sheet
LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 9 December 2011 2 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
1.3 Applications
Analog and digital interfaces requiring lower than standard supply voltage in mobile
appliances such as mobile phones, media players and so on.
2. Pinning information
2.1 Pinning
2.2 Pin description
Fig 1. Configuration for SOT 753 Fig 2. Configuratio n for WLCSP4 Fig 3. Configurat ion for SOT886
132
45
001aao10
7
transparent top view,
solder balls facing down
B
A
21
bump A1
index area
LD6806
n.c.
001aao333
OUT
GND
n.c.
IN
EN
Transparent top view
2
3
1
5
4
6
Table 1. Pin description for SOT 753
Symbol Pin Description
IN 1 supply voltage input
GND 2 supply ground
EN 3 device enable input; active HIGH
n.c. 4 not connected
OUT 5 regulator output voltage
Table 2. Pin description for WL CSP4
Symbol Pin Description
GND A1 supply ground
EN A2 device enable input; active HIGH
OUT B1 regulator output voltage
IN B2 supply voltage input
Table 3. Pin description for SOT 886
Symbol Pin Description
OUT 1 regulator output voltage
n.c. 2 not connected
GND 3 supply ground
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Product data sheet Rev. 3 — 9 December 2011 3 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
3. Ordering information
[1] Size 0.76 mm 0.76 mm.
3.1 Ordering options
Further information on output voltage is available on request; see Section 21 “Contact
information”.
EN 4 device enable input; active HIGH
n.c. 5 not connected
IN 6 supply voltage input
Table 3. Pin description for SOT 886
Symbol Pin Description
Table 4. Ordering info rmation
Type number Package
Name Description Version
LD6806CX4/xxx WLCSP4 wafer level chip-size package; 4 bumps (2 2)[1] -
LD6806CX4/C/xxx WLCSP4 wafer level chip-size package; 4 bumps (2 2)
with backside coating[1] -
LD6806F/xxx XSON6 plastic extremely thin small outline package; no
leads; 6 terminals; body 1 1.45 0.5 mm SOT886
LD6806TD/xxx TSOP5 plastic surface-mounted package; 5 leads SOT753
Table 5. Type number and nominal output voltage of high-ohmic output
Type number Nominal
output
voltage
Type number Nominal
output
voltage
LD6806[CX4, CX4/C, F, TD]/12H 1.2 V LD6806[CX4, CX4/C, F, TD]/23H 2.3 V
LD6806[CX4, CX4/C, F, TD]/13H 1.3 V LD6806[CX4, CX4/C, F, TD]/25H 2.5 V
LD6806[CX4, CX4/C, F, TD]/14H 1.4 V LD6806[CX4, CX4/C, F, TD]/28H 2.8 V
LD6806[CX4, CX4/C, F, TD]/16H 1.6 V LD6806[CX4, CX4/C, F, TD]/29H 2.9 V
LD6806[CX4, CX4/C, F, TD]/18H 1.8 V LD6806[CX4, CX4/C, F, TD]/30H 3.0 V
LD6806[CX4, CX4/C, F, TD]/20H 2.0 V LD6806[CX4, CX4/C, F, TD]/33H 3.3 V
LD6806[CX4, CX4/C, F, TD]/22H 2.2 V LD6806[CX4, CX4/C, F, TD]/36H 3.6 V
Table 6. Type number and nominal output voltage of low.ohmic output
Type number Nominal
output
voltage
Type number Nominal
output
voltage
LD6806[CX4, CX4/C, F, TD]/12P 1.2 V LD6806[CX4, CX4/C, F, TD]/23P 2.3 V
LD6806[CX4, CX4/C, F, TD]/13P 1.3 V LD6806[CX4, CX4/C, F, TD]/25P 2.5 V
LD6806[CX4, CX4/C, F, TD]/14P 1.4 V LD6806[CX4, CX4/C, F, TD]/28P 2.8 V
LD6806[CX4, CX4/C, F, TD]/16P 1.6 V LD6806[CX4, CX4/C, F, TD]/29P 2.9 V
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Product data sheet Rev. 3 — 9 December 2011 4 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
4. Block diagram
LD6806[CX4, CX4/C, F, TD]/18P 1.8 V LD6806[CX4, CX4/C, F, TD]/30P 3.0 V
LD6806[CX4, CX4/C, F, TD]/20P 2.0 V LD6806[CX4, CX4/C, F, TD]/33P 3.3 V
LD6806[CX4, CX4/C, F, TD]/22P 2.2 V LD6806[CX4, CX4/C, F, TD]/36P 3.6 V
Table 6. Type number and nominal output voltage of low.ohmic output …continued
Type number Nominal
output
voltage
Type number Nominal
output
voltage
Fig 4. Block diagram of LD6806x/xxH
Fig 5. Block diagram of LD6806x/xxP
001aan756
THERMAL
PROTECTION
OVERCURRENT
PROTECTION
Vreference
GENERATOR
VIN VOUT
GND
R2
R1
VEN
001aan299
THERMAL
PROTECTION
OVER CURRENT
PROTECTION
Vreference
GENERATOR
VIN VOUT
GND
R2
R1
VEN
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Product data sheet Rev. 3 — 9 December 2011 5 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
5. Limiting values
[1] The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power dissipation is allowed with lower
ambient temperatures. The conditions to determine the specified values are Tamb = 25 C and the use of a two layer PCB.
[2] According to IEC 61340-3-1.
[3] According to JESD22-A115C.
6. Recommended operating conditions
[1] See Section 10.1 “Output capacitor values”.
Table 7. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VIN voltage on pin IN 4 ms transient 0.5 +6.0 V
Ptot total power dissipation LD6806CX4/xxx,
LD6806CX4/Cxxx [1] -770mW
LD6806F/xxx [1] -450mW
LD6806TD/xxx [1] -800mW
Tstg storage temperature 55 +150 C
Tjjunctio n te mp erature 40 +125 C
Tamb ambient temperature 40 +85 C
VESD electrostatic discharge voltage human body model level 6 [2] 10 kV
machine model class 3 [3] -400 V
Table 8. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
Tamb ambient temperature 40 +85 C
Tjjunction temperature - +125 C
Pin IN
VIN voltage on pin IN 2.3 5.5 V
Pin EN
VEN voltage on pin EN 0 VIN V
Pin OUT
CL(ext) external load capacitance [1] 1.0 - F
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Product data sheet Rev. 3 — 9 December 2011 6 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
7. Thermal characteristics
[1] The overall Rth(j-a) can vary depending on the board layout. To minimize the effective Rth(j-a), all pins must have a solid connection to
larger Cu layer areas for example to the power and ground layer. In multi-layer PCB applications, the second layer should be used to
create a large heat spreader area directly below the LDO. If this layer is either ground or power , it should be connected with several vias
to the top layer connecting to the device ground or supply. Avoid the use of solder-stop varnish under the chip.
[2] Use the measurement data given for a rough estimation of the Rth(j-a) in your application. The actual Rth(j-a) value can vary in applications
using different layer stacks and layouts.
8. Characteristics
Table 9. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-a) thermal resistance from junction to ambient LD6806CX4/xxx,
LD6806CX4/Cxxx [1][2] 130 K/W
LD6806F/xxx [1][2] 220 K/W
LD6806TD/xxx [1][2] 125 K/W
Table 10. Electrical characteristics
At recommended input voltages and Tamb =
40
Cto+85
C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VOoutput voltage variation VOUT < 1.8 V; IOUT = 1 m A
Tamb = +25 C30.5 +3 %
30 C Tamb +85 C4- +4 %
VOUT 1.8 V; IOUT = 1 mA
Tamb = +25 C20.5 +2 %
30 C Tamb +85 C3- +3 %
Line regulation error
VO/(VOxVI) rel ative output voltage
variation with input voltage VIN = (VO(nom) + 0.2 V) to 5.5 V [1] 0.1 - +0.1 %/V
Load regulation error
VO/(VOxIO) relative output voltage
variation with output current 1mA IOUT 200 mA
LD6806CX4/xxx, LD6806CX4/Cxxx - 0.0025 0.01 %/mA
LD6806F/xxx, LD6806TD/xxx - 0.005 0.02 %/mA
Vdo dropout voltage IOUT = 200 mA; VIN >V
O(nom) [1]
LD6806CX4/xxx, LD6806CX4/Cxxx - 60 100 mV
LD6806F/xxx, LD6806TD/xxx - 80 130 mV
VIL LOW-level input voltage pin EN 0 - 0.4 V
VIH HIGH-level input voltage pin EN 1.4 - 5.5 V
IOUT current on pin OUT - - 200 mA
IOM peak output current VIN =(V
O(nom) + 0.2 V) to 5.5 V [1]
VO(nom) > 1.8 V ;
VOUT 0.95 VO(nom)
300 - - mA
VO(nom) < 1.8 V ;
VOUT 0.9 VO(nom)
300 - - mA
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Product data sheet Rev. 3 — 9 December 2011 7 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
[1] VO(nom) = nominal output voltage (device specific).
[2] The junction temperature must decrease by Tsd(hys) to enable the device after Tsd was reached and the device was disabled.
[3] LD6806x/xxP only.
9. Dynamic behavior
All results described in Section 9 are based on measurements of types LD6806CX4xxx
and LD6806Fxxx from the LD6806 product series within Section 6 “Recommended
operating cond itio ns ”.
9.1 Dropout
The dropout voltage is defined as the smallest input to output voltage difference at a
specified load current when the regulator operates within its linear region with the pass
transistor functioning as a plain resistor. This means that the input voltage is below the
nominal output vo ltage value .
A small dropout volt age guarantie s lower power consumption and ef ficiency maximization.
Isc short-circuit current pin OUT - 600 - mA
Iqquiescent current VEN = 1.4 V; IOUT = 0 mA - 70 100 A
VEN = 1.4V; 1mA IOUT 200 mA - 155 250 A
VEN 0.4 V - 0.1 1.0 A
Tsd shutdown temperature - 160 - C
Tsd(hys) shutdown temperature
hysteresis [2] -20 - K
PSRR power supply rejection ratio VIN = VO(nom) + 1 V; IOUT = 30 mA;
fripple = 1 kHz [1] -55 - dB
Vn(o)(RMS) RMS output noise voltage bandwidth = 1 0 Hz to 100 kHz;
CL(ext) =1F-30 - V
tstartup(reg) regulator start-up time VIN = 5.5 V; VOUT = 0.95 VO(nom);
IOUT = 200 mA; C L(ext) =1F[1] - - 200 s
tsd(reg) regulator shutdown time VIN = 5.5 V; CL(ext) =1F[3] -300- s
Rpd pull-down resistance [3] -100-
Table 10. Electrical characteristics …continued
At recommended input voltages and Tamb =
40
Cto+85
C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 3 — 9 December 2011 8 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
(1) +85 C
(2) +25 C
(3) 40 C
(1) +85 C
(2) +25 C
(3) 40 C
Fig 6. Dropout as a function of temperature for
LD6806CX4/25H Fig 7. Drop out as a function of temperat ure for
LD6806F/25H
IOUT (mA)
0 20016080 12040
001aan929
40
60
20
80
100
Vdo
(mV)
0
(1)
(2)
(3)
IOUT (mA)
0 20016080 12040
001aan930
40
60
20
80
100
Vdo
(mV)
0
(1)
(2)
(3)
(1) +85 C
(2) +25 C
(3) 40 C
(1) +85 C
(2) +25 C
(3) 40 C
Fig 8. Dropout as a function of temperature for
LD6806CX4/36H Fig 9. Drop out as a function of temperat ure for
LD6806F/36H
IOUT (mA)
0 20016080 12040
001aan935
40
60
20
80
100
Vdo
(mV)
0
(1)
(2)
(3)
IOUT (mA)
0 20016080 12040
001aan936
40
60
20
80
100
Vdo
(mV)
0
(1)
(2)
(3)
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Product data sheet Rev. 3 — 9 December 2011 9 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.2 Output voltage variation
The guaranteed output voltages are specified in Table 10.
(1) +85 C
(2) +25 C
(3) 40 C
Fig 10. Dropout as a function of tempe rature for LD6806TD/36P
IOUT (mA)
0 20016080 12040
018aaa223
40
60
20
80
100
Vdo
(mV)
0
(1)
(2)
(3)
(1) IOUT =1mA
(2) IOUT = 100 mA
(3) IOUT = 200 mA
(1) IOUT =1mA
(2) IOUT = 100 mA
(3) IOUT = 200 mA
Fig 11. Output voltage variation for LD6806CX4/12H Fig 12. Output voltage variation for LD6806CX4/25H
Tamb (°C)
-60 14010020 60-20
001aan942
1.20
1.18
1.22
1.24
VOUT
(V)
1.16
(1)
(2)
(3)
Tamb (°C)
-60 14010020 60-20
001aan943
2.50
2.48
2.52
2.54
VOUT
(V)
2.46
(1)
(2)
(3)
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Product data sheet Rev. 3 — 9 December 2011 10 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.3 Quiescent current
Quiescent or ground current is the difference between the input and the output current of
the regulator.
(1) IOUT =10mA
(2) IOUT =0mA (1) IOUT =10mA
(2) IOUT =0mA
Fig 13. Quiescent current for LD6806CX4/12H Fig 14. Quiescent current for LD6806CX4/25H
Tamb (°C)
-60 14010020 60-20
001aao106
IGND
(µA)
60
65
70
75
80
(1)
(2)
Tamb (°C)
-60 14010020 60-20
001aan944
75
80
85
IGND
(µA)
70
(1)
(2)
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Product data sheet Rev. 3 — 9 December 2011 11 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.4 Noise
Output noise voltage of an LDO circu i t is given as noise density or RMS output noise
voltage o ver a defined range of fr equencies (10 Hz to 100 kHz). Permanent conditions are
a constant output curren t an d a rip ple-free input voltage. The output noise voltage is
generated by the LDO regulator.
(1) 0 mA
(2) 1 mA
(3) 50 mA
(4) 100 mA
(5) 150 mA
(6) 200 mA
(1) 0 mA
(2) 1 mA
(3) 50 mA
(4) 100 mA
(5) 150 mA
(6) 200 mA
Fig 15. Noise density for LD6806CX4/25H Fig 16. Noise density for LD6806CX4/36H
001aan941
1
10-1
10
10-2
10 105
104
102103
(1)
(2)
(3)
(4)
(5)
(6)
noise
(μV/√Hz)
frequency (Hz)
001aao104
1
10-1
10
noise
(μV/√Hz)
10-2
frequency (Hz)
10 105
104
102103
(1)
(2)
(3)
(4)
(5)
(6)
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Product data sheet Rev. 3 — 9 December 2011 12 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.5 Line regulation
Line regulation response is the capability of the circuit to maintain the nominal output
voltage while varying the input voltage.
Regulation % VVOUT
VIN
-----------------100
VOUT
-------------
=
(1) VIN
(2) VOUT
(1) VIN
(2) VOUT
Fig 17. Line regulation for LD6806CX4/12H Fig 18. Line regulation for LD6806F/12H
time (ms)
0 0.80.60.2 0.4
001aan925
2
4
6
VIN
(V)
0
1.4
1.8
1.2
1.6
2.0
VOUT
(V)
1.0
(1)
(2)
time (ms)
0 0.2 0.4 0.6 0.70.50.30.1
001aan926
2
4
6
VIN
(V)
0
1.4
1.8
1.2
1.6
2.0
VOUT
(V)
1.0
(1)
(2)
(1) VIN
(2) VOUT
(1) VIN
(2) VOUT
Fig 19. Line regulation for LD6806CX4/25H Fig 20. Line regulation for LD6806F/25H
time (ms)
0 0.40.30.1 0.2
001aan931
2
4
6
VIN
(V)
0
2.51
2.54
2.47
2.53
2.55VOUT
(V)
2.45
2.49
2.46
2.52
2.48
2.50
(1)
(2)
time (ms)
0 0.40.30.1 0.2
001aan932
2
4
6
VIN
(V)
0
2.51
2.54
2.47
2.53
2.55VOUT
(V)
2.45
2.49
2.46
2.52
2.48
2.50
(1)
(2)
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Product data sheet Rev. 3 — 9 December 2011 13 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.6 Load regulation
Load regulation is the capability of the circuit to maintain the nominal output voltage while
varying the output load current.
(1) VIN
(2) VOUT
(1) VIN
(2) VOUT
Fig 21. Line regulation for LD6806CX4/36H Fig 22. Line regulation for LD6806F/36H
time (ms)
0 0.80.60.2 0.4
001aan937
2
4
6
VIN
(V)
0
3.55
3.65
3.75
VOUT
(V)
3.45
(1)
(2)
time (ms)
0 0.70.60.2 0.40.1 0.3 0.5
001aan938
2
4
6
VIN
(V)
0
3.55
3.65
3.75
VOUT
(V)
3.45
(1)
(2)
Load regulation % mA
VOUT
VO nom
------------------- 100
IOUT max
-----------------------------------
=
(1) IOUT
(2) VOUT
(1) IOUT
(2) VOUT
Fig 23. Load regulation for LD6806 CX4/12H Fig 24. Load regulation for LD 6806F/12H
time (ms)
0 0.2 0.4 0.6 0.70.50.30.1
001aan927
0.1
0.3
0.5
IOUT
(A)
-0.1
0.9
1.2
0.7
1.1
1.3 VOUT
(V)
0.5
0.8
0.6
1.0
(1)
(2)
time (ms)
0 0.80.60.2 0.4
001aan928
0.1
0.3
0.5
IOUT
(A)
-0.1
1.10
1.25
1.00
1.20
1.30
VOUT
(V)
0.90
1.05
0.95
1.15
(1)
(2)
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Product data sheet Rev. 3 — 9 December 2011 14 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
(1) IOUT
(2) VOUT
(1) IOUT
(2) VOUT
Fig 25. Load regulation for LD6806 CX4/25H Fig 26. Load regulation for LD 6806F/25H
time (ms)
0 0.40.30.1 0.2
001aan933
0.1
0.3
0.5
IOUT
(A)
-0.1
2.4
2.5
2.6
VOUT
(V)
2.3
(1)
(2)
time (ms)
0 0.40.30.1 0.2
001aan934
0.1
0.3
0.5
IOUT
(A)
-0.1
2.4
2.5
2.6
VOUT
(V)
2.3
(1)
(2)
(1) IOUT
(2) VOUT
(1) IOUT
(2) VOUT
Fig 27. Load regulation for LD6806 CX4/36H Fig 28. Load regulation for LD 6806F/36H
time (ms)
0 0.70.60.2 0.40.1 0.3 0.5
001aan939
0.1
0.3
0.5
IOUT
(A)
-0.1
3.5
3.6
3.7
VOUT
(V)
3.4
(1)
(2)
time (ms)
0 0.70.60.2 0.40.1 0.3 0.5
001aan940
0.1
0.3
0.5
IOUT
(A)
-0.1
3.5
3.6
3.7
VOUT
(V)
3.4
(1)
(2)
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Product data sheet Rev. 3 — 9 December 2011 15 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.7 Start-up and shut down
Start-up time defines the time needed for the LDO to achieve 95 % of its typical output
voltage level after activation via the enable pin.
Shut down time defines the time needed for the LDO to pull-down the output voltage to
10% of its nominal output voltage after deactivation via the enable pin.
(1) VEN.
(2) VOUT.(1) VEN.
(2) VOUT.
Fig 29. Start-up for LD6806CX4/23H Fig 30. Shut down for LD 6806F/25P
time (ms)
0 0.20.150.05 0.1
001aan946
0.8
0.4
1.2
1.6
Venable
(V)
0
VOUT
(V)
0.5
1
1.5
2
2.5
3
0
(1)
(2)
time (ms)
0 0.40.30.1 0.2
001aan947
0.8
1
0.6
0.4
0.2
1.2
1.4
Venable
(V)
0
(1) (2)
VOUT
(V)
0.5
1
1.5
2
2.5
3
0
LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 9 December 2011 16 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.8 Power Supply Rejection Ratio (PSRR)
PSRR stands for the capability of the regulator to suppress unwanted signals on the input
voltage like noise or ripples.
for all frequencies
PSRR dB 20 Vout ripple
Vin ripple
--------------------------
log=
(1) 1 mA
(2) 50 mA
(3) 100 mA
(4) 200 mA
(1) 1 mA
(2) 50 mA
(3) 100 mA
(4) 200 mA
Fig 31. PSRR for LD6806CX4/25H Fig 32. PSRR for LD6806CX4/36H
001aan945
0
PSRR
(dB)
-70
frequency (Hz)
102105
104
103
-60
-50
-40
-30
-20
-10
(1)
(2)
(3)
(4)
001aao105
-40
-20
0
PSSR
(dB)
-60
frequency (Hz)
102105
104
103
(1)
(2)
(3)
(4)
LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 9 December 2011 17 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
9.9 Enable threshold voltage
An active HIGH signal enables the LDO when the signal exceeds th e minimum input
HIGH voltage threshold. The device is in Off state as long the signal is below the
maximum LOW threshold. The input voltage threshold is independent from the LDO
supply voltage.
(1) LOW to HIGH
(2) HIGH to LOW
Fig 33. Enable threshold voltage
VEN (V)
0.3 1.51.10.70.5 1.30.9
001aan808
1.5
0.5
2.5
3.5
VOUT
(V)
-0.5
(2) (1)
LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 9 December 2011 18 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
10. Application information
10.1 Output capacitor values
The LD6806 series requires external capacitors at the output to guarantee a stable
regulator behavior. Also an input capacitor is recommended to keep the input voltage
stable. These capacitors should not under-run the specified minimum Equivalent Series
Resistance (ESR).
The absolute value of the total capacitance attached to the output pin OUT influences the
shutdown time (tsd(reg)) of the LD6806 series.
[1] The minimum value of capacitance for stability and correct operation is 0.7 F. The capacitor tolerance
should be 30 % or better over the temperature range. The full range of operating conditions for the
capacitor in the application should be considered during device selection to ensure that this minimum
capacitance specification is met. The recommended capacitor type is X7R to meet the full device
temperature specification of 40 C to +125 C.
11. Test information
11.1 Quality information
This product has been qualified in accordance with NX2-00001 NXP Semiconductors
Quality and Reliability Specification and is suitable for use in consumer applications.
Table 11. External load capacitor
Symbol Parameter Conditions Min Typ Max Unit
CL(ext) external load capacitance [1] -1.0-F
ESR equivalent series resistance 5 - 500 m
Fig 34. Application di agram
LD6806_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 9 December 2011 19 of 36
NXP Semiconductors LD6806 series
Ultra low-dropout regulator, low noise, 200 mA
12. Package outline
Fig 35. Package outline WLCSP4
wlcsp4_2x2_po
European
projection
WLCSP4: wafer level chip-size package; 4 bumps (2 x 2)
bump A1
index area
D
E
X
detail X
A
A1
A2
b
e
e
12
A
B
Table 12. Dimensions of LD6806CX4/xxx for package outline WLCSP4; see Figure 35
Symbol Min Typ Max Unit
A 0.44 0.47 0.50 mm
A10.18 0.20 0.22 mm
A20.26 0.27 0.28 mm
b 0.21 0.26 0.31 mm
D 0.71 0.76 0.81 mm
E 0.71 0.76 0.81 mm
e-0.4-mm