September 2013 Doc ID 10880 Rev 4 1/28
1
VND810SP-E
Double channel high-side driver
Features
■
ECOPACK
®
: lead free and RoHS compliant
■
Automotive Grade: compliance with AEC
guidelines
■
Very low standby current
■
CMOS compatible input
■
On-state open-load detection
■
Off-state open-load detection
■
Thermal shutdown protection and diagnosis
■
Undervoltage shutdown
■
Overvoltage clamp
■
Output stuck to V
CC
detection
■
Load current limitation
■
Reverse battery protection
■
Electrostatic discharge protection
Description
The VND810SP-E is a monolithic device made by
using STMicroelectronics™ VIPower™ M0-3
technology, intended for driving any kind of load
with one side connected to ground.
Active V
CC
pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility t able).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects
open-load condition both in on-state and
off-state. Output shorted to V
CC
is detected in the
off-state. Device automatically turns-off in case of
ground pin disconnection.
Type R
DS(on)
I
out
V
CC
VND810SP-E 160 mΩ
(1)
1. Per each channel.
3.5 A
(1)
36 V
1
10
PowerSO-10™
Table 1. Order codes
Package Order code
Tube Tape and reel
PowerSO-10™ VND810SP-E VND810SPTR-E
www.st.com
Contents VND810SP-E
2/28 Doc ID 10880 Rev 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17
3.1.2 Solution 2: a diode (D
GND
) in the ground line . . . . . . . . . . . . . . . . . . . . 18
3.1.3 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.1 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1 ECOPACK
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 PowerSO-10 mechani cal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
VND810SP-E List of tables
Doc ID 10880 Rev 4 3/28
List of tables
Table 1. Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 7. V
CC
output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Switching (V
CC
= 13 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements on V
CC
pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 14. Electrical transient requirements on V
CC
pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 15. Electrical transient requirements on V
CC
pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
List of figures VND810SP-E
4/28 Doc ID 10880 Rev 4
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. On-state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. On-state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. I
LIM
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. PowerSO-10 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. PowerSO-10 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . 21
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 22
Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 26
Figure 33. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VND810SP-E Block diagram and pin description
Doc ID 10880 Rev 4 5/28
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10 KΩ resistor
OVERTEMP. 1
V
cc
GND
INPUT1 OUTPUT1
OVERVOLTAGE
LOGIC
DRIVER 1
STATUS1
V
cc
CLAMP
UNDERVOLTAGE
CLAMP 1
OPEN-LOAD ON 1
CURRENT LIMITER 1
OPEN-LOAD OFF 1
OUTPUT2
DRIVER 2
CLAMP 2
OPEN-LOA D ON 2
OPEN-LOA D OFF 2
OVERTEMP. 2
INPUT2
STATUS2
CURRENT LIMITER 2
1
2
3
4
5
6
7
8
9
10
11
OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2
GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
V
CC
PowerSO-10
Electrical specifications VND810SP-E
6/28 Doc ID 10880 Rev 4
2 Electrical specifications
Figure 3. Current and voltage conventions
1) V
Fn
= V
CCn
- V
OUTn
during reverse battery condition.
2.1 Absolute maximum ratings
S tressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.
IS
IGND
OUTPUT 2
VCC
GND
STATUS 2
INPUT 2 IOUT2
IIN2
ISTAT2
VSTAT2
VIN2
VCC
VOUT2
OUTPUT 1 IOUT1
VOUT1
INPUT 1
IIN1
STATUS 1
ISTAT1
VIN1
VSTAT1
V
F1 (1)
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply vol t age 41 V
- V
CC
Reverse DC supply voltage -0.3 V
- I
GND
DC reverse ground pin current -200 mA
I
OUT
DC output current Internall y Limited A
- I
OUT
Reverse DC output current -6 A
I
IN
DC input current +/- 10 mA
I
stat
DC s tatus current +/- 10 mA
V
ESD
Electrostatic discharge (Human Body Model:
R=1.5KΩ; C = 100 pF)
– INPUT
–STATUS
– OUTPUT
–V
CC
4000
4000
5000
5000
V
V
V
V
VND810SP-E Electrical specification s
Doc ID 10880 Rev 4 7/28
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
CC
< 36 V;
-40 °C < T
j
< 150 °C, unl es s
otherwise stated.
(Per each channel)
)
E
MAX
Maximum switching energy
(L = 1.4 mH; R
L
=0Ω; V
bat
=13.5V;
T
jstart
= 150 °C; I
L
=5A) 24 mJ
P
tot
Power di ssipation T
C
=25°C 52 W
T
j
Junction operating temperature Internally Limited °C
T
c
Case operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resistance junction-case 2.4 °C/W
R
thj-amb
Thermal resistance junction-ambient 52.4
(1)
1. When mounted on a standard single-sided FR-4 board with 0.5 cm
2
of Cu (at least 35 μm thick). Horizontal
mounting and no artificial air flow.
37
(2)
2. When mounted on a standard single-sided FR-4 board with 6 cm
2
of Cu (at least 35 μm thick). Horizontal
mounting and no artificial air flow
°C/W
Table 5. Power output
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC(1)
Operating supply
voltage 5.5 13 36 V
V
USD(1)
Undervo lt age shut do w n 3 4 5.5 V
V
OV(1)
Overvoltage shutdown 36 V
R
ON
On-state resistance I
OUT
= 1 A; T
j
=25°C
I
OUT
= 1 A; V
CC
>8V 160
320 mΩ
mΩ
I
S(1)
Supply current
Off-state; V
CC
=13V;
V
IN
=V
OUT
=0V
Off-state; V
CC
=13V;
V
IN
=V
OUT
=0V;
T
j
=25
°C
On-s t ate ; V
CC
=13V; V
IN
=5V;
I
OUT
=0A
12
12
5
40
25
7
μA
μA
mA
I
L(off1)
Off-state output current V
IN
=V
OUT
=0V 0 50 μA
Electrical specifications VND810SP-E
8/28 Doc ID 10880 Rev 4
I
L(off2)
Off-state output current V
IN
=0V; V
OUT
=3.5V -75 0 μA
I
L(off3)
Off-state output current V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
=125 °C 5μA
I
L(off4)
Off-state output current V
IN
=V
OUT
=0V; V
CC
=13V;
T
j
=25°C 3μA
1. Per device.
Table 6. Protection
(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
T
TSD
Shut down te mperat ure 150 175 200 °C
T
R
Reset temperature 135 °C
T
hyst
Thermal hysteresis 7 15 °C
t
sdl
Status delay in
overload co nditions T
j
>T
TSD
20 μs
I
lim
Current limitation V
CC
=13V
5.5 V < V
CC
<36V 3.5 5 7.5
7.5 A
A
V
demag
Turn-off output clamp
voltage I
OUT
=1A; L=6mH V
CC
-41 V
CC
-48 V
CC
-55 V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Table 7. V
CC
output diode
Symbol Parameter Test conditions Min Typ Max Unit
V
F
Forward on voltage -I
OUT
= 0.5 A; T
j
= 150 °C - - 0.6 V
Table 8. Status pin
Symbol Parameter Test condition s M in Typ Max Unit
V
STAT
Status low output
voltage I
STAT
= 1.6 mA 0.5 V
I
LSTAT
Status leakage
current Normal operation; V
STAT
= 5 V 10 μA
C
STAT
Status pin input
capacitance Normal operation; V
STAT
= 5 V 100 pF
V
SCL
Status clamp voltage I
STAT
= 1 mA
I
STAT
= -1 mA 66.8
-0.7 8V
V
Table 5. Power output (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VND810SP-E Electrical specification s
Doc ID 10880 Rev 4 9/28
x
Table 9. Switching (V
CC
=13V)
Symbol Parameter Test conditions Min Typ Max Unit
t
d(on)
Turn-on delay time R
L
=13Ω from V
IN
rising edge
to V
OUT
=1.3V -30-μs
t
d(off)
Turn-off delay time R
L
=13Ω from V
IN
falling edg e
to V
OUT
=11.7V -30-μs
dV
OUT
/dt
(on)
Turn-on voltage
slope R
L
=13Ω from V
OUT
= 1.3 V to
V
OUT
=10.4V -See
Table 21 -V/μs
dV
OUT
/dt
(off)
Turn-o f f vol t ag e
slope R
L
=13Ω from V
OUT
=11.7V
to V
OUT
=1.3V -See
Table 22 -V/μs
Table 10. Open-load detection
Symbol Parameter Test conditions Min Typ Max Unit
I
OL
Open-lo ad on-s t a te
detection threshold V
IN
= 5V 20 40 80 mA
t
DOL(on)
Open-lo ad on-s t a te
detection dela y I
OUT
= 0 A 200 μs
V
OL
Open-lo ad off-state
voltage detection
threshold V
IN
= 0 V 1.5 2.5 3.5 V
t
DOL(off)
Open-lo ad detection
delay at turn-off 1000 μs
Table 11. Logic input
Symbol Parameter Test conditions Min Typ Max Unit
V
IL
Input low level 1.25 V
I
IL
Low lev el input c urrent V
IN
= 1.25 V 1 μA
V
IH
Input high level 3.25 V
I
IH
High level input
current V
IN
= 3.25 V 10 μA
V
hyst
Input hysteresis
voltage 0.5 V
V
ICL
Input clamp voltage I
IN
= 1 mA
I
IN
= -1 mA 66.8
-0.7 8V
V
Electrical specifications VND810SP-E
10/28 Doc ID 10880 Rev 4
Figure 4. Status timing
Figure 5. Switching time waveforms
V
INn
V
STAT n
t
DOL(off)
OPEN-LOAD STATUS TIMING (with external pull-up)
V
INn
V
STAT n
OVERTEMPERATURE STATUS TIMING
t
SDL
t
SDL
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
TSD
t
t
V
OUTn
V
INn
80%
10%
dV
OUT
/dt
(on)
t
d(off)
90%
dV
OUT
/dt
(off)
t
d(on)
VND810SP-E Electrical specification s
Doc ID 10880 Rev 4 11/28
Table 12. Truth table
Conditions Input Output Status
Normal operati on L
HL
HH
H
Current limitation L
H
H
L
X
X
H
(T
j
< T
TSD
) H
(T
j
> T
TSD
) L
Overtemperature L
HL
LH
L
Undervoltage L
HL
LX
X
Overvoltage L
HL
LH
H
Output voltage > V
OL
L
HH
HL
H
Output cu rrent < I
OL
L
HL
HH
L
Electrical specifications VND810SP-E
12/28 Doc ID 10880 Rev 4
Table 13. Electrical transient requirements on V
CC
pin (part 1)
ISO T/R 7637/1
Test pulse
Test levels
I II III IV Delays and
impedance
1 -25 V -50 V -75 V -100 V 2 ms, 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms, 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 μs, 50 Ω
3b +25 V +50 V +75 V +100 V 0.1 μs, 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
Ω
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
Ω
Table 14. Electrical transient requirements on V
CC
pin (part 2)
ISO T/R 7637/1
Test pulse
Test levels
I II III IV
1CCCC
2CCCC
3aCCCC
3bCCCC
4CCCC
5CEEE
Table 15. Electrical transient requirements on V
CC
pin (part 3)
Class Contents
CAll functions of the device are performed as designed after exposure to
disturbance.
EOne or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
VND810SP-E Electrical specification s
Doc ID 10880 Rev 4 13/28
Figure 6. Waveforms
OPEN-LOAD without external pull-up
STATUS
n
INPUT
n
NORMAL OPERATION
UNDERVOLTAGE
V
CC
V
USD
V
USDhyst
INPUT
n
OVERVOLTAGE
V
CC
STATUS
n
INPUT
n
STATUS
n
STATUS
n
INPUT
n
STATUS
n
INPUT
n
OPEN-LOAD with external pull-up
undefined
OVERTEMPERATURE
INPUT
n
STATUS
n
T
TSD
T
R
T
j
OUTPUT VOLTAGE
n
V
CC
<V
OV
OUTPUT VOLTAGE
n
OUTPUT VOLTAGE
n
OUTPUT VOLTAGE
n
OUTPUT VOLTAGE
n
OUTPUT CURRENT
n
V
OUT
>V
OL
V
OL
V
CC
>V
OV
Electrical specifications VND810SP-E
14/28 Doc ID 10880 Rev 4
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Status leakage current
Figure 11. Status low output voltage Figure 12. Status clamp voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.16
0.32
0.48
0.64
0.8
0.96
1.12
1.28
1.44
1.6
IL(off1) (uA)
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (° C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Iih (uA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.01
0.02
0.03
0.04
0.05
Ilstat (uA)
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Vstat (V)
Istat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (° C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vscl (V)
Istat=1mA
VND810SP-E Electrical specification s
Doc ID 10880 Rev 4 15/28
Figure 13. On-state resistance vs T
case
Figure 14. On-state resistance vs V
CC
Figure 15. Open-load on-state detection
threshold Figure 16. Open-load off-state detection
threshold
Figure 17. Input high level Figure 18. Input low level
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
Ron (mOhm)
Iout=1A
Vcc=8 V; 13V & 36V
510152025303540
Vcc (V)
0
50
100
150
200
250
300
350
400
Ron (mOhm)
Iout=1A
Tc= - 40ºC
Tc= 25ºC
Tc= 125ºC
-50 -25 0 25 50 75 100 125 150 175
Tc (° C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil ( V )
Electrical specifications VND810SP-E
16/28 Doc ID 10880 Rev 4
Figure 19. Input hysteresis voltage Figure 20. Overvoltage shutdown
Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope
Figure 23. I
LIM
vs T
case
-50 -25 0 25 50 75 100 125 150 175
Tc (°C )
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
900
1000
dVout/dt (on) ( V/ms)
Vcc=13V
Rl=13Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
dVout/dt(off) (V/ms)
Vcc=13V
Rl=13Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
1
2
3
4
5
6
7
8
9
10
Ilim (A)
Vcc=13V
VND810SP-E Application information
Doc ID 10880 Rev 4 17/28
3 Application information
Figure 24. Application schematic
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following shows how to dimension the R
GND
resistor:
1. R
GND
≤600 mV / I
S(on)max
.
2. R
GND
≥(-V
CC
) / (-I
GND
)
where - I
GND
is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device’s datasheet.
Power dissipation in R
GND
(when V
CC
< 0 during reverse battery situations) is:
P
D
= (-V
CC
)
2
/ R
GND
This resistor can be shared amongst several different HSD. Please note that the value of this
resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not common with the device ground, then
the R
GND
produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same R
GND
.
V
CC
OUTPUT2
D
ld
+5V
R
prot
OUTPUT1
STATUS1
INPUT1
+5V
STATUS2
INPUT2
GND
+5V
μ
CR
prot
R
prot
R
prot
D
GND
R
GND
V
GND
Application information VND810SP-E
18/28 Doc ID 10880 Rev 4
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using Section 3.1.2 described below.
3.1.2 Solution 2: a diode (D
GND
) in the ground line
A resistor (R
GND
= 1 kΩ) should be inserted in parallel to D
GND
if the device is driving an
inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produce a shift (~600 mV) in the input
threshold and the status output values if the microprocessor ground is not common with the
device ground. This shift does not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the absolute maximum
rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.1.3 Load dump protection
D
ld
is necessary (V oltage Transient Suppressor) if the load dump peak voltage exceeds V
CC
max DC rating. The same applies if the device is subjected to transients on the V
CC
line that
are greater than the ones shown in Table 13.
3.2 MCU I/O protection
If a ground protection network is used and negative transients are present on the V
CC
line,
the control pins is pulled negative. ST suggests to insert a resistor (R
prot
) in line to prevent
the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
-V
CCpeak
/ I
latchup
≤ R
prot
≤ (V
OHμC
- V
IH
- V
GND
) / I
IHmax
Example
For the following conditions:
V
CCpeak
= -100 V
I
latchup
≥ 20 mA
V
OHμC
≥ 4.5 V
5kΩ ≤ R
prot
≤ 65 kΩ.
The recommended values are:
R
prot
= 10 k Ω
3.2.1 Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (R
PU
) connected between
OUTPUT pin and a positive supply voltage (V
PU
) like the +5 V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
VND810SP-E Application information
Doc ID 10880 Rev 4 19/28
1. No false open-load indication when load is connected: in this case it needs to avoid
V
OUT
to be higher than V
Olmin
; this results in the following condition:
V
OUT
=(V
PU
/(R
L
+R
PU
))R
L
<V
Olmin.
2. No misdetection when load is disconnected: in this case the V
OUT
has to be higher than
V
OLmax
; this results in the following condition R
PU
<(V
PU
–V
OLmax
)/ I
L(off2)
.
Because I
s(OFF)
may significantly increase if V
out
is pulled high (up to several mA), the
pull-up resistor R
PU
should be connected to a supply that is switched OFF when the module
is in standby.
The values of V
OLmin
, V
OLmax
and I
L(off2)
are available in Section 2.3.
Figure 25. Open-load detection in off-st ate
V
OL
V ba tt. V
PU
R
PU
R
L
R
DRIVER
+
LOGIC
+
-
IN P UT
STATUS
V
CC
OUT
GROUND
I
L(off2)
Application information VND810SP-E
20/28 Doc ID 10880 Rev 4
3.3 Maximum demagnetization energy
Figure 26. Maximum turn-off current versus load inductance
1. Values are generated with R
L
=0
Ω
In case of repetitive pulses, T
jstart
(at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
A = Single pulse at T
Jstart
= 150 °C
B = Repetitive pulse at T
Jstart
= 100 °C
C = Repetitive pulse at T
Jstart
= 125 °C
Conditions:
V
CC
= 13.5 V
V
IN
, I
L
t
Demagnetization Demagnetization Demagnetization
1
10
0,01 0,1 1 10 100
L(mH)
I
LMAX (A)
A
B
C
VND810SP-E Package and PCB thermal data
Doc ID 10880 Rev 4 21/28
4 Package and PCB thermal data
4.1 PowerSO-10 thermal data
Figure 27. PowerSO-10 PC board
1. Layout condition of R
th
and Z
th
measurements (PCB FR4 area= 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35
μ
m, Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 28. PowerSO-10 R
thj-amb
vs PCB copper area in open box free air condition
30
35
40
45
50
55
0246810
PCB Cu heatsink area (cm^2)
RTHj_amb (°C/W)
Tj-Tamb=50°C
Package and PCB thermal data VND810SP-E
22/28 Doc ID 10880 Rev 4
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10
Equation 1: pulse calculation formula
T_amb
Pd1
C1
R4
C3 C4
R3R1 R6R5R2
C5 C6C2
Pd2
R2
C1 C2
R1
Tj_1
Tj_2
Z
TH
δ
R
TH
δZ
THtp
1δ–()+⋅=
where
δt
p
T⁄=
VND810SP-E Package and PCB thermal data
Doc ID 10880 Rev 4 23/28
Table 16. Thermal parameter
Area/island (cm
2
)Footprint6
R1 (°C/W) 0.35
R2 (°C/W) 1.8
R3(°C/W) 1.1
R4 (°C/W) 0.8
R5 (°C/W) 12
R6 (°C/W) 37 22
C1 (W.s/°C) 0.0001
C2 (W.s/°C) 7E-04
C3 (W.s/°C) 0.008
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.75
C6 (W.s/°C) 3 5
Package and packing information VND810SP-E
24/28 Doc ID 10880 Rev 4
5 Package and packing information
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.2 PowerSO-10 mechanical data
Figure 31. PowerSO-10 package dimensions
DETAIL "A"
PLA NE
SEATING
α
L
A1
F
A1
h
A
D
D1
= =
= =
E4
0.10 A
E
C
A
B
B
DETAIL "A"
SEATING
PL ANE
E2
10
1
eB
HE
0.25
VND810SP-E Package and packing informatio n
Doc ID 10880 Rev 4 25/28
Table 17. PowerSO-10 mechanical data
Symbol Millimeters
Min Typ Max
A3.35 3.65
A
(1)
1. Muar only POA P013P
3.4 3.6
A1 0.00 0.10
B0.40 0.60
B
(1)
0.37 0.53
C0.35 0.55
C
(1)
0.23 0.32
D9.40 9.60
D1 7.40 7.60
E9.30 9.50
E2 7.20 7.60
E2
(1)
7.30 7.50
E4 5.90 6.10
E4
(1)
5.90 6.30
e1.27
F1.25 1.35
F
(1)
1.20 1.40
H 13.80 14.40
H
(1)
13.85 14.35
h0.50
L1.20 1.80
L
(1)
0.80 1.10
a0° 8°
α
(1)
2° 8°
Package and packing information VND810SP-E
26/28 Doc ID 10880 Rev 4
5.3 PowerSO-10 packing information
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix)
Figure 33. Tape and reel shipment (suffix “TR”)
6.30
10.8 - 11
14.6 - 14.9
9.5
1
2
3
4
51.27
0.67 - 0.73
0.54 - 0.6
10
9
8
7
6
B
A
C
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)
Casablanca 50 1000 532 10.4 16.4 0.8
Muar 50 1000 532 4.9 17.2 0.8
REEL DIMENSIONS
All dimensio ns are in mm.
Base Q.ty
600
Bulk Q.ty
600
A (max)
330
B (min)
1.5
C (± 0.2)
13
F
20.2
G (+ 2 / -0)
24.4
N (min)
60
T (max)
30.4
TAPE DIMENSIONS
According to Electr onic Indu stries Associatio n
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W
24
Tape Hole Spacing P0 (± 0.1)
4
Component Spacing P
24
Hole Diameter D (± 0.1/-0)
1.5
Hole Diameter D1 (min)
1.5
Hole Position F (± 0.05)
11.5
Compar tm en t Dep th K (max)
6.5
Hole Spacing P1 (± 0.1)
2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
VND810SP-E Revision history
Doc ID 10880 Rev 4 27/28
6 Revision history
Table 18. Document revision history
Date Revision Changes
01-Oct-2004 1 Initial release.
25-May-2010 2 Changed document template. Reformatted entire document.
Changed Features list.
08-Oct-2010 3
Updated following tables:
–Table 6: Protection
–Table 12: Truth table
–Table 17: PowerSO-10 mechanical data
Updated Figure 26: Maximum turn-off current versus load inductance
19-S ep-2013 4 Updated Disclaimer.
VND810SP-E
28/28 Doc ID 10880 Rev 4
Please Read Carefully:
Informa tion in this do cument is prov ided solely in connec tion with ST products. STMic roelect ronics NV and its subsidiari es (“ST”) reser ve the
right to mak e chang es, c or recti ons , modif ic ations or improv ement s, t o th is documen t, and the prod ucts an d servic es des crib ed he rein a t any
time, without notice.
All ST produ cts are sold purs uant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating t o the choice, sele ction or use of the ST products and se rvices described herein.
No license, express o r implied, by es toppel or otherwise, t o any intellectual property rights is granted under this doc ument. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
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any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
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