VIDEO POWER OPERATIONAL AMPLIFIERS PAOS PAOSA MICROTECHNOLOGY HTTP://WWW.APEXMECROTECH.COM (800) 546-APEX (800) 546-2739 FEATURES POWER MOS TECHNOLOGY 2A peak rating HIGH GAIN BANDWIDTH PRODUCT 150MHz VERY FAST SLEW RATE 400V/us * PROTECTED OUTPUT STAGE Thermal shutoff EXCELLENT LINEARITY Class A/B output WIDE SUPPLY RANGE +12V to +40V LOW BIAS CURRENT, LOW NOISE FET input APPLICATIONS * VIDEO DISTRIBUTION AND AND AMPLIFICATION * HIGH SPEED DEFLECTION CIRCUITS POWER TRANSDUCERS TO 5MHz COAXIAL LINE DRIVERS POWER LED OR LASER DIODE EXCITATION DESCRIPTION The PAOSis a high voltage, high output current operational amplifier optimized to drive a variety of loads from DC through the video frequency range. Excellent input accuracy is achieved with a dual monolithic FET input transistor which is cascoded by two high voltage transistors to provide outstand- ing common mode characteristics. All internat current and voltage levels are referenced to a zener diode biased on by a current source. As a result, the PAO9 exhibits superior DC and AC stability over a wide supply and temperature range. High speed and freedom from second breakdown is as- sured by a complementary Power MOS output stage. For optimum linearity, especially at low levels, the Power MOS transistors are biased in the class A/B mode. Thermal shutoff provides full protection against overheating and limits the heatsink requirements to dissipate the internal power losses under normal operating conditions. A built-in current limit protects the amplifier against overloading. Transient induc- tive load kickback protection is provided by two internal clamping diodes. External phase compensation allows the user maximum flexibility in obtaining the optimum slew rate and gain bandwidth product at all gain settings. For continu- ous operation under load, a heatsink of proper rating is recommended. This hybrid integrated circuit utilizes thick film (cermet) resistors, ceramic capacitors and silicon semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating tempera- tures. The 8-pin TO-3 437V ; packageishermetically di 5a ius sealed and electrically dt isolated. The use of com-pressible thermal washers and/or im- proper mounting torque will void the product warranty. Please see General Operating Considerations. FIGURE 1. PAQ9 AS DEFLECTION AMPLIFIER DEFLECTION AMPLIFIER (Figure 1) The deflection amplifier circuit of Figure 1 achieves arbitrary beam positioning for a fast heads-up display. Maximum tran- sition times are 4us while delivering 2A pk currents to the 13mH coil. The key to this circuit is the sense resistor (Rg) which converts yoke current to voltage for op amp feedback. This negative feedback forces the coil current to stay exactly proportional to the control voltage. The network consisting of Rp, R, and C, serves to shift from a current feedback via Rg to a direct voltage feedback at high frequencies. This removes the extra phase shift caused by the inductor thus preventing oscillation. See Application Note 5 for details of this and other precision magnetic deflection circuits. EQUIVALENT SCHEMATIC EXTERNAL CONNECTIONS PHASE COMPENSATION GAIN Ce Ag 1 100pF 2002 10 15pF 0Q 100 5pF 0Q 1000 none none OUT Rg = (| +Vg 1} + [Vg |) Ry/1.6 NOTE: Input offset voltage trim optional. Ry = 10K 2 MAX APEX MICROTECHNOLOGY CORPORATION TELEPHONF (520) fO0-RANN FAX (520) ARR-2970 ORDERS (5270) 690-8401 FMATL prodlit@apexmicrotech.com WM 0478636 0002375 O7c? 123PAOS PAOSA ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS MA M RATING SUPPLY VOLTAGE, +Vs to V. B0V ABSOLUTE XIMU s OUTPUT CURRENT, within SOA 5A POWER DISSIPATION, internal 7aw INPUT VOLTAGE, differential 40V INPUT VOLTAGE, common moda Vs TEMPERATURE, pin solder - 10s 300C TEMPERATURE, junction 150C TEMPERATURE RANGE, storage -65 to +150C OPERATING TEMPERATURE RANGE, case 55 to +125C SPECIFICATIONS PA0g PAOSA PARAMETER TEST CONDITIONS? MIN TYP MAX | MIN TYP MAX | UNITS INPUT OFFSET VOLTAGE, initial Ty = 25C 5 +3 +.25 +5 mV OFFSET VOLTAGE, vs. temperature T, = 25 to +85C 10 30 5 10 pyvec OFFSET VOLTAGE, vs. supply Te = 25C 10 pV OFFSET VOLTAGE, vs. power T, = 25 to +85C 20 . pVw BIAS CURRENT, initial T, = 25C 5 100 3 20 pA BIAS CURRENT, vs. supply To. = 25C 01 . pA/V OFFSET CURRENT, initial T, = 26C 2.5 50 15 10 pA INPUT IMPEDANCE, DC Te = 25C 10" * fe} INPUT CAPACITANCE To = 25C 6 , pF COMMON MODE VOLTAGE RANGE? T, = 25 to +85C + V5-10/ + V.-8 * * v COMMON MODE REJECTION, DC To = -25 to +85C, Voy = + 20V 104 * dB GAIN OPEN LOOP GAIN at 10Hz To = 25C, Ry = 1kQ 90 * dB OPEN LOOP GAIN at 10Hz Ty = 25C, R, = 152 80 88 . dB GAIN BANDWIDTH PRODUCT at 1MHz | T, = 25C, R, = 159, C, = 5pF 150 * MHz POWER BANDWIDTH, gain of 100 comp | T, = 25C, A, = 152, C, = 5pF 1.2 . MHz POWER BANDWIDTH, unity gain comp | T, = 25C, R, = 152, Cy = 100pF 75 * MHz OUTPUT VOLTAGE SWING? T, =25 to +85C, I, = 2A +V,-8|+Vs-7 * . V CURRENT, PEAK Ty = 25C 45 . A SETTLING TIME to .1% Ty = 25C, 2V step 3 . ps SETTLING TIME to .01% T, = 25C, 2V step 1.2 . ps SLEW RATE, gain of 100 comp To = 25C, Co = SpF 400 . Vins SLEW RATE, unity gain comp Te = 25C, Cy. = 100pF 75 . Vins POWER SUPPLY VOLTAGE To = -25 to +85C +12 +35 + 40 * * . Vv CURRENT, quiescent Ty = 26C 70 85 * . mA THERMAL RESISTANCE, AC junction to case* Ty = -25 to +86C, F > 60Hz 1.2 13 * . C/W RESISTANCE, DC junction to case T, = 25 to +85C, F < 60Hz 1.6 18 * * C/W RESISTANCE, junction to air Ty = -25 to +85C 30 * Ciw TEMPERATURE RANGE, case Meets full range specifications -25 25 +85 * * * C NOTES: * { achieve high MTTF. pwn The specification of PAOQA is identical to the specification for PAOS in applicabie column to the left. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to The power supply voltage for all tests is +35V unless otherwise specified as a test condition. +V, and -V, denote the positive and negative supply rail respectively. Total V, is measured trom +V, to Vs. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850C to avoid generating toxic fumes. MB 0474636 00037b TO APEX MICROTECHNOLOGY CORPORATION 5980 NORTH SHANNON ROAD TUCSON, ARIZONA 85741 USA APPLICATIONS HOTLINE: 1 (800) 546-2739 (124onan PERFORMANCE PAOS e PAOSA = 20 POWER DERATING CURRENT LIMIT S P QUIESCENT CURRENT = 9 ol. a ~ z 70 8 2 oO = W414 = 60 7 x Z 3 2 q 50 - 8 12 Q E z ag 40 25 i iva = 8 W 39 EB 4 wi 1.0 5 fi go a 20 ca 3 9 8 < 3 a: z 10 2 N a _ Lo 1 = 6 Z 0 2% 60 75 100 125 150 55 -25 0 25 50 75 100125 & 30 40 50 60 70 a0 CASE TEMPERATURE, Tg (C) JUNCTION TEMPERATURE, T; (C) $ TOTAL SUPPLY VOLTAGE, Vs (V) 10 SMALL SIGNAL RESPONSE 10 OUTPUT VOLTAGE SWING 70 POWER RESPONSE Ss ~ 50 Co = SpF > 9 = 50 ao a > = 15pF 5 4 < 60 =? a & > 4 Zz = ui 0 < Oo 7 oO 40 c < o F 20 oO Co = 100pF o 6 a oO 9 > S 20 15 2 a 5 5 8 z o < 4 5 10 3 | +Vg | + | Vg | = 80V -20 100 1K 10K 100K 1M 10M100M ~~ 0 1 2 3 4 5 100K 300K 1M 3M 10M 30M FREQUENCY, F (Hz) OUTPUT CURRENT, Ip (A) FREQUENCY, F (Hz) SLEW RATE VS. COMP. PULSE RESPONSE INPUT NOISE 600 30 wz 30 500 Vip = 2V, Ay = 10, t, = 10ns = S 20 S 20 _400 3 = g > 19 F 15 2300 S i Fe eo = 10 200 8 8 = 2-10 2 7 #150 = BD. > -20 g E a} 100 -30 z 3 5 10 20 30 50 100 o 1 2 3 4 5 6 7 8 4 100. 1K 40K 100K 1M COMPENSATION CAPACITOR, Co(pF) TIME, t (us) FREQUENCY, F (Hz) =~ COMMON MODE REJECTION a POWER SUPPLY REJECTION COMMON MODE VOLTAGE D 420 5 100 = 70 iv c NN 2 }~aa wo 50 3 100 NS a 80 J [+Vg | + | -Vs | = 80V Zz z 40 N f 5 80 NN Q 60 Q 30 w - ul \ wl 8 20 c 60 S > 40 wu a a O15 9 a 2 2 40 B 20 $ Zz j 10 = w 2 = 20 = 0 a 7 Q 1K 10K 100K 1M 10M 100M & 1K 10K 100K 1M 10M 100M 100K300K 1M 3M 10M 30M FREQUENCY, F (Hz) FREQUENCY, F(Hz) FREQUENCY, F(Hz) APEX MICROTECHNOLOGY CORPORATION TELEPHONE (520) 690-8600 FAX (520) 888-3329 ORDERS (520) 690-8601 EMAIL prodlit@apexmicrotech.com MH 04878636 0002377 945 C125PAOS PAOSA OPERATING CONSIDERATIONS GENERAL Please read the General Operating Considerations sec- tion, which covers stability, supplies, heatsinking, mounting, current limit, SOA interpretation, and specification interpreta- tion. Additional information can be found in the application notes. For information on the package outline, heatsinks, and mounting hardware, consult the Accessory and Package Mechanica! Data section of the handbook. SUPPLY VOLTAGE The specified voltage (tV.) applies for a dual (+) supply having equal voltages. A nonsymmetrical (ie. +70/-10V) or a single supply (ie. 80V) may be used as long as the total voltage between the +V, and -V, rails does not exceed the sum of the voltages of the specified dual supply. SAFE OPERATING AREA (SOA) The MOSFET output stage of this power operational ampli- fier has two distinct limitations: 1. The current handling capability of the MOSFET geometry and the wire bonds. 2. The junction temperature of the output MOSFETs. SAFE OPERATING AREA CURVES 5.0 4.0 3.5 3.0 25 2.0 1.5 TPUT CURRENT FROM +Vg OR Vg (A) 5 1520 25 30 35 40 3 INTERNAL VOLTAGE DROP SUPPLY TO OUTPUT Vs -Vo (V) 50 60 70 80 The SOA curves combine the effect of these limits and allow for internal thermal delays. For a given application, the direc- tion and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. The following guidelines may save extensive analytical efforts: 1. Capacitive and inductive loads up to the following maxi- mums are safe: +V CAPACITIVE LOAD INDUCTIVE LOAD 40 ADF 11mH 30V 500nF 24mH 20V 2500pF 75mH 15V 60 100mH 2. Short circuits to ground are safe with dual supplies up to +20V. 3. The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. BYPASSING OF SUPPLIES Each supply rail must be bypassed to common with a M 04678636 0002378 681 tantalum capacitor of at least 47yF in parallel with a .47pF ceramic capacitor directly connected from the power supply pins to the ground plane. OUTPUT LEADS Keep the output leads as short as possible. In the video frequency range, even a few inches of wire have significant inductance, raising the interconnection impedance and limit- ing the output current slew rate. Furthermore, the skin effect increases the resistance of heavy wires at high frequencies. Multistrand Litz Wire is recommended to carry large video currents with low losses. GROUNDING Single point grounding of the input resistors and the input signal to a common ground plane will prevent undesired current feedback, which can cause large errors and/or insta- bilities. THERMAL SHUTDOWN PROTECTION The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approximately 150C. This allows heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperature during temporary fault conditions. Thermal protection is a fairly slow-acting circuit and there- fore does not protect the amplifier against transient SOA violations {areas outside of the T, = 25C boundary). It is designed to protect against short-term fault conditions that result in high power dissipation within the amplifier, If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, destroy signal integrity, and reduce the reliability of the device. STABILITY Due to its large bandwidth the PAO9 is more likely to oscillate than lower bandwidth Power Operational Amplifiers. To pre- vent oscillations a reasonable phase margin must be main- tained by: 1. Selection of the proper phase compensation capacitor and resistor. Use the values given in the table under external connections on the first page of this data sheet and interpo- late if necessary. The phase margin can be increased by using a larger capacitor and a smaller resistor than the slew rate optimized values listed in the table. 2. Keeping the external sumpoint stray capacitance to ground at a minimum and the sumpoint oad resistance (input and feedback resistors in parallel) below 500Q. Larger sumpoint load resistances can be used with increased phase com- pensation and/or bypassing of the feedback resistor. 3. Connect the case to a local AC ground potential. CURRENT LIMIT Internal current limiting is provided in the PAOY. Note the current limit curve given under typical performance graphs is based on junction temperature. {f the amplifier is operated at cold junction temperatures, current limit could be as high as 8 amps. This is above the maximum allowed current on the SOA curve of 5 amps. Systems using this part must be designed to keep the maximum output current to less than 5 amps under all conditions. The internal current limit only provides this protection for junction temperatures of 80C and above. C126 PAOSU REV. H FEBRUARY 1998 1998 Apex Microtechnology Corp.TABLE 4 GROUP A INSPECTION PAOSM MICROTECHNOLOGY HTTP://WWW.APEXMICROTECH.COM (800) 546-APEX (800) 546-2739 SG PARAMETER SYMBOL | TEMP. |POWER | TEST CONDITIONS MIN MAX | UNITS 1 Quiescent Current lg 25C +35V Vin = 0, Ay = 100 85 mA 1 Input Offset Voltage Vos 25C +35V Vin = 0, Ay = 100 3 mV 1 Input Offset Voltage Vos 25C +12V Vin = 0, Ay = 100 5.3 mV 1 Input Offset Voltage Vos 25C +40V Vin = 0, Ay = 100 3.5 mV 1 Input Bias Current, +IN tle 25C +35V Vin =O 100 pA 1 Inout Bias Current, IN ly 25C +35V Vin = 0 100 pA 1 Input Offset Current los 25C +35V Vin =O 50 pA 3 Quiescent Current lg ~55C | +35V Vin = 0, Ay = 100 165 mA 3 Input Offset Voltage Vos 56C | +35V Vin = 0, Ay = 100 5.4 mV 3 Input Offset Voltage Vos 55C | #12V | V,=0, Ay = 100 7.7 mV 3 Input Offset Voltage Vos -55C | +40V Vin = 0, Ay = 100 5.9 mv 3. Input Bias Current, +IN tly -55C | +35V Vin =O 100 pA 3. Input BiasCurrent, -IN lp 58C | +35V Vin = 0 100 pA 3 Input Offset Current los -55C | +35V | Vay=0 50 pA 2 Quiescent Current ly 125C | +35V Vin = 0, Ay = 100 140 mA 2 Input Offset Voltage Vos 126C | +35V | Vi, =0, Ay = 100 6 mV 2 Input Offset Voltage Vog 425C | +12V Vy = 0, Ay = 100 8.3 mV 2 Input Offset Voltage Vos 125C | +40V Vin = 0, Ay = 100 6.5 mv 2 Input Bias Current, +IN tle 125C | 35V | Vy, =0 10 nA 2 Input Bias Current, -IN ly 125C | +35V Vin = 0 10 nA 2 Input Offset Current log 125C | +35V Vin = 0 10 nA 4 Output Voltage, I, = 3A Vo 26C | +21.3V | R, = 3.752 11.3 Vv 4 Output Voltage, |, = 66mMA Vo 25C +40V R, = 5002 33 v 4 Output Voltage, I, = 2A Vo 26C | 38V | R, = 150 30 v 4 = Current Limits lo 25C | +32.2V | R_=3.75Q 3.4 6 A 4 Stability/Noise Ey 25C +35V R_ = 500Q, Ay = 1, C, = 1.5nF 1 mv 4 Slew Rate SR 25C +35V R, = 00Q 25 500 Vius 4 Open Loop Gain Ao. 25C +35V R, = $00, F = 10Hz 80 dB 4 Common Mode Rejection CMR 25C | +34.5V | R, = 500Q, F = DC, Voy = +22.5V 64 dB 6 Output Voltage, |, = 3A Vo -55C | +21.3V | R, = 3.752 11.3 Vv 6 Output Voltage, |, = 66MA Vo -55C | +40V R, = 50002 33 Vv 6 Output Voltage, Ip= 2A Vo -55C | +38V R, = 152 30 Vv 6 Stability/Noise Ey ~55C | +85V | R, = 5009, Ay =1,C, = 1.5nF 1 mV 6 Slew Rate SR -55C | +35V R, = 5002 25 500 V/us 6 Open Loop Gain Aa. 55C | +35V R, = 500Q, F = 10Hz 80 dB 6 Common Mode Rejection CMR 55C | 34.5V | R, = 500Q, F = DC, Vey = +22.5V 64 dB 5 Output Voltage, I, = 66mMA Vo 126C | +40V | R, = 5000 33 Vv 5 Output Voltage, p= 1A Vo 125C | #+23.5V | R, = 15Q 15 Vv 5 Stability/Noise Ey 125C | +35V R, = 5002, A, = 1, C, = 1.5nF 1 mV 5 Slew Rate SR 125C | +35V R, = 5002, 20 500 Vius 5 Open Loop Gain Aa 126C | +35V R, = 5008, F = 10Hz 80 dB 5 Common Mode Rejection CMR 125C | +34.5V 1 A, = 5008, F = DC, Voy = 22.5V 64 aB BURN IN CIRCUIT 100KQ * These components are used to stabilize device due to poor high frequency characteristics of burn in board. * Input signals are calculated to result in internal power dissipation of approximately 2.1W at case temperature = 125C. MH 0478636 0002379 716 PAOQMU REV.| FEBRUARY 1998 1998 Apex Microtechnology Corp. C127