1
Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS power FET is designed to withstand high
energy in the avalanche and commutation modes. This new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters, and PWM motor
controls. These devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating area
are critical and offer additional safety margin against unexpected
voltage transients.
•Avalanche Energy Specified
•Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
•Diode is Characterized for Use in Bridge Circuits
•IDSS and VDS(on) Specified at Elevated Temperature
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
Drain–to–Source V oltage VDSS 100 Vdc
Drain–to–Gate V oltage (RGS = 1.0 MΩ) VDGR 100 Vdc
Gate–to–Source Voltage — Continuous
Gate–to–Source V oltage — Non–repetitive (tp ≤ 10 ms) VGS
VGSM ±20
±40 Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10
m
s)
ID
ID
IDM
27
19
95
Adc
Apk
Total Power Dissipation
Derate above 25°CPD145
1.16 Watts
W/°C
Operating and Storage Temperature Range TJ, Tstg –55 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy — STARTING TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vdc, PEAK IL = 27 Apk, L = 1.0 mH, RG = 25
W
)EAS 365 mJ
Thermal Resistance — Junction–to–Case°
Thermal Resistance — Junction–to–Ambient°RθJC
RθJA 0.86
62.5 °C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL260 °C
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
REV 3
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SEMICONDUCTOR TECHNICAL DATA
TMOS POWER FET
27 AMPERES
100 VOLTS
RDS(on) = 0.070 OHMS
D
S
G
CASE 221A–09
TO-220AB
Motorola, Inc. 1998
IRF540
2Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS 100
——
116 —
—
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 100 Vdc, VGS = 0 Vdc)
(VDS = 100 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS —
——
—10
100
m
Adc
Gate–Body Leakage Current
(VGS = ±20 Vdc, VDS = 0 Vdc) IGSS — — 100 nAdc
ON CHARACTERISTICS(1)
Gate Threshold Voltage Cpk ≥ 2.0(3)
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
VGS(th) 2.0
—2.9
6.8 4.0
—
Vdc
mV/°C
Static Drain–to–Source On–Resistance Cpk ≥ 2.0(3)
(VGS = 10 Vdc, ID = 15 Adc) RDS(on) —0.047 0.070 Ohms
Drain–to–Source On–V oltage
(VGS = 10 Vdc, ID = 27 Adc)
(VGS = 10 Vdc, ID = 15 Adc, TJ = 125°C)
VDS(on) —
——
—1.9
1.8
Vdc
Forward T ransconductance (VDS = 15 Vdc, ID = 15 Adc) gFS 6.0 15 — Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(V 25 Vdc V 0 Vdc
Ciss —1460 1600 pF
Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz
)
Coss —390 800
T ransfer Capacitance
f
=
1
.
0
MHz)
Crss —120 300
SWITCHING CHARACTERISTICS(2)
T urn–On Delay Time
(V 30 Vd I 15 Ad
td(on) —11.6 30 ns
Rise T ime (VDD = 30 Vdc, ID = 15 Adc, tr— 50 60
T urn–Off Delay Time
(DD ,D,
VGS = 10 Vdc, RG = 4.7 Ω)td(off) —26 80
Fall T ime tf— 19 30
Gate Charge
(V 80 Vd I 27 Ad
QT— 50 60 nC
(See Figure 8) (VDS = 80 Vdc, ID = 27 Adc, Q1— 9.0 —
(DS ,D,
VGS = 10 Vdc) Q2—26 —
Q3— 20 —
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(IS = 27 Adc, VGS = 0 Vdc)
(IS = 27 Adc, VGS = 0 Vdc, TJ = 125°C)
VSD —
—0.93
0.84 2.4
—
Vdc
Reverse Recovery Time
(I 27 Ad V 0 Vd
trr —110 — ns
(IS = 27 Adc, VGS = 0 Vdc, ta—100 —
(S,GS ,
dIS/dt = 100 A/µs) tb— 10 —
Reverse Recovery Stored Charge QRR —0.67 —
m
C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
Ld—
—3.5
4.5 —
—
nH
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad) Ls— 7.5 —
(1) Pulse Test: Pulse Width ≤300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values. Cpk
+Ť
Max limit – Typ
3
sigma
Ť
IRF540
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
VDS, DRAIN–TO–SOURCE VOLT AGE (VOLTS)
Figure 1. On–Region Characteristics
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and Temperature
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
TJ, JUNCTION TEMPERATURE (
°
C)
Figure 5. On–Resistance Variation with
Temperature
VDS, DRAIN–TO–SOURCE VOLT AGE (VOLTS)
Figure 6. Drain–to–Source Leakage Current
versus Voltage
RDS(on), DRAIN–TO–SOURCE RESISTANCE
IDSS, LEAKAGE (nA)
RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)
ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)
55
45
10
5
1086420
60
40
30
20
10
23 4 5 6 7 8
0403020100
0.050
0.035
0.030 0102030 55
0.6
0.2
0150250–25–50
7 V
6 V
5 V
VDS
≥
10 V
TJ = 100
°
C
25
°
C
TJ = 25
°
C
ID, DRAIN CURRENT (AMPS)
VGS = 10 V
0
VGS = 10 V
5 15 25 35 55 5 15 25 35
020 5070 11010 30 60 100
0
0.4
1000
10
100
13579
0.02
50
20
15
30
25
40
35
50 TJ = 25
°
C8 V 9 V
50
5045
–55
°
C
0.01
0.04
0.03
0.06
0.05
0.08
0.07
0.09
TJ = –55
°
C
25
°
C100
°
C
40 5045
0.045
0.040
0.060
0.055
VGS = 0 V
15 V
10075 125
1.2
0.8
1.0
1.4
2.0
1.6
1.8 VGS = 10 V
ID = 15 A
40 9080
TJ = 125
°
C
100
°
C
VGS = 10 V
(NORMALIZED)
IRF540
4Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
GATE–TO–SOURCE OR DRAIN–T O–SOURCE VOLT AGE (VOLTS)
Figure 7. Capacitance Variation
QG, TOTAL GA TE CHARGE (nC)
Figure 8. Gate–to–Source and
Drain–to–Source Voltage versus Total Charge
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
VSD, SOURCE–TO–DRAIN VOLT AGE (VOLTS)
Figure 10. Diode Forward Voltage versus
Current
VDS, DRAIN–TO–SOURCE VOLT AGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
TJ, STAR TING JUNCTION TEMPERATURE (
°
C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
ID, DRAIN CURRENT (AMPS)
EAS, SINGLE PULSE DRAIN–TO–SOURCE
t, TIME (ns)
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
IS, SOURCE CURRENT (AMPS)
4500
1000
500
2510–5
10
4
3
2
1
0 5 10 15 20 25 50
1.0 10
20
5
00.55 0.6 0.7 0.75 0.95
1.0 10001.00.1
TJ = 25
°
C
VGS = 0 V
C, CAPACITANCE (pF)
0
1.0 100 0.65 0.8
25 50 75 150
0
400
0
100
–10 0 5 15 20
10
2000
1500
3000
2500
4000
3500
5
100
1000
0.90.85
15
10
30
25
ID = 27 A
100
10
1000
100
100 125
50
200
150
300
250
350
30 35 40 45
6
7
8
9
TJ = 25
°
C
ID = 27 A
VDS
VGS
QT
Q3
Q1 Q2
VDS, DRAIN–TO–SOURCE VOLT AGE (VOLTS)
80
72
64
56
48
40
32
24
16
8
0
TJ = 25
°
C
ID = 15 A
VDD = 30 V
VGS = 10 V
VGS = 20 V
SINGLE PULSE
TC = 25
°
C
VGS = 0 VVDS = 0 V
TJ = 25
°
C
Ciss
Crss
Crss
Ciss
Coss
VGS VDS
td(off)
td(on)
tf
tr
100
m
s
1.0 ms
10 ms
dc
10
m
s
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
AV ALANCHE ENERGY (mJ)
10
IRF540
5
Motorola TMOS Power MOSFET Transistor Device Data
Figure 13. Thermal Response
Rthjl(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
R
θ
JC(t) = r(t) R
θ
JC
R
θ
JC = 1.67
°
C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) R
θ
JC(t)
P(pk)
t1t2
DUTY CYCLE, D = t1/t2
t, TIME (seconds)
1.0
0.01
D = 0.5
0.05
0.01
SINGLE PULSE
1.0E–05
0.02
0.1
1.0E–04 1.0E–03 1.0E–02 1.0E–01 1.0E+0
0.2
0.1
IRF540
6Motorola TMOS Power MOSFET Transistor Device Data
PACKAGE DIMENSIONS
CASE 221A–09
(TO–220AB)
ISSUE Z
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.570 0.620 14.48 15.75
B0.380 0.405 9.66 10.28
C0.160 0.190 4.07 4.82
D0.025 0.035 0.64 0.88
F0.142 0.147 3.61 3.73
G0.095 0.105 2.42 2.66
H0.110 0.155 2.80 3.93
J0.018 0.025 0.46 0.64
K0.500 0.562 12.70 14.27
L0.045 0.060 1.15 1.52
N0.190 0.210 4.83 5.33
Q0.100 0.120 2.54 3.04
R0.080 0.110 2.04 2.79
S0.045 0.055 1.15 1.39
T0.235 0.255 5.97 6.47
U0.000 0.050 0.00 1.27
V0.045 ––– 1.15 –––
Z––– 0.080 ––– 2.04
B
Q
H
Z
L
V
G
N
A
K
F
123
4
D
SEATING
PLANE
–T–
C
S
T
U
R
J
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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Mfax is a trademark of Motorola, Inc.
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